19-4269; Rev 0; 10/08 KIT ATION EVALU E L B AVAILA Ultra-Low Capacitance 1:2 VGA Switch with ±15kV ESD The MAX4885E integrates high-bandwidth analog switches and level-translating buffers to implement a complete 1:2 multiplexer for VGA signals. The device provides switching for RGB, display data channel (DDC). Horizontal and vertical synchronization (HSYNC/VSYNC) inputs feature level-shifting buffers to support low-voltage CMOS or standard TTL-compatible graphics controllers, meeting the VESA requirement of ±8mA. DDC, consisting of SDA_ and SCL_, is a bidirectional activelevel translating switch that reduces capacitive load. The MAX4885E features high ESD protection to ±15kV Human Body Model (HBM) on all twelve externally routed terminals. See the Pin Description section. All other pins are protected to ±10kV Human Body Model (HBM). The MAX4885E is specified over the extended -40°C to +85°C temperature range, and is available in the 24-pin, 4mm x 4mm TQFN package. Applications Notebook Computers/Docking Stations Digital Projectors Features ♦ ±15kV HBM ESD Protection on Externally Routed Terminals ♦ 1GHz Bandwidth ♦ Low 5Ω (typ) On-Resistance (R, G, B Signals) ♦ Low 6pF (typ) On-Capacitance (R, G, B Signals) ♦ Low R, G, B Skew -50ps (typ) ♦ Near Zero Power Consumption (< 2µA) ♦ Ultra-Small, 24-Pin (4mm x 4mm) TQFN Package Ordering Information PART TEMP RANGE PIN-PACKAGE MAX4885EETG+ -40°C to +85°C 24 TQFN-EP* *EP = Exposed pad. +Denotes lead-free package/RoHS-compliant package. Computer Monitors Servers/Storage KVM Switches Typical Operating Circuit Pin Configuration R1 R2 G1 G2 B1 B2 TOP VIEW 18 17 16 15 14 13 +3.3V +5.0V 0.1µF SCL2 19 12 V1 SCL1 20 11 H1 SDA2 21 10 GND 0.1µF VCC VL MAX4885E MAX4885E SDA1 22 9 EN 23 3 4 5 6 B0 H0 2 R0 1 SCL0 + SDA0 SEL 24 G0 *EP VL 8 VCC 7 V0 3 GRAPHICS CONTROLLER 2 2 R0, B0, G0 R1, G1, B1 SDA1, SCL1 H0, V0 SDA0, SCL0 H1, V1 3 2 2 VGA PORT 2 +3.3V DOCKING STATION EN R2, G2, B2 SDA2, SCL2 SEL 3 2 DOCKING STATION GND TQFN-EP *EXPOSED PAD. CONNECTED TO GROUND OR LEAVE UNCONNECTED. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 1 MAX4885E General Description MAX4885E Ultra-Low Capacitance 1:2 VGA Switch with ±15kV ESD ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) VCC, VL .....................................................................-0.3V to +6V R_, G_, B_, SDA1, SCL1, SDA2, SCL2, H1, V1, (Note 1) ........................................-0.3V to VCC + 0.3V H0, V0, SDA0, SCL0, EN, SEL.........................-0.3V to VL + 0.3V Continuous Current through RGB Switches .....................±30mA Continuous Current through DDC Switches .....................±30mA Peak Current through RGB Switches (pulsed at 1ms, 10% duty cycle)...................................±90mA Peak Current through DDC Switches (pulsed at 1ms, 10% duty cycle)............................................................±90mA Continuous Power Dissipation (TA = +70°C) 24-Pin TQFN (derate 27.8mW/°C above +70°C) ........2222mW Junction to Ambient Thermal Resistance (θJA) (Note 2) 24-Pin TQFN..................................................................36°C/W Junction to Ambient Thermal Resistance (θJC) (Note 2) 24-Pin TQFN....................................................................3°C/W Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Junction Temperature ......................................................+150°C Lead Temperature (soldering, 10s) .................................+300°C Note 1: Signals exceeding VCC or GND are clamped by internal diodes. Limit forward-diode current to maximum current rating. Note 2: Package thermal resistances were obtained using the method described in JEDEC specifications. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +5.0V ±10%, VL = +2V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5.0V, VL = +3.3V and TA = +25°C.) (Note 3) PARAMETER SYMBOL CONDITIONS VCC Quiescent Supply Current ICC VCC = +5.0V VL Quiescent Supply Current IVL VL = +3.3V MIN TYP EN = VL EN = GND EN = VL EN = GND MAX UNITS 1 µA 1 µA RGB ANALOG SWITCHES On-Resistance RON VCC = +5.0V, IIN = -10mA, VIN = +0.7V (Note 4) 6 Ω On-Resistance Matching ΔRON 0 ≤ VIN ≤ 0.7V, IIN = -10mA 0.5 Ω On-Resistance Flatness RFLAT(ON) 0 ≤ VIN ≤ 0.7V, IIN = -10mA 0.5 Ω Off-Leakage Current IL(OFF) VCC = +5.5V, VIN = +0.3V or +5.5V, VEN = 0 or VL -1 +1 µA On-Leakage Current IL(ON) VCC = +5.5V, VIN = +0.3V or +5.5V, VEN = VL -1 +1 µA 0.33 x VL V HV BUFFER Input Voltage Low VILHV Input Voltage High VIHHV Input Logic Hysteresis VHYST Input Leakage Current IINHV VCC = +5.5V, VL = +5.5V, VIN = 0 or VL -1 High-Output Drive Current IOHHV VOHHV ≥ 3.0V 8.0 mA Low-Output Drive Current IOLHV VOLHV ≤ 0.6V 8.0 mA 2 0.66 x VL V 75 _______________________________________________________________________________________ mV +1 µA Ultra-Low Capacitance 1:2 VGA Switch with ±15kV ESD (VCC = +5.0V ±10%, VL = +2V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5.0V, VL = +3.3V and TA = +25°C.) (Note 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 5.5 V SDA_, SCL_ Supply Voltage VL 2.0 On-Resistance RON VIN = +0.4V, IIN = ±2mA, VL = +2.0V 10 Ω On-Capacitance CON f = 100kHz 15 pF High-Impedance Input Leakage Current IINHIZ EN = GND, VCC = +5.5V, VL = +3.6V, SCL0, SDA0, SCL1, SCL2, SDA1, SDA2 = GND or VVL (Note 5) -1 +1 µA Off-Input Leakage Current IINOFF EN = VL, VL = +3.6V, VIN = VL - 0.2V -1 +1 µA 0.33 x VL V CONTROL LOGIC (SEL, EN) Input Voltage Low VILLOG Input Voltage High VIHLOG Input Logic Hysteresis VHYST Input Leakage Current IINLEK 0.66 x VL V 75 VCC = +5.5V, VL = +3.6V, VIN = 0 or VL -1 mV +1 µA ESD PROTECTION ESD Protection Human Body Model; R1, G1, B1, R2, G2, B2, SDA1, SCL1, SDA2, SCL2, H1, V1 ±15 Human Body Model; all other pins ±10 kV AC ELECTRICAL CHARACTERISTICS (VCC = +5.0V ±10%, VL = +2V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5.0V, VL = +3.3V and TA = +25°C.) (Note 3) PARAMETER SYMBOL CONDITIONS Bandwidth fMAX RS = RL = 50Ω Insertion Loss ILOS Crosstalk VCT MIN TYP MAX UNITS 1 GHz f = 1MHz, RS = RL = 50Ω, Figure 1 0.6 dB f = 50MHz, RS = RL = 50Ω, Figure 1 -40 dB Off-Capacitance COFF f = 250MHz 4.5 pF On-Capacitance CON f = 250MHz 6.4 pF _______________________________________________________________________________________ 3 MAX4885E ELECTRICAL CHARACTERISTICS (continued) TIMING CHARACTERISTICS (VCC = +5.0V ±10%, VL = +2V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5.0V, VL = +3.3V and TA = +25°C.) (Note 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS RGB ANALOG SWITCHES Output Skew Between Ports tSKEW Skew between any two ports: R_, G_, B_, Figure 2 50 ps RL = 1kΩ, CL = 10pF, Figure 2 15 ns HV BUFFER Propagation Delay tPD Note 3: All devices are 100% production tested at TA = +25°C. Specifications over the full temperature range are guaranteed by design. Note 4: On-resistance guarantees the low-static logic level. Note 5: SDA_, SCL_ off-input leakage current guarantees the high-static logic level. Typical Operating Characteristics (VCC = +5.0V, VL = +3.3V and TA = +25°C, unless otherwise noted.) 45 7 TA = +85°C 6 RON (Ω) TA = +25°C 5 VL = +3.3V 30 TA = +85°C TA = +25°C TA = -40°C 4 3 15 TA = -40°C 2 VL = +5.0V TA = +85°C TA = +25°C TA = -40°C 8 IOUT = 8mA 7 MAX4885E toc03 8 SDA0, SCL0 ARE INTERCHANGEABLE OUTPUT VOLTAGE HIGH (V) *R0, G0, B0 ARE INTERCHANGEABLE MAX4885E toc02 60 MAX4885E toc01 10 9 HV BUFFER OUTPUT VOLTAGE HIGH vs. TEMPERATURE RON vs. VSDA0* (DDC SWITCHES) RON vs. VR0* (RGB SWITCHES) RON (Ω) MAX4885E Ultra-Low Capacitance 1:2 VGA Switch with ±15kV ESD 6 5 4 1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 VR0 (V) 4 3 0 0 1 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VSDA0 (V) -40 -15 10 35 TEMPERATURE (°C) _______________________________________________________________________________________ 60 85 Ultra-Low Capacitance 1:2 VGA Switch with ±15kV ESD HV BUFFER OUTPUT VOLTAGE LOW vs. TEMPERATURE SUPPLY CURRENT vs. TEMPERATURE 0.6 0.4 MAX4885E toc05 0.8 0.4 SUPPLY CURRENT (μA) OUTPUT VOLTAGE LOW (V) IOUT = 8mA 0.5 MAX4885E toc04 1.0 0.2 0.3 0.2 0.1 0.0 0.0 -40 -15 10 60 35 85 -40 TEMPERATURE (°C) -10 -20 CROSSTALK (dB) -4 -5 -6 -40 -50 -60 -70 -8 -80 -9 -90 -10 -100 10 100 85 -30 -7 FREQUENCY (MHz) 60 CROSSTALK vs. FREQUENCY -3 1 35 1000 MAX4885E toc07 -2 10 0 MAX4885E toc06 -1 -15 TEMPERATURE (°C) ON-RESPONSE vs. FREQUENCY 0 ON-RESPONSE (dB) ICC IVL 1 10 100 1000 FREQUENCY (MHz) _______________________________________________________________________________________ 5 MAX4885E Typical Operating Characteristics (continued) (VCC = +5.0V, VL = +3.3V and TA = +25°C, unless otherwise noted.) Ultra-Low Capacitance 1:2 VGA Switch with ±15kV ESD MAX4885E Timing Circuits/Timing Diagrams +5V 10nF NETWORK ANALYZER 0 OR VCC VCC SEL 50Ω VIN 50Ω INSERTION-LOSS = 20log ✕ R0, G0, B0 V CROSSTALK = 20log ✕ OUT VIN MAX4885E R1, G1, B1 50Ω MEAS VOUT R2, G2, B2 GND REF 50Ω 50Ω MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. INSERTION-LOSS IS MEASURED BETWEEN R0 AND R1 OR R2 ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED. Figure 1. Insertion-Loss and Crosstalk 1V 50% RL = 1kΩ CL = 10pF 50% INPUT 0 VOH tPHL tPLH 0.9V 50% OUTPUT 50% 0 tSKEW = |tPLH - tPHL| tPD = MAX (tPLH, tPHL) Figure 2. Propagation Delay and Skew Waveforms 6 VOUT VIN _______________________________________________________________________________________ Ultra-Low Capacitance 1:2 VGA Switch with ±15kV ESD PIN NAME FUNCTION 1 SDA0 SDA I/O 2 SCL0 SCL I/O 3 R0 RGB Analog I/O 4 G0 RGB Analog I/O 5 B0 RGB Analog I/O 6 H0 Horizontal Sync Input 7 V0 8 VCC Vertical Sync Input 9 VL 10 GND 11 H1 Horizontal Sync Output* 12 V1 Vertical Sync Output* 13 B2 RGB Analog I/O* 14 B1 RGB Analog I/O* 15 G2 RGB Analog I/O* 16 G1 RGB Analog I/O* 17 R2 RGB Analog I/O* 18 R1 RGB Analog I/O* 19 SCL2 SCL I/O* 20 SCL1 SCL I/O* 21 SDA2 SDA I/O* 22 SDA1 23 EN 24 SEL Select Input. Logic input for switching RGB and DDC swiches. — EP Exposed Pad. Connect exposed pad to ground or leave unconnected. Supply Voltage. VCC = +5.0V ±10%. Bypass VCC to GND with a 0.1µF or larger ceramic capacitor. Supply Voltage. +2V ≤ VL ≤ +5.5V. Bypass VL to GND with a 0.1µF or larger ceramic capacitor. Ground SDA I/O* Enable Input. Drive EN high for normal operation. Drive EN low to disable the device. *Terminal as ±15kV ESD protection—Human Body Model. Detailed Description The MAX4885E integrates high-bandwidth analog switches and level-translating buffers to implement a complete 1:2 multiplexer for VGA signals. The device provides switching for RGB, HSYNC, VSYNC, SDA_ and SCL_ signals. The HSYNC and VSYNC inputs feature level-shifting buffers to support TTL output logic levels from low-voltage graphics controllers. These buffered switches may be driven from as little as +2.0V up to +5.5V. RGB signals are routed with the same high-performance analog switches, and SDA_, SCL_ signals are voltage clamped to a diode drop less than VL. Voltage clamping provides protection and compatibility with SDA_ and SCL_ signals and low-voltage ASICs. In keyboard/video/ mouse (KVM) applications, VL is normally set to +5V because low-voltage clamping is not required, as specified by the VESA standard. Drive EN logic-low to shut down the MAX4885E. In shutdown mode, all switches are high impedance, providing high-signal rejection. The RGB, HSYNC, VSYNC, SDA_, and SCL_ outputs are ESD protected to ±15kV by the Human Body Model. RGB Switches The MAX4885E provides three SPDT high-bandwidth switches to route standard VGA R, G, and B signals (see Table 1). The R, G, and B analog switches are identical, and any of the three switches can be used to route red, green, or blue video signals. _______________________________________________________________________________________ 7 MAX4885E Pin Description MAX4885E Ultra-Low Capacitance 1:2 VGA Switch with ±15kV ESD Table 1. RGB Truth Table EN SEL FUNCTION 1 0 R0 to R1 G0 to G1 B0 to B1 1 1 R0 to R2 G0 to G2 B0 to B2 0 X R_, B_, and G_, high impedance X = Don’t care. Table 2. HV Truth Table EN 0 FUNCTION ESD performance depends on a variety of conditions. Please contact Maxim for a reliability report documenting test setup, methodology, and results. Table 3. DDC Truth Table SEL Human Body Model (HBM) Several ESD testing standards exist for measuring the robustness of ESD structures. The ESD protection of the MAX4885E is characterized with the Human Body Model. Figure 3 shows the model used to simulate an ESD event resulting from contact with the human body. The model consists of a 100pF storage capacitor that is charged to a high voltage, then discharged through a 1.5kΩ resistor. Figure 4 shows the current waveform when the storage capacitor is discharged into a low impedance. ESD Test Conditions H_, V_ = 0 X = Don’t care. EN outputs by the Human Body Model (HBM). See the Pin Description section. For optimum ESD performance, bypass each VCC pin to ground with a 0.1µF or larger ceramic capacitor. Applications Information FUNCTION 1 0 SDA0 to SDA1 SCL0 to SCL1 1 1 SDA0 to SDA2 SCL0 to SCL2 0 X SDA_, SCL_, high impedance X = Don’t care. Horizontal/Vertical Sync Level Shifter HSYNC/VSYNC are buffered to provide level shifting and drive capability to meet the VESA specification. The MAX4885E provides the level shifting necessary to drive two standard VGA ports from a graphics controller as low as +2.2V. Internal buffers drive the HSYNC and VSYNC signals to VGA standard TTL levels. The DDC multiplexer provides level shifting by clamping signals to a diode drop less than VL (see the Typical Operating Circuit ). Connect VL to +3.3V for normal operation, or to VCC to disable voltage clamping for DDC signals. Power-Supply Decoupling Bypass each VCC pin and VL to ground with a 0.1µF or larger ceramic capacitor as close as possible to the device. Display-Data Channel Multiplexer The MAX4885E provides two voltage-clamped switches to route DDC signals (see Table 3). Each switch clamps signals to a diode drop less than the voltage applied on VL. Supply +3.3V on VL to provide voltage clamping for VESA I2C-compatible signals. If voltage clamping is not required, connect V L to V CC . The SDA_ and SCL_ switches are identical, and each switch can be used to route either SDA_ and SCL_ signals. ESD Protection PCB Layout High-speed switches such as the MAX4885E require proper PCB layout for optimum performance. Ensure that impedance-controlled PCB traces for high-speed signals are matched in length and as short as possible. Connect the exposed pad to a solid ground plane. Chip Information PROCESS: BiCMOS As with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. Additionally, the MAX4885E is protected to ±15kV on RGB, HSYNC, VSYNC, SDA_ and SCL_ 8 _______________________________________________________________________________________ Ultra-Low Capacitance 1:2 VGA Switch with ±15kV ESD CHARGE-CURRENTLIMIT RESISTOR MAX4885E RC 1MΩ RD 1500Ω IP 100% 90% DISCHARGE RESISTANCE IR PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) AMPERES HIGHVOLTAGE DC SOURCE Cs 100pF DEVICE UNDER TEST STORAGE CAPACITOR 36.8% 10% 0 0 Figure 3. Human Body ESD Test Model TIME tRL tDL CURRENT WAVEFORM Figure 4. HBM Discharge Current Waveform Functional Diagram MAX4885E R1 R0 G1 G0 B1 B0 R2 G2 EN B2 SEL SDA1 SDA0 SCL0 SCL1 BIDIRECTIONAL LEVEL SHIFTER SDA2 SCL2 H1 H0 V1 V0 _______________________________________________________________________________________ 9 MAX4885E Ultra-Low Capacitance 1:2 VGA Switch with ±15kV ESD Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 24 TQFN-EP T2444-4 21-0139 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.