MAXIM MAX4929EEEP+

19-0860; Rev 0; 10/07
HDMI 2:1 Low-Frequency Translating Switch
The MAX4929E low-frequency 2:1 switch is ideal for
HDMI™/DVI™ switching applications. The device features a voltage clamp function to protect low-voltage
systems at the output. The MAX4929E operates with a
single 5V supply or dual or triple supplies. The
MAX4929E provides clamping and voltage translation
without additional components. All external inputs/outputs are electrostatic-discharge (ESD)-protected to
±6kV Human Body Model (HBM).
The MAX4929E is available in 20-pin QSOP and 20-pin,
4mm x 4mm, TQFN packages. The device is specified
for the extended -40°C to +85°C operating temperature
range.
Applications
Features
o DDC Switches
Low 20pF (typ) Capacitance
o Protects EDID (Extended Display Identification
Data) EPROM or MCU from Excess Voltage
o Hot-Plug Detect Signal
Translates MCU Voltage to TTL Levels
o Two Devices Can Be Used to Form a 4:1 Switch
No Added Active Components Needed
o ±6kV ESD Protection HBM on All External I/Os
o Available in Lead-Free, 20-Pin TQFN or 20-Pin QSOP
Packages
HD Television Receivers
HD Monitors
Ordering Information
High-Resolution Computer Monitors
PART
HDMI is a trademark of HDMI Licensing, LLC.
DVI is a trademark of Digital Display Working Group (DDWG).
PINPACKAGE
TEMP RANGE
PKG
CODE
MAX4929EEEP+ -40°C to +85°C
20 QSOP
MAX4929EETP+ -40°C to +85°C
20 TQFN-EP*
E20-1
T2044-3
+Denotes a lead-free package
*EP = Exposed paddle.
Typical Operating Circuit
Pin Configurations
2kΩ
SCLO
2kΩ
SDAO
CLP
15
14
13
12
11
VDD
HPIR1
SCL1
SDA1
HPDO1
SCLO
SDAO
EDID
EPROM
HIZ1 16
10
SEL
GND 17
9
VL
8
CLP
7
V+
6
SCL1
EXESD
0.1μF
MAX4929E
HPIR2
SCL2
SDA2
HPDO2
EXESD 18
MAX4929E
HPDO2 19
*EP
HPIR2 20
HIZ2
SEL HPIRO HPD VDD
MCU
3
4
5
SDA1
SDA2
+2V to +3.3V
0.1μF
2
HPIR1
1
GND SEL HPIRO HPD VL
HPDO1
HIZ1
HDMI2
SCL2
V+
TMDS1
TMDS1
TOP VIEW
0.1μF
HPIRO
0.1μF
HDMI1
HPD
+3.3V TO +5V
HIZ2
+5V
TQFN
(4mm x 4mm)
*EXPOSED PADDLE CONNECTED TO GND OR LEAVE EP UNCONNECTED
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX4929E
General Description
MAX4929E
HDMI 2:1 Low-Frequency Translating Switch
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND, unless otherwise noted.)
V+ ............................................................................-0.3V to +6V
All Pins (except GND) .............................................-0.3V to +6V
Continuous Current into Any I/O Terminal .........................25mA
Continuous Power Dissipation (TA = +70°C)
20-Pin QSOP (derate 9.1mW/°C above +70°C) ..........727mW
20-Pin TQFN (derate 16.9mW/°C above +70°C) ......1356mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V+ = +5V ±10%, CLP = VL = +3.3V ±10%, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER SUPPLY
V+ Supply Current
I+
V+ = 5.5V, VL = CLP = 3.6V
V+ Supply Current
I+
V+ = 0V, VL = CLP = 0V, VHPIR_ = +5.5V
VL Supply Current
IVL
ICLP
CLP Supply Current
3
8
µA
200
µA
V+ = 5.5V, VL = CLP = 3.6V
1
µA
V+ = 5.5V, VL = CLP = 3.6V
1
µA
ANALOG SWITCH
RON(SCL_),
RON(SDA_)
V+ = 4.5V, CLP = 3V, VSCL_ or VSDA_ = 0 to
1.5V; ISCL_ or ISDA_ = ±10mA
10
25
Ω
On-Resistance Match Between
Channels
ΔRON
V+ = 4.5V, CLP = 3V, VSCL_ or VSDA_ = 0 to
1.5V; ISCL_ or ISDA_ = ±10mA
2
8
Ω
On-Resistance Flatness
RFLAT
V+ = 4.5V, CLP = 3V, VSCL_ or VSDA_ = 0 to
1.5V; ISCL_ or ISDA_ = ±10mA
13
Ω
On-Resistance
Off-Leakage Current
ISCL_(OFF),
ISDA_(OFF)
V+ = 5.5V, VSCL_ or VSDA_ = 0V, 5.5V;
HIZ1 = HIZ2 = 0V or VL (Note 1)
-5
+5
µA
On-Leakage Current
ISCL_(ON),
ISDA_(ON)
V+ = 5.5V, VSCL_ or VSDA_ = 0V, 5.5V
(Note 1)
-5
+5
µA
Output Clamped Voltage
VOVC(SCLO), V+ = 5V, CLP = 3.3V, VL = 5V, RP = 1kΩ
VOVC(SDAO) (Note 2)
3.3
V
SWITCH DYNAMIC CHARACTERISTICS
SCL_, SDA_ Off-Capacitance
CSCL_(OFF),
V+ = 5V, TA = +25°C, Figure 1
CSDA_(OFF)
20
pF
SCL_, SDA_ On-Capacitance
CSCL_(ON),
CSDA_(ON)
30
pF
V+ = 5V, TA = +25°C, Figure 1
Bandwidth
BW
RS = RL = 50Ω, CL = 10pF
40
MHz
Crosstalk
VCT
RS = RL = 50Ω, f = 1MHz, Figure 2 (Note 3)
-75
dB
Off-Isolation
VISO
RS = RL = 50Ω, f = 1MHz, Figure 2 (Note 4)
-70
dB
LOGIC INPUT (HPIR1, HPIR2)
Input Logic-Low Voltage
VIL
V+ = 4.5V
Input Logic-High Voltage
VIH
V+ = 5.5V
Input Logic Leakage
IINL
2
0.8
V
1
µA
3.8
V
0.01
_______________________________________________________________________________________
HDMI 2:1 Low-Frequency Translating Switch
(V+ = +5V ±10%, CLP = VL = +3.3V ±10%, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
0.8
V
LOGIC INPUT (SEL, HPD, HIZ1, HIZ2)
Input Logic-Low Voltage
VIL
V+ = 4.5V, VL = CLP = 3V
Input Logic-High Voltage
VIH
V+ = 5.5V, VL = CLP = 3.6V
Hysteresis
VHYST
Input Logic-Leakage Current
2.0
3V ≤ VL = CLP ≤ 3.6V
V
150
IINL
0.01
mV
1
µA
0.5
V
0.5
V
LOGIC OUTPUT (HPDO1, HPDO2, HPIRO)
HPDO_ Output Logic-Low Voltage
VOL(HPDO_) V+ = 4.5V, VL = CLP = 3.0V, ISINK = 4mA
HPDO_ Output Logic-High Voltage
VOH(HPDO_) V+ = 4.5V, VL = CLP = 3.0V, ISOURCE = 4mA
HPIRO Output Logic-Low Voltage
VOL(HPIRO)
HPIRO Output Logic-High Voltage
VOH(HPIRO) V+ = 4.5V, VL = CLP = 3.0V, ISOURCE = 2mA
Output-Logic Leakage Current
IO
4.0
V
V+ = 4.5V, VL = CLP = 3.0V, ISINK = 2mA
2.5
V
HIZ1 = HIZ2 = 0V or VL
1
µA
TIMING CHARACTERISTICS
tPD(HPDO_)
V+ = 4.5V, VL = CLP = 3.0V, CL = 15pF,
SEL = 0V or VL (Figure 3)
33
tPD(HPIRO)
V+ = 4.5V, VL = CLP = 3.0V, CL = 15pF,
(SEL = 0V or VL (Figure 3)
33
HPIR1, HPIR2, HPDO1, HPDO2, SCL1,
SCL2, SDA1, SDA2 (Note 5)
±6
ns
Logic Delay
ESD PROTECTION
ESD Protection, Human Body
Model
EXESD Leakage Current
kV
HPIRO, HPD, SEL, SCLO, SDAO, HIZ1,
HIZ2 (Note 6)
±2
1.0
µA
Note 1: Leakage measured at SCLO or SDAO with SCL_ and SDA_ open.
Note 2: Pullup resistor of RP = 1kΩ at SCLO and SDAO. These resistors are necessary for the clamp/translation to operate correctly.
Note 3: Crosstalk is measured between any two analog inputs, crosstalk = 20log(VOUT / VIN).
Note 4: Off-isolation = 20log10 (VSCLO / VSCL_), VSCLO = output, VSCL_ = input to off switch.
Note 5: Referenced to GND.
Note 6: Any combination of pin to any other pin.
_______________________________________________________________________________________
3
MAX4929E
ELECTRICAL CHARACTERISTICS (continued)
HDMI 2:1 Low-Frequency Translating Switch
MAX4929E
Test Circuits/Timing Diagrams
0.1μF
+5V
+3.3V
V+
MAX4929E
SDAO/SCLO
VL
0.1μF
CLP
SEL
CAPACITANCE
METER
SDA_/
SCL_
f = 1MHz
VIL OR VIH
VL
HIZ1
HIZ2
GND
Figure 1. Channel Off-/On-Capacitance
+3.3V +5V 0.1μF
0.1μF
V
OFF-ISOLATION = 20log OUT
VIN
NETWORK
ANALYZER
0V OR VL
SEL
CLP VL V+
SDA1/
SCL1
50Ω
MAX4929E
VL
HIZ1
HIZ2
50Ω
VIN
SDAO/
SCLO
MEAS
VOUT
SDA2/
SCL2*
V
ON-LOSS = 20log OUT
VIN
50Ω
REF
50Ω
V
CROSSTALK = 20log OUT
VIN
50Ω
GND
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN SDAO/SCLO AND "OFF" SDA_/SCL_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN SDAO/SCLO AND "ON" SDA_/SCL_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
*FOR CROSSTALK THIS PIN IS SCL2.
SCL1 AND SCL0 ARE OPEN.
Figure 2. On-Loss, Off-Isolation, and Crosstalk
t r < 5ns
t f < 5ns
V+ or VL
HPD
HPIR_
0V
50%
VOUT
HPDO_
HPIRO 0V
0.9 x V0UT
t PD(HPDO )
t PD(HPIR O)
Figure 3. Logic Delay Timing
4
_______________________________________________________________________________________
HDMI 2:1 Low-Frequency Translating Switch
ON-RESISTANCE vs. VSCLO
ON-RESISTANCE vs. TEMPERATURE
8
V+ = 5V
V+ = 4.5V
4
2
10
8
V+ = 5V
V+ = 4.5V
6
4
2
0
0
0
0.5
1.0
1.5
10
35
TEMPERATURE (°C)
SUPPLY CURRENT vs. TEMPERATURE
ON-LEAKAGE CURRENT
vs. TEMPERATURE
0.6
0.4
40
ON-LEAKAGE CURRENT (nA)
MAX4929E toc03
0.8
-40
-15
60
85
MAX4929E toc04
VSCLO (V)
1.0
SUPPLY CURRENT (μA)
V+ = 4V
12
ON-RESISTANCE (Ω)
ON-RESISTANCE (Ω)
V+ = 4V
MAX4929E toc02
10
6
14
MAX4929E toc01
12
V+ = 5.5V
VL = CLP = 3.3V
30
20
10
0.2
0
0
-40
-15
10
35
TEMPERATURE (°C)
60
-40
85
OFF-LEAKAGE CURRENT
vs. TEMPERATURE
60
85
FREQUENCY RESPONSE
MAX4929E toc06
0
30
-20
ON-LOSS
ON-LOSS (dB)
OFF-LEAKAGE CURRENT (nA)
V+ = 5.5V
VL = CLP = 3.3V
10
35
TEMPERATURE (°C)
20
MAX4929E toc05
40
-15
20
-40
OFF-ISOLATION
-60
-80
CROSSTALK
10
-100
-120
0
-140
-40
-15
10
35
TEMPERATURE (°C)
60
85
0.1
1
10
FREQUENCY (MHz)
100
_______________________________________________________________________________________
5
MAX4929E
Typical Operating Characteristics
(V+ = 5V, VL = 3.3V, CLP = 3.3V, TA = +25°C, unless otherwise noted.)
HDMI 2:1 Low-Frequency Translating Switch
MAX4929E
Pin Description
PIN
6
NAME
FUNCTION
QSOP
TQFN
1
19
HPDO2
Hot-Plug Detect Output 2. Translate logic level of HPD to V+ compatible (See Table 2).
2
20
HPIR2
Hot-Plug Interrupt Request 2
3
1
SDA2
Serial Data Input. SDA Mux Input 2.
4
2
SCL2
Serial Clock Input. SCL Mux Input 2.
5
3
HPDO1
Hot-Plug Detect Output 1. Translate logic level of HPD to V+ compatible (See Table 2).
6
4
HPIR1
Hot-Plug Interrupt Request 1
7
5
SDA1
Serial Data Input. SDA Mux Input 1.
8
6
SCL1
9
7
V+
10
8
CLP
Clamp-Voltage Reference. Clamp the maximum voltage of SCLO and SDAO. Bypass
CLP to GND with a 0.1µF or greater ceramic capacitor (See Figure 6 and the Typical
Operating Circuit).
11
9
VL
Logic Supply for HIZ_, SEL, HPD, HPIRO. Bypass VL to GND with a 0.1µF or greater
ceramic capacitor. VL should have the same voltage level as any MCU interface.
Select Input. Logic input for Mux connection (See Table 1).
Serial Clock Input. SCL Mux Input 1.
Positive Supply Voltage. Bypass V+ to GND with a 0.1µF or greater ceramic capacitor.
12
10
SEL
13
11
SCLO
14
12
SDAO
SDA Mux Output. Connect SDAO to EDID EPROM.
Hot-Plug Interrupt Request Output. Translate logic level of HPIR_ to VL compatible
(See Table 3).
SCL Mux Output. Connect SCLO to EDID EPROM.
15
13
HPIRO
16
14
HPD
Hot-Plug Detect Input. Logic level on HPD is compatible with MCU.
17
15
HIZ2
Enable Input 2 (See Table 4).
18
16
HIZ1
Enable Input 1 (See Table 4).
19
17
GND
Ground
20
18
EXESD
—
EP
EP
External ESD Discharge. Connect 0.1µF capacitor from EXESD to GND.
Exposed Paddle. Connect EP to GND or leave EP unconnected.
_______________________________________________________________________________________
HDMI 2:1 Low-Frequency Translating Switch
MAX4929E
SDA1
SDAO
SDA2
SCL1
SCLO
SCL2
HPIR1
HPIR2
HPDO1
HPDO2
HPD LOGIC
(V+)
SEL
HPD
HPIRO
HPD LOGIC
(VL)
HIZ1
HIZ2
EXESD
V+
Detailed Description
The MAX4929E low-frequency 2:1 switch is ideal for the
low-frequency portion of HDMI/DVI switching applications. The device features three independent voltage
inputs that allow the user to match any voltage level
encountered in switching without additional components. The V+ range is from 4.5V to 5.5V to match the
HDMI/DVI 5V requirements. CLP is set to match the
EDID EPROM from 3.3V to 5.5V. VL is connected to the
same supply as the system MCU. All pins going to the
HDMI/DVI connectors are ESD-protected to ±6kV
Human Body Model (HBM).
The MAX4929E has two enable inputs. The enable
function allows the device to operate in normal mode or
go into a high-Z state. It is possible to control two
MAX4929Es with a single control bit, creating a 4:1
equivalent switch using a minimum of external components (see Figure 6).
Supply or signals sequencing are not required for the
MAX4929E. Supply voltages V+, VL, and CLP can be
GND
CLP
VL
applied in any order. Signals can be applied in any
order as well.
Analog Switch
The MAX4929E features a voltage clamp function for the
two 2:1 switch. Inputs to SCL_/SDA_ are V+ level compatible. Maximum output voltages of SCLO/SDAO are
clamped to CLP. For optimum performance connect the
EDID EPROM supply voltage to CLP (see Figure 6). For
proper operation of the voltage clamp, connect
SCLO/SDAO to CLP through the pullup resistors. For
maximum output range, connect CLP to V+. The output of
the switch is connected to the EDID EPROM, voltages
from 3V to 5.5V are expected.
Logic Inputs
VL is the supply to input logic HIZ_, SEL, and HPD.
Connect VL to the same supply as the system MCU for
compatibility.
V+ is the supply to the input logic of the HPIR1 and
HPIR2 inputs.
_______________________________________________________________________________________
7
MAX4929E
Functional Diagram
MAX4929E
HDMI 2:1 Low-Frequency Translating Switch
Table 1. Inputs Selection for 2:1 Mux
Truth Table
INPUTS
Table 4. Mode of Operation
INPUTS
SWITCH CONNECTIONS
HIZ2
MODE OF OPERATION
0
0
High-Impedance: SDAO, SDA1, SDA2,
SCLO, SCL1, SCL2, HPDO1, HPDO2, HPIRO
SEL
HIZ1
HIZ2
0
0
1
SDAO to SDA1, SCLO to SCL1
0
1
0
SDAO to SDA1, SCLO to SCL1
0
1
Normal Operation
1
0
1
SDAO to SDA2, SCLO to SCL2
1
0
Normal Operation
1
1
0
SDAO to SDA2, SCLO to SCL2
1
1
X
0
0
High Impedance
High-Impedance: SDAO, SDA1, SDA2,
SCLO, SCL1, SCL2, HPDO1, HPDO2, HPIRO
X
1
1
High Impedance
RC
1MΩ
Table 2. HPD Output Channel Selection
INPUTS
SEL
CHARGE-CURRENTLIMIT RESISTOR
OUTPUTS
HPD
HIZ1
HIZ2
HPDO1
HPDO2
X
0
0
1
1
0
0
0
0
1
0
1
1
0
1
0
1
1
0
1
1
0
0
1
X
X
1
1
High
Impedance
High
Impedance
X
X
0
0
High
Impedance
High
Impedance
Table 3. HPIRO Output Channel Selection
INPUTS
8
OUTPUTS
HIZ1
OUTPUT
SEL
HPIR1
HPIR2
HIZ1
HIZ2
HPIRO
X
0
0
0
1
1
0
0
X
1
1
0
1
1
0
1
1
0
0
0
0
X
0
1
0
1
X
0
1
1
0
1
1
X
0
0
1
1
0
0
1
X
1
0
1
1
0
1
X
X
X
0
0
High
Impedance
X
X
X
1
1
High
Impedance
HIGHVOLTAGE
DC
SOURCE
Cs
100pF
RD
1500Ω
DISCHARGE
RESISTANCE
DEVICE
UNDER
TEST
STORAGE
CAPACITOR
Figure 4. Human Body ESD Test Model
Logic Outputs
The HPDO_ signals are 5V TTL-compatible, per HDMI/
DVI specifications. HPIRO is VL compatible.
ESD Protection
As with all Maxim devices, ESD-protection structures
are incorporated on all pins to protect against ESD
encountered during handling and assembly.
Additionally, the MAX4929E is protected to ±6kV (HBM)
on SCL1, SCL2, SDA1, SDA2, HPDO1, HPDO2, HPIR1,
and HPIR2 by the HBM.
Human Body Model
Several ESD testing standards exist for measuring the
robustness against ESD events. The ESD protection of
the MAX4929E is characterized with the HBM method.
Figure 4 shows the model used to simulate an ESD event
resulting from contact with the human body. The model
consists of a 100pF storage capacitor that is charged to a
high voltage, then discharged through a 1.5kΩ resistor.
Figure 5 shows the current waveform when the storage
capacitor is discharged into a lower impedance.
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report documenting test
setup, methodology, and results.
_______________________________________________________________________________________
HDMI 2:1 Low-Frequency Translating Switch
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
Ir
Hot Plug
The MAX4929E is designed for HDMI/DVI switching.
The MAX4929E permits hot-plugging to any inputs/
outputs regardless of the power status of the device.
A plug can be inserted, and thus connected to the
MAX4929E whether the device is powered up or not.
Therefore, sequencing of power supplies is not
required; V+, CLP, and VL can be applied in any order.
AMPERES
36.8%
10%
0
0
TIME
tRL
tDL
CURRENT WAVEFORM
Configure Two Devices to Form 4:1 Switch
Two MAX4929Es can be connected together to form a
4:1 switch (see Figure 6).
Figure 5. HBM Discharge Current Waveform
Applications Information
Exposed Paddle
Power-Supply Bypassing and Sequencing
The MAX4929EETP+ provides an EP to improve thermal
performance in the TQFN package. Connect the EP to
GND or leave EP unconnected.
There is no power-supply sequencing required. Power
can be applied to V+, CLP, or VL in any order. Bypass
HDMI1
HPIR1, HPDO1,
SCL1, SDA1
HDMI2
HPIR2, HPDO2,
SCL2, SDA2
MAX4929E
+3.3V TO +5V
+2V TO +3.3V
CLP
EXESD
0.1μF
VMCU
+5V
SCLO
SDAO
V+
VL
CHIP
SELECT
HDMI3
HPIR1, HPDO1,
SCL1, SDA1
RP
2kΩ
EDID
EPROM
MCU
HPIRO
HIZ1
HIZ2
RP
2kΩ
HPD
GND
SEL
MAX4929E
EXESD
0.1μF
HDMI4
HPIR2, HPDO2,
SCL2, SDA2
CLP
+5V
VMCU
SCLO
SDAO
V+
VL
HPIRO
HIZ1
HIZ2
GND
HPD
SEL
Figure 6. Two MAX4929Es Connected to Form a 4:1 Translating Switch
_______________________________________________________________________________________
9
MAX4929E
IP 100%
90%
V+, VL, and CLP to GND using 0.1µF or larger ceramic
capacitors as close to the device as possible.
HDMI 2:1 Low-Frequency Translating Switch
MAX4929E
Pin Configurations (continued)
Chip Information
PROCESS: BiCMOS
TOP VIEW
HPDO2 1
20 EXESD
HPIR2 2
19 GND
SDA2 3
18 HIZ1
SCL2 4
MAX4929E
HPDO1 5
17 HIZ2
16 HPD
HPIR1 6
15 HPIRO
SDA1 7
14 SDAO
SCL1 8
13 SCLO
V+ 9
12 SEL
CLP 10
11 VL
QSOP
10
______________________________________________________________________________________
HDMI 2:1 Low-Frequency Translating Switch
24L QFN THIN.EPS
______________________________________________________________________________________
11
MAX4929E
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
MAX4929E
HDMI 2:1 Low-Frequency Translating Switch
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
12
______________________________________________________________________________________
HDMI 2:1 Low-Frequency Translating Switch
QSOP.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13
© 2007 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
MAX4929E
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)