19-2640; Rev 0; 10/02 KIT ATION EVALU E L B A IL AVA 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators Applications Features ♦ 6A PWM Step-Down Regulator with 95% Efficiency ♦ 1MHz/500kHz Switching for Small External Components ♦ 0.76in2 Complete 6A Regulator Footprint ♦ External Components’ Height <3mm ♦ ±1% Output Accuracy over Load and Line ♦ Operate from 2.6V to 5.5V Supply ♦ Operate from 2.5V Input with VCC at 3.3V/5V ♦ Preset Output Voltage of 1.8V or 2.5V ♦ Adjustable Output from 0.8V to 85% of Input ♦ Voltage Margining: ±4% (MAX1945R) or ±9% (MAX1945S) ♦ Synchronize to External Clock ♦ SYNCOUT Provides 180-Degree Out-of-Phase Clock Output ♦ All-Ceramic or Electrolytic Capacitor Designs Ordering Information PART TEMP RANGE PIN-PACKAGE MAX1945REUI -40°C to +85°C 28 TSSOP-EP* MAX1945SEUI -40°C to +85°C 28 TSSOP-EP *EP = Exposed pad. Low-Voltage, High-Density Distributed Power Supplies Typical Operating Circuit ASIC, CPU, and DSP Core Voltages RAM Power Supply Base Station, Telecom, and Networking Equipment Power Supplies INPUT 2.6V TO 5.5V OUTPUT 0.8V TO 0.85 x VIN, 6A LX VDD Server and Notebook Power Supplies VCC VOLTAGE MARGINING ON/OFF SYNCHRONIZATION CLOCK Pin Configuration appears at end of data sheet. BST IN MAX1945R MAX1946S CTL1 PGND CTL2 SYNC FB COMP SYNCOUT FBSEL REF 180° OUT-OF-PHASE GND ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX1945R/MAX1945S General Description The MAX1945R/MAX1945S high-efficiency pulse-width modulation (PWM) switching regulators deliver up to 6A of output current. The devices operate from an input supply range of 2.6V to 5.5V and provide selectable output voltages of 1.8V, 2.5V, and adjustable output voltages from 0.8V to 85% of the supply voltage. With VCC at 3.3V/5V, the input voltage can be as low as 2.25V. The MAX1945R/MAX1945S are ideal for onboard post-regulation applications. Total output voltage error is less than ±1% over load, line, and temperature. The MAX1945R/MAX1945S operate at a selectable fixed frequency (500kHz or 1MHz) or can be synchronized to an external clock (400kHz to 1.2MHz). The high operating frequency minimizes the size of external components. The high bandwidth of the internal error amplifier provides excellent transient response. The MAX1945R/MAX1945S have internal dual N-channel MOSFETs to lower heat dissipation at heavy loads. Two MAX1945R/MAX1945Ss can operate 180 degrees outof-phase of each other to minimize input capacitance. The devices provide output voltage margining for board-level testing. The MAX1945R provides a ±4% voltage margining. The MAX1945S provides a ±9% voltage margining. The MAX1945R/MAX1945S are available in 28-pin TSSOP-EP packages and are specified over the -40°C to +85°C industrial temperature range. An evaluation kit is available to speed designs. MAX1945R/MAX1945S 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators ABSOLUTE MAXIMUM RATINGS CTL1, CTL2, IN, SYNC, VCC, VDD to GND ...............-0.3V to +6V SYNCOUT, COMP, FB, FBSEL, REF to GND ............................................-0.3V to (VCC + 0.3V) LX Current (Note 1) .....................................................-9A to +9A BST to LX..................................................................-0.3V to +6V PGND to GND .......................................................-0.3V to +0.3V Continuous Power Dissipation (TA = +85°C) (derate 23.8mW/°C above +70°C) .............................1191mW Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 1: LX has internal clamp diodes to PGND and IN. Applications that forward bias these diodes should take care not to exceed the IC’s package power dissipation limits. ELECTRICAL CHARACTERISTICS (VIN = VCC = VCTL1 = VCTL2 = VDD = 3.3V, SYNC = GND, FBSEL = High-Z, VFB = 0.7V, CREF = 0.22µF, TA = 0°C to +85°C, unless otherwise noted. Typical values are at +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 5.5 V IN/VCC Input Voltage VIN 2.6 IN Supply Current IIN SYNC = VCC (1MHz), no load VCC Supply Current ICC SYNC = VCC (1MHz) VDD Supply Current IDD SYNC = VCC (1MHz) VIN = 3.3V 10 VIN = 5.5V 48 VCC = 3.3V 2 VCC = 5.5V 3 VDD = 3.3V 4 VDD = 5.5V 9 Total Shutdown Current from IN, VCC, and VDD ITOTAL VIN = VCC = VDD = VBST - VLX = 5.5V, CTL1 = CTL2 = GND VCC Undervoltage Lockout Threshold VUVLO When LX starts/stops switching 3 6 500 VCC rising VCC falling 20 2.40 2.20 2.55 2.35 mA mA mA µA V VDD VDD Shutdown Supply Current VIN = VDD = VBST = 5.5V, VLX = 5.5V or 0, CTL1 = CTL2 = GND 10 µA VIN = VDD = VBST = 5.5V, VLX = 5.5V or 0, CTL1 = CTL2 = GND 10 µA BST BST Shutdown Supply Current IBST REF REF Voltage VREF REF Shutdown Resistance IREF = 0, VIN = 2.6V to 5.5V 1.97 From REF to GND, CTL1 = CTL2 = GND 2.00 2.04 V 10 100 Ω COMP FBSEL = High-Z COMP Clamp Voltage Low COMP Clamp Voltage High COMP Shutdown Resistance 2 30 55 85 FBSEL = GND 13.3 24.4 37.8 FBSEL = VCC 9.6 17.6 27.2 VIN = 2.6V to 5.5V, VFB = 0.9V 0.5 0.8 1.1 V VIN = 2.6V to 5.5V, VFB = 0.7V 1.90 2.15 2.40 V 10 100 Ω From FB to COMP, VCOMP = 1.25V COMP Transconductance VLOW_ CLAMP VHIGH_ CLAMP From COMP to GND, CTL1 = CTL2 = GND _______________________________________________________________________________________ µS 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators (VIN = VCC = VCTL1 = VCTL2 = VDD = 3.3V, SYNC = GND, FBSEL = High-Z, VFB = 0.7V, CREF = 0.22µF, TA = 0°C to +85°C, unless otherwise noted. Typical values are at +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX FBSEL = GND 1.782 1.800 1.818 FBSEL = VCC 2.475 2.500 2.525 FBSEL = High-Z 0.792 0.800 0.808 UNITS FB FB Regulation Voltage (Error Amp Only) Maximum Output Current VFB IFB_OUT VCOMP = 1V to 2V, VIN = 2.6V to 5.5V VIN = 3.3V, VOUT = 1.8V, L = 1µH MAX1945R, VCOMP = 1V to 2V, VIN = 2.6V to 5.5V FB Voltage Margining Output (Error Amp Only) 6 V A CTL1 = VCC, CTL2 = VCC -1 +1 CTL1 = GND, CTL2 = VCC 3 5 CTL1 = VCC, CTL2 = GND -5 -3 CTL1 = VCC, CTL2 = VCC -1 +1 CTL1 = GND, CTL2 = VCC 8 10 CTL1 = VCC, CTL2 = GND -10 -8 % VMARGIN_ MAX1945S, VCOMP = 1V to 2V, VIN = 2.6V to 5.5V FB Input Resistance FB to GND, FBSEL = GND, or VFB = 1.8V, or FBSEL = VCC, or VFB = 2.5V FB Input Bias Current FBSEL = High-Z, VFB = 0.7V 25 50 100 kΩ 0.01 0.10 µA RON_HIGH_ VIN = VBST - VLX = 3.3V LX VIN = VBST - VLX = 2.6V 26 43 30 50 RON_LOW_ VIN = 3.3V 26 43 LX VIN = 2.6V 30 50 43 54 65 LX LX On-Resistance High LX On-Resistance Low LX Current-Sense Transresistance From LX to COMP LX Current-Limit Threshold Duty cycle =100%, VIN = 2.6V/3.3V/5.5V High side 8.0 10.4 12.8 Low side -6 -4 -2 VIN = 5.5V, CTL1 = CTL2 = GND VLX = 5.5V LX Leakage Current ILEAK_LX LX Switching Frequency fSW VIN = 2.6V/3.3V LX Minimum Off-Time tOFF VIN = 2.6V/3.3V LX Maximum Duty Cycle VIN = 2.6V/3.3V LX = GND 100 -100 mΩ mΩ mΩ A µA SYNC = VCC 0.8 1.0 1.2 MHz SYNC = GND 400 500 600 kHz 120 170 ns SYNC = GND 90 SYNC = VCC 80 % _______________________________________________________________________________________ 3 MAX1945R/MAX1945S ELECTRICAL CHARACTERISTICS (continued) MAX1945R/MAX1945S 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators ELECTRICAL CHARACTERISTICS (continued) (VIN = VCC = VCTL1 = VCTL2 = VDD = 3.3V, SYNC = GND, FBSEL = High-Z, VFB = 0.7V, CREF = 0.22µF, TA = 0°C to +85°C, unless otherwise noted. Typical values are at +25°C.) PARAMETER SYMBOL LX Minimum Duty Cycle CONDITIONS VIN = 2.6V/3.3V MIN TYP SYNC = GND 5 SYNC = VCC 10 RMS LX Output Current MAX 16 6 UNITS % A FBSEL FBSEL Input Threshold 1.8V FBSEL Input Threshold 2.5V FBSEL Input Current Low FBSEL Input Current High ILOW_ FBSEL IHIGH_ FBSEL Where 1.8V feedback switches in and out, VCC = 2.6V/3.3V/5.5V FBSEL rising Where 2.5V feedback switches in and out, VCC = 2.6V/3.3V/5.5V FBSEL rising 0.16 0.22 V FBSEL falling FBSEL falling FBSEL = GND 0.08 0.14 VCC 0.22 VCC 0.14 VCC 0.16 -50 -20 FBSEL = VCC 20 VCC 0.08 V µA 50 µA CTL1 /CTL2 CTL1/CTL2 Input Threshold CTL1/CTL2 Input Current VIL_CTL_ VIH_CTL_ IIL_CTL_ IIH_CTL_ Soft-Start Period Time from Nominal to Margin High Time from Nominal to Margin Low VIN = 2.6V to 5.5V VCTL1 or VCTL2 = 0 or 5.5V, VIN = 5.5V Time required for output to ramp up 0.4 0.95 1.0 1.6 -1 +1 -1 +1 2.9 3.7 tHIGH_4% +4% 160 tHIGH_9% +9% 360 tLOW_4% -4% 450 tLOW_9% -9% 1000 4.5 V µA ms µs µs SYNC SYNC Capture Range SYNC Pulse Width SYNC Input Threshold SYNC Input Current tLO, tHI VIL_SYNC VIH_SYNC IIL, IIH VIN = 2.6V to 5.5V 0.4 VIN = 2.6V to 5.5V 250 VIN = 2.6V to 5.5V VSYNC = 0 or 5.5V, VIN = 5.5V 0.40 1.2 MHz ns 0.95 1.0 -1 1.6 V +1 µA 1.2 MHz SYNCOUT SYNCOUT Frequency Range fSYNCOUT VCC = 2.6V to 5.5V VOH_SYNC SYNCOUT Output Voltage OUT VOL_SYNC OUT 4 ISYNCOUT = ±1mA, VCC = 2.6V to 5.5V 0.4 VCC 0.4 VCC 0.05 V 0.05 _______________________________________________________________________________________ 0.40 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators (VIN = VCC = VCTL1 = VCTL2 = VDD = 3.3V, SYNC = GND, FBSEL = High-Z, VFB = 0.7V, CREF = 0.22µF, TA = 0°C to +85°C, unless otherwise noted. Typical values are at +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS THERMAL SHUTDOWN Thermal-Shutdown Hysteresis °C °C 20 Thermal-Shutdown Threshold When LX stops switching 165 ELECTRICAL CHARACTERISTICS (VIN = VCC = VCTL1 = VCTL2 = VDD = 3.3V, SYNC = GND, FBSEL = High-Z, VFB = 0.7V, CREF = 0.22µF, TA = -40°C to +85°C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 5.5 V IN/VCC Input Voltage VIN 2.6 IN Supply Current IIN SYNC = VCC (1MHz), no load VCC Supply Current ICC SYNC = VCC (1MHz) VCC = 3.3V 4 mA VDD Supply Current IDD SYNC = VCC (1MHz) VDD = 3.3V 6 mA 500 µA VIN = 3.3V 20 mA Total Shutdown Current from IN, VCC, and VDD ITOTAL VIN = VCC = VDD = VBST - VLX = 5.5V, CTL1 = CTL2 = GND VCC Undervoltage Lockout Threshold VUVLO When LX starts/stops switching VCC rising VCC falling 2.55 2.20 V VDD VDD Shutdown Supply Current IVDD VIN = VDD = VBST = 5.5V, VLX = 5.5V or 0, CTL1 = CTL2 = GND 10 µA IBST VIN = VDD = VBST = 5.5V, VLX = 5.5V or 0, CTL1 = CTL2 = GND 10 µA BST BST Shutdown Supply Current REF REF Voltage VREF REF Shutdown Resistance IREF = 0, VIN = 2.6V to 5.5V 1.96 From REF to GND, CTL1 = CTL2 = GND 2.04 V 100 Ω COMP FBSEL = High-Z COMP Clamp Voltage Low COMP Clamp Voltage High COMP Shutdown Resistance 30 85 FBSEL = GND 13.3 37.8 FBSEL = VCC 9.6 27.2 VIN = 2.6V to 5.5V, VFB = 0.9V 0.5 1.1 V VIN = 2.6V to 5.5V, VFB = 0.7V 1.90 2.40 V 100 Ω From FB to COMP, VCOMP = 1.25V COMP Transconductance VLOW_ CLAMP VHIGH_ CLAMP From COMP to GND, CTL1 = CTL2 = GND µS _______________________________________________________________________________________ 5 MAX1945R/MAX1945S ELECTRICAL CHARACTERISTICS (continued) MAX1945R/MAX1945S 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators ELECTRICAL CHARACTERISTICS (continued) (VIN = VCC = VCTL1 = VCTL2 = VDD = 3.3V, SYNC = GND, FBSEL = High-Z, VFB = 0.7V, CREF = 0.22µF, TA = -40°C to +85°C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS FB FB Regulation Voltage (Error Amp Only) Maximum Output Current VFB IFB_OUT VCOMP = 1V to 2V, VIN = 2.6V to 5.5V FBSEL = GND 1.773 1.827 FBSEL = VCC 2.462 2.538 FBSEL = High-Z 0.788 0.812 VIN = 3.3V, VOUT = 1.8V, L = 1µH MAX1945R, VCOMP = 1V to 2V, VIN = 2.6V to 5.5V FB Voltage Margining Output (Error Amp Only) 6 V A CTL1 = VCC, CTL2 = VCC -1.5 +1.5 CTL1 = GND, CTL2 = VCC 2.5 5.5 CTL1 = VCC, CTL2 = GND -5.5 -2.5 CTL1 = VCC, CTL2 = VCC -1.5 +1.5 CTL1 = GND, CTL2 = VCC 7.5 10.5 CTL1 = VCC, CTL2 = GND -10.5 -7.5 25 100 kΩ µA % VMARGIN_ MAX1945S, VCOMP = 1V to 2V, VIN = 2.6V to 5.5V FB Input Resistance FB to GND, FBSEL = GND, or VFB = 1.8V, or FBSEL = VCC, or VFB = 2.5V FB Input Bias Current FBSEL = High-Z, VFB = 0.7V 0.1 RON_ VIN = VBST - VLX = 3.3V 43 HIGH_LX VIN = VBST - VLX = 2.6V 50 RON_ LOW_LX VIN = 3.3V 43 VIN = 2.6V 50 LX LX On-Resistance High LX On-Resistance Low LX Current-Sense Transresistance From LX to COMP LX Current-Limit Threshold Duty cycle =100%, VIN = 2.6V/3.3V/5.5V VIN = 5.5V, CTL1 = CTL2 = GND VLX = 5.5V LX Leakage Current ILEAK_LX LX Switching Frequency fSW VIN = 2.6V/3.3V LX Minimum Off-Time tOFF VIN = 2.6V/3.3V LX Maximum Duty Cycle 6 VIN = 2.6V/3.3V 43 65 High side 8.0 12.8 Low side -6 -2 LX = GND 100 -100 mΩ mΩ mΩ A µA SYNC = VCC 0.8 1.2 MHz SYNC = GND 400 600 kHz 170 ns SYNC = GND 90 SYNC = VCC 80 _______________________________________________________________________________________ % 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators (VIN = VCC = VCTL1 = VCTL2 = VDD = 3.3V, SYNC = GND, FBSEL = High-Z, VFB = 0.7V, CREF = 0.22µF, TA = -40°C to +85°C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN SYNC = VCC, VIN = 2.6V/3.3V LX Minimum Duty Cycle TYP MAX UNITS 16 % FBSEL FBSEL Input Threshold 1.8V FBSEL Input Threshold 2.5V FBSEL Input Current Low ILOW_ Where 1.8V feedback switches in and out, VCC = 2.6V/3.3V/5.5V FBSEL rising Where 2.5V feedback switches in and out, VCC = 2.6V/3.3V/5.5V FBSEL rising 0.22 V FBSEL falling FBSEL falling FBSEL = GND 0.08 VCC 0.08 VCC 0.22 -50 V µA FBSEL FBSEL Input Current High IHIGH_ FBSEL FBSEL = VCC 50 µA CTL1/CTL2 CTL1/CTL2 Input Threshold CTL1/CTL2 Input Current VIL_CTL_ VIH_CTL_ IIL_CTL_ IIH_CTL_ Soft-Start Period VIN = 2.6V to 5.5V VCTL1 or VCTL2 = 0 or 5.5V, VIN = 5.5V Time required for output to ramp up 0.4 1.6 V -1 +1 -1 +1 2.9 4.5 ms 1.2 MHz µA SYNC SYNC Capture Range VIN = 2.6V to 5.5V 0.4 SYNC Pulse Width VIN = 2.6V to 5.5V 250 SYNC Input Threshold SYNC Input Current VIL_SYNC VIH_SYNC IIL, IIH VIN = 2.6V to 5.5V VSYNC = 0 or 5.5V, VIN = 5.5V ns 0.4 1.6 V -1 +1 µA 0.4 1.2 MHz SYNCOUT SYNCOUT Frequency Range fSYNCOUT VCC = 2.6V to 5.5V VOH_ SYNCOUT Output Voltage SYNCOUT VOL_ ISYNCOUT = ±1mA, VCC = 2.6V to 5.5V VCC 0.4 V 0.4 SYNCOUT Note 2: Specifications to -40°C are guaranteed by design, not production tested. Note 3: When connected together, the LX output is designed to provide 6A RMS current. _______________________________________________________________________________________ 7 MAX1945R/MAX1945S ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (VIN = VCC = 5V, VOUT = 1.8V, IOUT = 6A, fSW = 500kHz, VDD = VCC, and TA = +25°C, unless otherwise noted.) EFFICIENCY vs. OUTPUT CURRENT VIN = VCC = 5V EFFICIENCY vs. OUTPUT CURRENT VIN = VCC = 3.3V D E 50 40 A: VOUT = 0.8V B: VOUT = 1.5V C: VOUT = 1.8V D: VOUT = 2.5V E: VOUT = 3.3V 30 20 10 0 0 1 2 50 40 10 4 5 6 7 MAX1945 toc03 A B 60 40 A: VOUT = 0.8V B: VOUT = 1.5V C: VOUT = 1.8V 10 1 2 3 4 5 7 6 0 1 2 IOUT (A) FREQUENCY vs. INPUT VOLTAGE (500kHz) 540 FREQUENCY (kHz) 530 2.020 2.015 2.010 +85°C 520 +25°C 510 500 5 6 7 FREQUENCY vs. INPUT VOLTAGE (1MHz) 1.025 -40°C +85°C 1.000 +25°C 0.975 0.950 -40°C 490 2.005 4 1.050 MAX1945 toc05a 2.025 3 IOUT (A) 550 MAX1945 toc04 2.030 VIN = 2.5V, VCC = 5V fSW = 500kHz 0 0 REFERENCE VOLTAGE vs. REFERENCE SOURCE CURRENT C 50 20 VIN = VCC = 3.3V fSW = 500kHz 0 3 70 30 A: VOUT = 0.8V B: VOUT = 1.5V C: VOUT = 1.8V D: VOUT = 2.5V 20 IOUT (A) VREF (V) D C A 60 30 VIN = VCC = 5V fSW = 500kHz 80 B 70 MAX1945 toc05b A 60 90 EFFICIENCY (%) C B 80 FREQUENCY (MHz) 70 90 EFFICIENCY (%) EFFICIENCY (%) 80 100 MAX1945 toc02 90 EFFICIENCY vs. OUTPUT CURRENT VIN = 2.5V, VCC = 5V 100 MAX1945 toc01 100 0.925 480 fSW = 500kHz 2.000 470 8 12 16 20 24 28 32 36 40 0.900 2.5 3.0 3.5 4.0 4.5 5.0 5.5 4.0 4.5 5.0 VIN (V) OUTPUT LOAD REGULATION SHUTDOWN SUPPLY CURRENT vs. INPUT VOLTAGE CURRENT LIMIT vs. OUTPUT VOLTAGE 14 12 2.5V 1.5 1.0 CURRENT LIMIT (A) ISHDN (nA) 1.8V 8 6 4 11 10 9 8 0.8V 0.5 13 12 10 2.0 14 2 7 fSW = 500kHz 0 0 1 2 3 IOUT (A) 4 5 6 5.5 MAX1945 toc08 2.5 8 3.5 VIN (V) fSW = 500kHz 0 3.0 2.5 IREF (µA) MAX1945 toc07 3.0 4 MAX1945 toc06 0 ∆VOUT (mV) MAX1945R/MAX1945S 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators fSW = 500kHz 6 2.5 3.0 3.5 4.0 VIN (V) 4.5 5.0 5.5 0.8 1.3 1.8 2.3 VOUT (V) _______________________________________________________________________________________ 2.8 3.3 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators PGND-MEASURED TEMPERATURE vs. OUTPUT CURRENT 60 2.015 2.010 40 20 2.005 VCC = VIN = 5V VOUT = 1.8V 0 6.0 6.5 AMBIENT TEMP: 0°C 7.0 7.5 VIN = VCC = 5V fSW = 500kHz 2.000 8.0 -40 -15 10 35 60 85 110 MAX1945 toc11 OUTPUT SHORT-CIRCUIT CURRENT (A) 2.025 2.020 AMBIENT TEMP: +25°C 80 12 MAX1945 toc10 MAX1945 toc09 AMBIENT TEMP: +85°C 100 2.030 VREF (V) PGND-MEASURED TEMPERATURE (°C) 140 120 OUTPUT SHORT-CIRCUIT CURRENT vs. INPUT VOLTAGE REFERENCE VOLTAGE vs. TEMPERATURE 10 8 6 4 2 fSW = 500kHz 0 135 2.5 3.0 3.5 4.0 4.5 5.0 OUTPUT CURRENT (A) TEMPERATURE (°C) INPUT VOLTAGE (V) TRANSIENT RESPONSE VIN = 5V TRANSIENT RESPONSE VIN = 3.3V SWITCHING WAVEFORM VIN = 5V MAX1945 toc12 MAX1945 toc14 MAX1945 toc13 VOUT 100mV/div VOUT 100mV/div 4.5A 4.5A ILX 2A/div VOUT 100mV/div 1.5A 400ns/div 20µs/div SHUTDOWN WAVEFORMS STARTUP WAVEFORMS VLX 5V/div IOUT 1A/div IOUT 1A/div 1.5A 20µs/div 5.5 VOLTAGE MARGINING (4%) MAX1945 toc16 MAX1945 toc15 MAX1945 toc17 VOUT 0.5V/div VOUT 0.5V/div VCTL1 2V/div IIN 2A/div IIN, 2A/div VCTL1, CLT2 VOUT 100mV/div VCTL1, VCTL2 6A RESISTIVE LOAD 1ms/div 40µs/div 200µs/div _______________________________________________________________________________________ 9 MAX1945R/MAX1945S Typical Operating Characteristics (continued) (VIN = VCC = 5V, VOUT = 1.8V, IOUT = 6A, fSW = 500kHz, VDD = VCC, and TA = +25°C, unless otherwise noted.) MAX1945R/MAX1945S 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators Typical Operating Characteristics (continued) (VIN = VCC = 5V, VOUT = 1.8V, IOUT = 6A, fSW = 500kHz, VDD = VCC, and TA = +25°C, unless otherwise noted.) SHORT-CIRCUIT INDUCTOR CURRENT (EXPANDED TIME) SHORT-CIRCUIT INDUCTOR CURRENT VOLTAGE MARGINING (9%) MAX1945 toc20 MAX1945 toc19 MAX1945 toc18 VCTL1 2V/div VOUT 500mV/div VOUT 500mV/div ILX 10A/div ILX 5A/div VOUT 200mV/div 10µs/div 100ms/div 400µs/div VLX 2V/div Pin Description PIN NAME FUNCTION 1 BST Bootstrap Voltage. High-side driver supply input. Connect a 0.1µF capacitor from BST to LX. Connect a Schottky diode from IN to BST. Low-Side Driver Supply Voltage 2 VDD 3, 5, 7, 9, 20, 22, 24, 26 LX Inductor Connection. Connect an inductor between LX and the regulator output. Connect all LX pins together close to the device. 4, 6, 8, 10 IN Power-Supply Voltage. Input voltage ranges from 2.6V to 5.5V. Bypass with 3 ✕ 22µF ceramic capacitors in parallel to PGND (see the Input Capacitor Selection section). 11 VCC Supply-Voltage Input. VCC powers the device. Connect a 10Ω resistor from IN to VCC. Bypass VCC to GND with 0.1µF. 12 GND Analog Ground 13 REF Reference. Bypass REF with 0.22µF capacitor to GND. REF tracks the soft-start ramp voltage margining and is pulled to GND when the output shuts down. 14 COMP 15 FB 16 FBSEL Feedback Select Input. The device regulates to an output of 0.8V when FBSEL is left unconnected. The device regulates to an output of 1.8V when FBSEL = GND and regulates to an output of 2.5V when FBSEL = VCC. 17 SYNC Synchronization/Frequency Select. Connect SYNC to GND for 500kHz operation, to VCC for 1MHz operation, or connect to an external clock at 400kHz to 1.2MHz. 18 SYNCOUT 10 Regulator Compensation. Connect a series RC network from COMP to GND. COMP is pulled to GND when the output shuts down (see the Compensation Design section). Feedback Input. When FBSEL = High-Z, use an external resistor divider from the output to set the voltage from 0.8V to 85% of VIN. Connect FB to the output for regulation to 1.8V when FBSEL = 0, or for regulation to 2.5V when FBSEL = VCC. Synchronization Output. SYNCOUT provides a frequency output synchronized 180 degrees out-of-phase to the operating frequency of the device. ______________________________________________________________________________________ 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators PIN NAME 19, 21, 23, 25 PGND 27 CTL1 28 CTL2 EP FUNCTION Power Ground. Connect all PGND together close to the device. Star connect GND to PGND (see the PC Board Layout Considerations section). Output Margining Control Inputs. When CTL1 = CTL2 = GND, the regulator is off. When CTL1 = CTL2 = VCC, the regulator runs at nominal output voltage. When CTL1 = VCC and CTL2 = GND, the output is set to the margin-low output (-4% or -9%). When CTL1 = GND and CTL2 = VCC, the output is set to the margin-high output (+4% or +9%). Exposed Pad. Connect to PGND to improve power dissipation. Detailed Description The MAX1945R/MAX1945S high-efficiency PWM switching regulators deliver up to 6A of output current. The devices operate at a selectable fixed frequency (500kHz or 1MHz) or can be synchronized to an external frequency (400kHz to 1.2MHz). The devices operate from a 2.6V to 5.5V input supply voltage and have a selectable output voltage of 1.8V or 2.5V, or an adjustable output voltage from 0.8V to 85% of the input voltage, making the MAX1945R/MAX1945S ideal for onboard post-regulation applications. The high switching frequency allows the use of small external components. Internal synchronous rectifiers improve efficiency and eliminate the typical Schottky freewheeling diode. Total output error over load, line, and temperature is less than ±1%. Controller Function The MAX1945R/MAX1945S step-down converters use a PWM current-mode control scheme. A PWM comparator compares the integrated voltage-feedback signal against the sum of the amplified current-sense signal and the slope-compensation ramp. At each rising edge of the internal clock, the internal high-side MOSFET turns on until the PWM comparator trips. During this ontime, current ramps up through the inductor, sourcing current to the output and storing energy in the inductor. The current-mode feedback system regulates the peak inductor current as a function of the output voltage error signal. Because the average inductor current is nearly the same as the peak inductor current (<30% ripple current), the circuit acts as a switch-mode transconductance amplifier. To preserve inner-loop stability and eliminate inductor staircasing, a slope-compensation ramp is summed into the main PWM comparator. During the off-cycle, the internal high-side N-channel MOSFET turns off, and the internal low-side N-channel turns on. The inductor releases the stored energy as its current ramps down while still providing current to the output. The output capacitor stores charge when the inductor current exceeds the load current and discharges when the inductor current is lower, smoothing the voltage across the load. During an overload condition, when the inductor current exceeds the current limit (see the Current Limit section), the highside MOSFET does not turn on at the rising edge of the clock, and the low-side MOSFET remains on to let the inductor current ramp down. Current Sense An internal current-sense amplifier produces a current signal proportional to the voltage generated by the highside MOSFET on-resistance and the inductor current (RDS(ON) ✕ ILX). The amplified current-sense signal and the internal slope-compensation signal sum together at the comparator inverting input. The PWM comparator turns off the internal high-side MOSFET when this sum exceeds the COMP voltage from the error amplifier. Current Limit The internal high-side MOSFET has a current limit of 8A (min). If the current flowing out of LX exceeds this limit, the high-side MOSFET turns off and the synchronous rectifier turns on. This lowers the duty cycle and causes the output voltage to droop until the current limit is no longer exceeded. The minimum duty cycle is limited to 10%. A synchronous rectifier current limit of 2A minimum protects the device from current flowing into LX. When the negative current limit is exceeded, the device turns off the synchronous rectifier, forcing the inductor current to flow through the high-side MOSFET body diode and back to the input, until the beginning of the next cycle, or until the inductor current drops to zero. The MAX1945R/MAX1945S use a pulse-skip mode to prevent overheating during short-circuit output conditions. The device enters pulse-skip mode when the FB voltage drops below 300mV, limiting the current and reducing power dissipation. Normal operation resumes upon removal of the short-circuit condition. ______________________________________________________________________________________ 11 MAX1945R/MAX1945S Pin Description (continued) MAX1945R/MAX1945S 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators Soft-Start Shutdown Mode The MAX1945R/MAX1945S employs digital soft-start to reduce supply in-rush current during startup conditions. When the device exits undervoltage lockout (UVLO), shutdown mode, or restarts following a thermal-overload event, the digital soft-start circuitry slowly ramps up the voltages at REF and FB (see the Typical Operating Characteristics). An internal oscillator sets the soft-start time to 3.7ms (typ). Use a of 0.22µF capacitor (min) to reduce the susceptibility to switching noise. Drive CTL1 and CTL2 to ground to shut down the MAX1945R/MAX1945S. In shutdown mode, the internal MOSFETs stop switching and LX goes to high impedance; REF and COMP go to ground. Voltage Margining The MAX1945R/MAX1945S provide selectable voltage margining. The MAX1945R provides ±4% voltage margining, and the MAX1945S provides ±9% voltage margining. CTL1 and CTL2 set the voltage margins (Table 1). Undervoltage Lockout (UVLO) When VCC drops below 2.35V, the UVLO circuit inhibits switching. Once VCC rises above 2.4V, UVLO clears and the soft-start function activates. Table 1. Setting Voltage Margin Bootstrap (BST) A capacitor connected between BST and LX and a Schottky diode connected from IN to BST generate the gate drive for the internal high-side N-channel MOSFET. When the low-side N-channel MOSFET is on, LX goes to PGND. IN charges the bootstrap capacitor through the Schottky diode. When the low-side N-channel MOSFET turns off and the high side N-channel MOSFET turns on, VLX goes to VIN. The Schottky diode prevents the capacitor from discharging into IN. Frequency Select (SYNC) The MAX1945R/MAX1945S operate in PWM mode with a selectable fixed frequency or synchronized to an external frequency. The devices switch at a frequency of 500kHz when SYNC is connected to ground. The devices switch at 1MHz with SYNC connected to VCC. Apply an external frequency of 400kHz to 1.2MHz with 10% to 90% duty cycle at SYNC to synchronize the switching frequency of MAX1945R/MAX1945S. CTL1 Voltage Margin CTL2 VOUT MAX1945R MAX1945S 0V 0V OFF OFF VCC VCC NOMINAL NOMINAL VCC 0V -4% -9% 0V VCC +4% +9% Thermal Protection Thermal-overload protection limits total power dissipation in the device. When the junction temperature (TJ) exceeds 165°C, a thermal sensor forces the device into shutdown, allowing the die to cool. The thermal sensor turns the device on again after the junction temperature cools by 20°C, causing a pulsed output during continuous overload conditions.The soft-start sequence begins after a thermal-shutdown condition. Design Procedure Output Voltage Select VCC Decoupling The MAX1945R/MAX1945S feature selectable fixed and adjustable output voltages. With FB connected to the output, the output voltage is 1.8V when FBSEL is at GND and 2.5V when FBSEL is at VCC (Figure 1). When FBSEL is floating, connect FB to an external resistor divider from V OUT to GND to set the output voltage from 0.8V to 85% of VIN (Figure 2). Select R2 in the 1kΩ to 10kΩ range. Calculate R1 using the following equation: Because of the high switching frequency and tight output tolerance, decouple VCC with 0.1µF capacitor from VCC to GND with a 10Ω resistor from VCC to IN. Place the capacitor as close to VCC as possible. V R1 = R2 OUT VFB where VFB = 0.8V. 12 − 1 Inductor Design Choose an inductor with the following equation: L= VOUT × (VIN − VOUT ) fOSC × VIN × LIR × IOUT(MAX) where LIR is the ratio of the inductor ripple current to average continuous current at a minimum duty cycle. Choose LIR between 20% to 40% of the maximum load current for best performance and stability. ______________________________________________________________________________________ 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators LIR IPEAK = 1 + IOUT(MAX) 2 Example: VIN = 3.3V IOUT(MAX) = 6A LIR = 30% L = 1µH COUT = 180µF ESR(OUTPUT CAPACITOR) = 30mΩ ESL(OUTPUT CAPACITOR) = 2.5nH VRIPPLE(C) = 2mV VRIPPLE(ESR) = 45mV VRIPPLE(ESL) = 4mV VRIPPLE = 51mV VOUT = 1.8V fOSC = 500kHz IOUT(MAX) = 6A LIR = 30% L = 1µH and IPEAK = 6.9A Output Capacitor Selection The key selection parameters for the output capacitor are capacitance, ESR, ESL, and voltage rating requirements. These affect the overall stability, output ripple voltage, and transient response of the DC-DC converter. The output ripple occurs because of variations in the charge stored in the output capacitor, the voltage drop due to the capacitor’s ESR, and the voltage drop due to the capacitor’s ESL. Calculate the output voltage ripple due to the output capacitance, ESR, and ESL as: VRIPPLE = VRIPPLE(C) + VRIPPLE(ESR) + VRIPPLE(ESL) where the output ripple due to output capacitance, ESR, and ESL are: Use these equations for initial capacitor selection. Determine final values by testing a prototype or an evaluation circuit. A smaller ripple current results in less output voltage ripple. Because the inductor ripple current is a factor of the inductor value, the output voltage ripple decreases with a larger inductance. Use ceramic capacitors for low ESR and low ESL at the switching frequency of the converter. The low ESL of ceramic capacitors makes ripple voltages negligible. Load transient response depends on the selected output. During a load transient, the output instantly changes by ESR ✕ ILOAD. Before the controller can respond, the output deviates further, depending on the inductor and output capacitor values. After a short time (see the Transient Response graphs in the Typical Operating Characteristics), the controller responds by regulating the output voltage back to its predetermined value. The controller response time depends on the closed-loop bandwidth. A higher bandwidth yields a faster response time, preventing the output from deviating further from its regulating value. Input Capacitor Selection VRIPPLE(C) = IP-P/(8 ✕ COUT ✕ fSW), VRIPPLE(ESR) = IP-P ✕ ESR VRIPPLE(ESL) = (IP-P/tON) ✕ ESL or (IP-P/tOFF) ✕ ESL, whichever is greater The peak inductor current (IP-P) is: IP-P = ((VIN - VOUT)/(fSW ✕ L )) ✕ (VOUT/VIN) Example: VIN = 3.3V VOUT = 1.8V fOSC = 500kHz The input capacitor reduces the current peaks drawn from the input power supply and reduces switching noise in the IC. The impedance of the input capacitor at the switching frequency should be less than that of the input source so that high-frequency switching currents do not pass through the input source but instead are shunted through the input capacitor. A high source impedance requires larger input capacitance. The input capacitor must meet the ripple current requirement imposed by the switching currents. The RMS input ripple current is given by: V OUT × (VIN − VOUT ) IRIPPLE = ILOAD × VIN where IRIPPLE is the input RMS ripple current. ______________________________________________________________________________________ 13 MAX1945R/MAX1945S Use a low-loss inductor with the lowest possible DC resistance that fits in the allotted dimensions. Ferrite core types are often the best choice for performance. With any core material the core must be large enough not to saturate at the peak inductor current (IPEAK). MAX1945R/MAX1945S 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators Compensation Design The double pole formed by the inductor and the output capacitor of most voltage-mode controllers introduces a large phase shift, which requires an elaborate compensation network to stabilize the control loop. The MAX1945R/MAX1945S controllers utilize a currentmode control scheme that regulates the output voltage by forcing the required current through the external inductor, eliminating the double pole caused by the inductor and output capacitor, and greatly simplifying the compensation network. A simple Type 1 compensation with a single compensation resistor (RC) and compensation capacitor (CC) creates a stable and high bandwidth loop (Figure 1). An internal transconductance error amplifier compensates the control loop. Connect a series resistor and capacitor between COMP (the output of the error amplifier) and GND, to form a pole-zero pair. The external inductor, internal current-sense circuitry, output capacitor, and external compensation circuit determine the loop-system stability. Choose the inductor and output capacitor based on performance, size, and cost. Additionally, select the compensation resistor and capacitor to optimize control-loop stability. The component values shown in the typical application circuit yield stable operation over a broad range of input-to-output voltages. Compensating the voltage feedback loop depends on the type of output capacitors used. Common capacitors for output filtering: ceramic capacitors, polymer capacitors such as POSCAPs and SPCAPs, and electrolytic capacitors. Use either ceramic or polymer capacitors. Use polymer capacitors as the output capacitor when selecting 500kHz operation. At 500kHz switching, the voltage feedback loop is slower (about 50kHz to 60kHz) when compared to 1MHz switching. Therefore, a polymer capacitor’s high capacitance for a given footprint improves the output response during a step load change. Because of its relative low ESR frequencies (about 20kHz to 80kHz), use Type 2 compensation. The additional high-frequency pole introduced in Type 2 compensation offsets the ESR zero introduced by the polymer capacitors to provide continuous attenuation above the ESR zero frequencies of the polymer capacitors. However, the presence of the parasitic capacitance at COMP and the high output impedance of the error amplifier already provide the required attenuation above the ESR frequencies. The following steps outline the design process of compensating the MAX1945 with polymer output capacitors with the components in the application circuits Figures 1 and 2. 14 Regulator DC Gain: GDC = ∆VOUT/∆VCOMP = gmc ✕ ROUT Load Impedance Pole Frequency: fpLOAD = 1/(2 ✕ π ✕ COUT ✕ (ROUT + RESR)) Load Impedance Zero Frequency: fzESR = 1/(2 ✕ π ✕ COUT ✕ RESR) where ROUT = VOUT/IOUT(MAX), and gmc = 18.2S. The feedback divider has a gain of GFB = VFB/VOUT, where VFB = 0.8V. The transconductance error amplifier has a DC gain, GEA(DC), of 70dB. The compensation capacitor, CC, and the output resistance of the error amplifier, ROEA (20MΩ), set the dominant pole. CC and RC set a compensation zero. Calculate the dominant pole frequency as: fp = 1/(2π ✕ CC ✕ ROEA) Determine the compensation zero frequency as: fzEA = 1/(2π ✕ CC ✕ RC) For best stability and response performance, set the closed-loop unity-gain frequency much higher than the load-impedance pole frequency. The closed-loop unitygain crossover frequency must be less than one-fifth of the switching frequency. Set the crossover frequency to 10% to 15% of the switching frequency. The loop-gain equation at unity-gain frequency, fC, is given by: GEA ✕ GDC ✕ (fPLOAD/fC) ✕ (VFB/VOUT) = 1 where G EA = gm EA ✕ R C , and gm EA = 50µS, the transconductance of the voltage-error amplifier. Calculate RC as: RC = (VOUT ✕ fC)/(gmEA ✕ VFB✕ ✕ GDC ✕ fPLOAD) ______________________________________________________________________________________ 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators CC = (COUT ✕ ROUT)/RC 500kHz Switching The following design example is for the application circuit shown in Figures 1 and 2: VOUT = 1.8V IOUT(MAX) = 6A COUT = 180µF RESR = 0.04Ω gmEA = 50µs gmc = 18.2s fSWITCH = 500kHz ROUT = VOUT/IOUT(MAX) = 1.8V/6 A = 0.3Ω fpDC = 1/(2π ✕ COUT ✕ (ROUT + RESR) = 1/(2 π ✕ 180 ✕ 10-6 ✕ (0.3 + 0.04) = 2.6kHz. fzESR = 1/(2π ✕ COUT RESR) = 1/(2 π ✕ 180 ✕10-6 ✕ 0.04) = 22.1kHz. Pick the closed-loop unity-gain crossover frequency (fc) at 60kHz. Determine the switching regulator DC gain: GDC = gmc ✕ ROUT = 18.2 ✕ 0.3 = 5.46 then: RC = (VOUT ✕ fC)/(gmEA ✕ VFB ✕ GDC ✕ fpLOAD) = (1.8 ✕ 60kHz)/(50 ✕ 10-6 ✕ 0.8 ✕ 5.46 ✕ 2.6kHz) ≈ 190kΩ (1%), choose RC = 180kΩ, 1% 1MHz Switching Following procedure outlines the compensation process of the MAX1945 for 1MHz operation with all ceramic output capacitors (Figure 3). The basic regulator loop consists of a power modulator, an output-feedback divider, and an error amplifier. The switching regulator has a DC gain set by gmc ✕ ROUT, where gmc is the transconductance from the output voltage of the error amplifier to the output inductor current. The load impedance of the switching modulator consists of a pole-zero pair set by R OUT , the output capacitor (COUT), and its ESR. The following equations define the power train of the switching regulator: Regulator DC Gain: GDC = ∆VOUT/∆VCOMP = gmc ✕ ROUT Load-Impedance Pole Frequency: fpLOAD = 1/(2 ✕ π ✕ COUT ✕ (ROUT +RESR)) Load-Impedance Zero Frequency: fzESR = 1/(2 ✕ π ✕ COUT ✕ RESR) where, ROUT = VOUT/IOUT(MAX), and gmc = 18.2. The feedback divider has a gain of GFB = VFB/VOUT, where VFB is equal to 0.8V. The transconductance error amplifier has a DC gain, GEA(DC), of 70dB. The compensation capacitor, CC, and the output resistance of the error amplifier, ROEA (20MΩ), set the dominant pole. C C and R C set a compensation zero. Calculate the dominant pole frequency as: fpEA = 1/(2π ✕ CC ✕ ROEA) Determine the compensation zero frequency as: CC = (COUT ✕ (ROUT + RESR))/RC = (180uF ✕ (0.3 + 0.04))/180kΩ ≈ 340pF, choose CC = 330pF, 10% Table 2 shows the recommended values for RC and CC for different output voltages. fzEA = 1/(2π ✕ CC ✕ RC) For best stability and response performance, set the closed-loop unity-gain frequency much higher than the load impedance pole frequency. In addition, set the closed-loop unity-gain crossover frequency less than one-fifth of the switching frequency. However, the maxi- Table 2. Compensation Values for Output Voltages (500kHz) VOUT (V) 0.8 1.2 1.8 2.5 3.3 RC 110kΩ 147kΩ 180kΩ 287kΩ 365kΩ CC 330pF 330pF 330pF 220pF 220pF ______________________________________________________________________________________ 15 MAX1945R/MAX1945S Set the error-amplifier compensation zero formed by RC and CC equal to the load-impedance pole frequency, fPLOAD, at maximum load. Calculate CC as: MAX1945R/MAX1945S 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators Table 3. Compensation Values for Output Voltages (1MHz) VOUT (V) 0.8 1.2 1.8 2.2 3.3 RC (1%) 100kΩ 100kΩ 178kΩ 178kΩ 249kΩ CC (10%) 330pF 330pF 100pF 100pF 100pF mum zero-crossing frequency should be less than onethird of the load-impedance zero frequency, fzESR. The previous requirement on the ESR zero frequency applies to ceramic output capacitors. The loop-gain equation at unity-gain frequency, fC, is given by: GEA(fc) ✕ GDC ✕ (fPLOAD/fC) ✕ (VFB/VOUT) = 1 where G EA(fc) = gm EA ✕ R C , and gm EA = 50µ, the transconductance of the voltage error amplifier. Calculate RC as: RC = (VOUT ✕ fC)/(gmEA ✕ VFB✕ ✕ GDC ✕ fPLOAD) Set the error-amplifier compensation zero formed by RC and CC equal to the load-impedance pole frequency, fPLOAD, at maximum load. Calculate CC as follows: CC = (COUT ✕ ROUT)/RC As the load current decreases, the load-impedance pole also decreases; however, the switching regulator DC gain increases accordingly, resulting in a constant closed-loop unity-gain frequency. Table 3 shows the values for RC and CC at various output voltages. The values are based on 2 ✕ 47µF output capacitors and a 0.68µH output inductance. For COUT = 2 ✕ 47µF and L = 0.68µH. Decrease RC accordingly when using large values of COUT or L. VOUT = 1.8V IOUT(MAX) = 6A COUT = 2 ✕ 47µF RESR = 0.005Ω gmEA = 50µ gmc = 18.2s fSWITCH = 1.0MHz ROUT = VOUT/IOUT(MAX) = 1.8V/6A= 0.3Ω fpDC = [1/(2π ✕ COUT ✕ (ROUT + RESR))] = [1/(2 94 ✕ 10-6 ✕ (0.3 + 0.005))] = 5.554kHz ✕ π ✕ Applications Information 0.1µF 10V BAT54A 0.1µF 10V BAT54A 1µH INPUT: 2.6V TO 5.5V BST 100µF 8V RIN OUTPUT: 1.8V, 6A LX IN VDD VCC MAX1945R MAX1946S 180µF 4V RIN 100µF 8V CTL2 COMP CC VOUT 180µF 4V PGND R1 SYNCOUT CTL2 FB FB RC COMP FBSEL R2 REF GND 0.22µF 10V Figure 1. Typical Application Circuit (Fixed Output Voltage) 16 MAX1945R MAX1946S VCC SYNCOUT FBSEL SYNC VDD CTL1 CIN RC LX IN PGND CTL1 CIN 1µH BST INPUT: 2.6V TO 5.5V CC REF SYNC GND 0.22µF 10V Figure 2. Typical Application Circuit (Adjustable Output Voltage) ______________________________________________________________________________________ 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators GDC = gmc ✕ ROUT = 18.2 ✕ 0.3 = 5.46 then: RC = (VOUT ✕ fC)/(gmEA ✕ VFB ✕ GDC ✕ fpLOAD) = (1.8 ✕ 120kHz)/(50 ✕ 10-6 ✕ 0.8 ✕ 5.46 ✕ 5.554kHz) ≈ 178kΩ (1%) CC = (COUT ✕ ROUT)/RC =(94µF ✕ 0.3)/178kΩ ≈ 156pF, choose CC = 100pF, 10% Output Inductor: 0.68µH/12A, 5mΩ ESR (max), Coilcraft DS3316P-681 PC Board Layout Considerations Careful PC board layout is critical to achieve clean and stable operation. The switching power stage requires particular attention. Follow these guidelines for good PC board layout: 1) Place decoupling capacitors as close to the IC as possible. Keep power ground plane (connected to PGND) and signal ground plane (connected to GND) separate. Star connect both ground plane at output capacitor. 2) Connect input and output capacitors to the power ground plane; connect all other capacitors to the signal ground plane. 3) Keep the high-current paths as short and wide as possible. Keep the path of switching current short and minimize the loop area formed by the high-side MOSFET, the low side MOSFET, and the input capacitors. Avoid vias in the switching paths. 4) Connect IN, LX, and PGND separately to a large copper area to help cool the IC to further improve efficiency and long-term reliability. Output Capacitor C5: 2XJMK432BJ476MM Input Capacitor C1: LMK432BJ226MM 5) Ensure all feedback connections are short and direct. Place the feedback resistors as close to the IC as possible. VCC = 3.3V OR 5V C4 1µF 6) Route high-speed switching nodes away from sensitive analog areas (FB, COMP). D1 IN BST C3 0.1µF IN IN VIN = 2.5V MAX1945R MAX1945S LX Chip Information LX TRANSISTOR COUNT: 5000 PROCESS: BiCMOS IN LX R1 10Ω VDD LX 1.8V, 6A VCC C1 3 x 22µF L1 0.68µF LX LX CTL1 LX CTL2 C6 0.1µF LX SYNCOUT FB C5 2 x 47µF SYNC REF COMP CC 100pF GND PGND PGND PGND PGND GND RC 178kΩ FBSEL C4 0.22µF PGND Figure 3. Typical Application Circuit with all ceramic capacitors (1MHz) ______________________________________________________________________________________ 17 MAX1945R/MAX1945S fzESR = [1/(2π ✕ COUT RESR)] = [1/(2 ✕ π ✕ 94 ✕10-6 ✕ 0.005)] = 339kHz. For a 0.68µH output inductor, choose the closed-loop unity-gain crossover frequency (f c ) at 120kHz. Determine the switching regulator DC gain: 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators MAX1945R/MAX1945S Functional Diagram IN BST N SYNCOUT AC DETECT OSCILLATOR SYNC LX PWM CONTROL LOGIC VDD CTL1 COUNT (8 BIT) CONTROL N CTL2 PGND 8 VCC 8 BIT DAC REFERENCE 2X REF GND 3R COMP FB 2R EAMP FB MAX1945R MAX1945S FBSEL Pin Configuration TOP VIEW BST 1 28 CTL2 VDD 2 27 CTL1 LX 3 26 LX IN 4 25 PGND 24 LX LX 5 IN 6 MAX1945R MAX1945S 23 PGND LX 7 22 LX IN 8 21 PGND LX 9 20 LX IN 10 19 PGND VCC 11 18 SYNCOUT GND 12 17 SYNC REF 13 16 FBSEL COMP 14 15 FB 28 TSSOP-EP 18 ______________________________________________________________________________________ 1MHz, 1% Accurate, 6A Internal Switch Step-Down Regulators TSSOP, 4.0,EXP PADS.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19 © 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX1945R/MAX1945S Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)