19-4815; Rev 0; 7/09 Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches The MAX15041 low-cost, synchronous DC-DC converter with internal switches delivers an output current up to 3A. The MAX15041 operates from an input voltage of 4.5V to 28V and provides an adjustable output voltage from 0.6V to 90% of VIN, set with two external resistors. The MAX15041 is ideal for distributed power systems, preregulation, set-top boxes, television, and other consumer applications. The MAX15041 features a peak-current-mode PWM controller with internally fixed 350kHz switching frequency and a 90% maximum duty cycle. The current-mode control architecture simplifies compensation design, and ensures a cycle-by-cycle current limit and fast response to line and load transients. A high-gain transconductance error amplifier allows flexibility in setting the external compensation by using a type III compensation scheme, thereby allowing the use of all ceramic capacitors. This synchronous buck regulator features internal MOSFETs that provide better efficiency than asynchronous solutions, while simplifying the design relative to discrete controller solutions. In addition to simplifying the design, the integrated MOSFETs minimize EMI, reduce board space, and provide higher reliability by minimizing the number of external components. The MAX15041 also features thermal shutdown and overcurrent protection (high-side sourcing and low-side sinking), and an internal 5V LDO with undervoltage lockout. In addition, this device ensures safe startup when powering into a prebiased output. Other features include an externally adjustable soft-start that gradually ramps up the output voltage and reduces inrush current. Independent enable control and powergood signals allow for flexible power sequencing. The MAX15041 is available in a space-saving, highpower, 3mm x 3mm, 16-pin TQFN-EP package and is fully specified from -40°C to +85°C. Features ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ Up to 3A of Continuous Output Current ±1% Output Accuracy Over Temperature 4.5V to 28V Input Voltage Range Adjustable Output Voltage Range from 0.606V to 0.9 x VIN Internal 170mΩ RDS-ON High-Side and 105mΩ RDS-ON Low-Side Power Switches Fixed 350kHz Switching Frequency Up to 93% Efficiency Cycle-By-Cycle Overcurrent Protection Programmable Soft-Start Stable with Low-ESR Ceramic Output Capacitors Safe Startup into Prebiased Output Enable Input and Power-Good Output Fully Protected Against Overcurrent and Overtemperature VDD LDO Undervoltage Lockout Space-Saving, Thermally Enhanced, 3mm x 3mm Package Ordering Information PART MAX15041ETE+ TEMP RANGE -40°C to +85°C 16 TQFN-EP* INPUT 12V IN BST OUTPUT 1.8V AT 3A EN MAX15041 LX VDD Wall Adapters PGND Preregulators Set-Top Boxes Consumer Products AGV Typical Operating Circuit Distributed Power Systems xDSL Modems TOP MARK +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. Applications Televisions PINPACKAGE PGOOD PGOOD FB SS COMP SGND Pin Configuration appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX15041 General Description MAX15041 Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches ABSOLUTE MAXIMUM RATINGS IN to SGND.............................................................-0.3V to +30V EN to SGND .................................................-0.3V to (VIN + 0.3V) LX to PGND ................................-0.3V to min (+30V, VIN + 0.3V) LX to PGND .....................-1V to min (+30V, VIN + 0.3V) for 50ns PGOOD to SGND .....................................................-0.3V to +6V VDD to SGND............................................................-0.3V to +6V COMP, FB, SS to SGND..............-0.3V to min (+6V, VDD + 0.3V) BST to LX .................................................................-0.3V to +6V BST to SGND .........................................................-0.3V to +36V SGND to PGND ....................................................-0.3V to +0.3V LX Current (Note 1) ....................................................-5A to +8A Converter Output Short-Circuit Duration ...................Continuous Continuous Power Dissipation (TA = +70°C) 16-Pin TQFN-EP (derate 14.7mW/°C above +70°C) Multilayer Board .........................................................1666mW Package Thermal Resistance (Note 2) θJA ................................................................................48°C/W θJC ..................................................................................7°C/W Operating Temperature Range ..........................-40°C to +85°C Junction Temperature .....................................................+150°C Storage Temperature Range ............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Note 1: LX has internal clamp diodes to PGND and IN. Applications that forward bias these diodes should take care not to exceed the IC’s package power dissipation. Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = 12V, CVDD = 1µF, CIN = 22µF, TA = TJ = -40°C to +85°C, typical values are at TA = +25°C, unless otherwise noted.) (Note 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 28 V mA STEP-DOWN CONVERTER Input-Voltage Range VIN Input Supply Current IIN Shutdown Input Supply Current 4.5 Switching 2.1 4 VEN = 0V, VDD regulated by internal 2 12 VEN = 0V, VIN = VDD = 5V 18 28 µA ENABLE INPUT EN Shutdown Threshold Voltage VEN_SHDN EN Shutdown Voltage Hysteresis VEN_HYST EN Lockout Threshold Voltage EN Input Current VEN_LOCK VEN rising VEN rising 1.7 VEN_LOCK_HYST VEN falling 1.4 V 100 mV 1.95 2.15 100 V mV IEN VEN = 2.9V 2 5.3 9 µA VPGOOD_TH VFB rising 540 560 584 mV POWER-GOOD OUTPUT PGOOD Threshold PGOOD Threshold Hysteresis VPGOOD_HYST PGOOD Output Low Voltage VPGOOD_OL IPGOOD = 5mA, VFB = 0.5V 35 IPGOOD VPGOOD = 5V, VFB = 0.7V 10 nA 1.6 mS PGOOD Leakage Current 15 mV 100 mV ERROR AMPLIFIER Error Amplifier Transconductance gMV Error Amplifier Voltage Gain AVEA FB Set-Point Accuracy VFB FB Input Bias Current IFB 2 90 600 606 dB 612 VFB = 0.5V -100 +100 VFB = 0.7V -100 +100 _______________________________________________________________________________________ mV nA Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches (VIN = 12V, CVDD = 1µF, CIN = 22µF, TA = TJ = -40°C to +85°C, typical values are at TA = +25°C, unless otherwise noted.) (Note 3) PARAMETER SYMBOL CONDITIONS SS Current ISS VSS = 0.45V, sourcing SS Discharge Resistance RSS ISS = 10mA, sinking, VEN = 1.6V MIN TYP MAX UNITS 4.5 5 5.5 µA SS Prebiased Mode Stop Voltage Current Sense to COMP Transconductance GMOD COMP Clamp Low VFB = 0.7V PWM Compensation Ramp Valley 6 Ω 0.65 V 9 S 0.68 V 830 mV PWM CLOCK Switching Frequency fSW Maximum Duty Cycle D 315 Minimum Controllable On-Time 350 385 kHz 90 % 150 ns INTERNAL LDO OUTPUT (VDD) VDD Output Voltage VDD IVDD = 1mA to 25mA, VIN = 6.5V 4.75 5.1 30 80 5.5 V VDD Short-Circuit Current VIN = 6.5V LDO Dropout Voltage IVDD = 25mA, VDD drops by -2% 50 600 mV VDD rising 4 4.25 V VDD Undervoltage Lockout Threshold VUVLO_TH VDD Undervoltage Lockout Hysteresis VUVLO_HYST mA 150 mV POWER SWITCH LX On-Resistance High-side switch, ILX = 1A 170 305 Low-side switch, ILX = 1A 105 175 6 7.2 High-Side Switch Source Current-Limit Threshold 5 Low-Side Switch Sink Current-Limit Threshold LX Leakage Current BST Leakage Current -3 VBST = 33V, VIN = VLX = 28V 10 VBST = 5V, VIN = 28V, VLX = 0V 10 VBST = 33V, VIN = VLX = 28V 10 mΩ A A nA nA THERMAL SHUTDOWN Thermal-Shutdown Threshold Thermal-Shutdown Hysteresis Rising +155 °C 20 °C HICCUP PROTECTION Blanking Time 16 x SoftStart Time Note 3: Specifications are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by design and characterization. _______________________________________________________________________________________ 3 MAX15041 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (VIN = 12V, VOUT = 3.3V, CVDD = 1µF, CIN = 22µF, TA = +25°C, circuit of Figure 3 (see Table 1 for values), unless otherwise specified.) EFFICIENCY vs. LOAD CURRENT VOUT = 5.0V 75 VOUT = 3.3V 70 VOUT = 2.5V 65 VOUT = 1.8V VOUT = 1.2V 60 55 50 85 80 75 VOUT = 3.3V 70 65 VOUT = 2.5V 60 VOUT = 1.8V 55 VOUT = 1.2V 50 0.5 1.0 1.5 2.0 3.0 2.5 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 0 0.5 1.0 1.5 2.0 3.0 2.5 0 0.5 1.0 1.5 2.5 LOAD CURRENT (A) LOAD CURRENT (A) LOAD-TRANSIENT WAVEFORMS NORMALIZED OUTPUT VOLTAGE vs. TEMPERATURE NORMALIZED OUTPUT VOLTAGE vs. TEMPERATURE 1.002 ILOAD 2A/div VOUT AC-COUPLED 200mV/div VPGOOD 5V/div NORMALIZED OUTPUT VOLTAGE ILOAD = 0A 1.001 1.000 0.999 0.998 0.997 1.004 ILOAD = 2A NORMALIZED OUTPUT VOLTAGE MAX15041 toc04 0.996 -40 1.002 1.000 0.998 0.996 0.994 -15 10 35 -15 -40 85 60 10 SWITCHING FREQUENCY vs. INPUT VOLTAGE FB SET POINT vs.TEMPERATURE 606 604 MAX15041 toc08 MAX15041 toc07 385 375 FREQUENCY (kHz) FB SET POINT (mV) 608 35 TEMPERATURE (NC) TEMPERATURE (NC) 610 365 355 345 TA = +85NC 335 TA = +25NC TA = -40NC 602 325 600 315 -40 -15 10 35 TEMPERATURE (NC) 60 85 3.0 0.992 0.995 200µs/div 4 2.0 LOAD CURRENT (A) MAX15041 toc05 0 0 MAX15041 toc06 80 EFFICIENCY (%) 85 MAX15041 toc03 90 OUTPUT-VOLTAGE REGULATION (%) 90 VIN = 5V 95 0.2 MAX15041 toc02 100 MAX15041 toc01 VIN = 12V 95 OUTPUT-VOLTAGE REGULATION vs. LOAD CURRENT EFFICIENCY vs. LOAD CURRENT 100 EFFICIENCY (%) MAX15041 Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches 0 5 10 15 20 INPUT VOLTAGE (V) _______________________________________________________________________________________ 25 60 85 Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches INPUT SUPPLY CURRENT vs. INPUT VOLTAGE 13 12 8 7 6 5 4 3 2 11 4.0 MAX15041 toc11 9 SHUTDOWN CURRENT (FA) 14 10 MAX15041 toc10 L = 4.7FH ILOAD = 0A SHUTDOWN CURRENT (FA) MAX15041 toc09 INPUT SUPPLY CURRENT (mA) 16 15 SHUTDOWN CURRENT vs. TEMPERATURE SHUTDOWN CURRENT vs. INPUT VOLTAGE 3.5 3.0 2.5 2.0 1.5 1 1.0 0 10 0 5 10 15 20 0 25 5 10 15 20 25 -40 -15 SHUTDOWN WAVEFORMS 10 35 85 OUTPUT SHORT-CIRCUIT WAVEFORMS MAX15041 toc12 MAX15041 toc13 VEN 5V/div VOUT 2V/div IIN 5A/div VOUT 2V/div IL 5A/div IL 2A/div VPGOOD 5V/div 100µs/div VSS 2V/div 10µs/div SOFT-START WAVEFORMS SWITCHING WAVEFORMS MAX15041 toc15 MAX15041 toc14 VEN 5V/div VLX 10V/div VOUT 2V/div IL 2A/div IL 2A/div VOUT AC-COUPLED 50mV/div 1µs/div 60 TEMPERATURE (NC) INPUT VOLTAGE (V) INPUT VOLTAGE (V) VPGOOD 5V/div 400µs/div _______________________________________________________________________________________ 5 MAX15041 Typical Operating Characteristics (continued) (VIN = 12V, VOUT = 3.3V, CVDD = 1µF, CIN = 22µF, TA = +25°C, circuit of Figure 3 (see Table 1 for values), unless otherwise specified.) Typical Operating Characteristics (continued) (VIN = 12V, VOUT = 3.3V, CVDD = 1µF, CIN = 22µF, TA = +25°C, circuit of Figure 3 (see Table 1 for values), unless otherwise specified.) SOFT-START TIME vs. CAPACITANCE STARTUP INTO PREBIASED OUTPUT MAX15041 toc17 SOFT-START TIME (ms) MAX15041 toc16 1000 VEN 5V/div 100 VOUT 2V/div 10 IL 2A/div 1 IOUT 2A/div 0.1 1 10 100 400µs/div 1000 CSS (nF) MAX15041 toc18 VEN 5V/div VOUT 2V/div IL 5A/div IOUT 5A/div MAXIMUM LOAD CURRENT (A) 3.2 MAX15041 toc19 MAXIMUM LOAD CURRENT vs. AMBIENT TEMPERATURE STARTUP INTO PREBIASED OUTPUT VIN = 5V TJ P +150NC 3.0 2.8 VOUT = 3.3V 2.6 VOUT = 2.5V 2.4 VOUT = 1.8V VOUT = 1.2V 2.2 2.0 5 400µs/div 15 25 35 45 55 65 75 85 AMBIENT TEMPERATURE (NC) VIN = 12V TJ P +150NC 3.0 2.8 VOUT = 3.3V VOUT = 2.5V 2.6 VOUT = 1.8V 2.4 VOUT = 1.2V VIN = 28V TJ P +150NC 3.0 2.8 VOUT = 1.2V 2.6 VOUT = 3.3V VOUT = 2.5V 2.4 VOUT = 1.8V 2.2 2.2 2.0 2.0 5 15 25 35 45 55 65 AMBIENT TEMPERATURE (NC) 6 3.2 MAXIMUM LOAD CURRENT (A) MAX15041 toc20 3.2 MAX15041 toc21 MAXIMUM LOAD CURRENT vs. AMBIENT TEMPERATURE MAXIMUM LOAD CURRENT vs. AMBIENT TEMPERATURE MAXIMUM LOAD CURRENT (A) MAX15041 Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches 75 85 5 15 25 35 45 55 65 75 AMBIENT TEMPERATURE (NC) _______________________________________________________________________________________ 85 Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches DEVICE POWER DISSIPATION vs. LOAD CURRENT DEVICE POWER DISSIPATION vs. LOAD CURRENT VOUT = 3.3V VOUT = 2.5V VOUT = 1.8V 1.5 VIN = 5V 2.5 POWER DISSIPATION (W) POWER DISSIPATION (W) 2.5 VOUT = 1.2V 1.0 MAX15041 toc23 VIN = 12V 2.0 3.0 MAX15041 toc22 3.0 VOUT = 3.3V VOUT = 2.5V 2.0 VOUT = 1.8V VOUT = 1.2V 1.5 1.0 0.5 0.5 0 0 0 0.5 1.0 1.5 2.0 2.5 0 3.0 0.5 1.0 1.5 2.0 2.5 3.0 LOAD CURRENT (A) LOAD CURRENT (A) Pin Description PIN NAME FUNCTION 1 VDD 2 PGOOD 3 EN 4 COMP 5 FB Feedback Input. Connect FB to the center tap of an external resistor-divider from the output to SGND to set the output voltage from 0.606V to 90% of VIN. 6 SS Soft-Start Input. Connect a capacitor from SS to SGND to set the soft-start time (see the Setting the SoftStart Time section). 7 SGND 8 I.C. Internally Connected. Connect to SGND. 9 BST High-Side MOSFET Driver Supply. Bypass BST to LX with a 10nF capacitor. Connect an external diode (see the Diode Selection section) from VDD to BST. 10, 11, 12 LX 13, 14 PGND 15, 16 IN Input Power Supply. Input supply range is from 4.5V to 28V. Bypass with a ceramic capacitor of at least 22µF to PGND. — EP Exposed Pad. Connect to SGND externally. Solder the exposed pad to a large contiguous copper plane to maximize thermal performance. Internal LDO 5V Output. Supply input for the internal analog core. Bypass with a ceramic capacitor of at least 1µF to SGND. See Figure 3. Power-Good Open-Drain Output. PGOOD goes low if FB is below 545mV. Enable Input. EN is a digital input that turns the regulator on and off. Drive EN high to turn on the regulator. Connect to IN for always-on operations. Voltage Error-Amplifier Output. Connect the necessary compensation network from COMP to SGND. Analog Ground. Connect to PGND plane at one point near the input bypass capacitor return terminal. Inductor Connection. Connect the LX pin to the switched side of the inductor. LX is high impedance when the IC is in shutdown mode, thermal shutdown mode, or VDD is below the UVLO threshold. Power Ground. Connect to the SGND PCB copper plane at one point near the input bypass capacitor return terminal. _______________________________________________________________________________________ 7 MAX15041 Typical Operating Characteristics (continued) (VIN = 12V, VOUT = 3.3V, CVDD = 1µF, CIN = 22µF, TA = +25°C, circuit of Figure 3 (see Table 1 for values), unless otherwise specified.) Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches MAX15041 Simplified Block Diagram ENABLE CONTROL AND THERMAL SHUTDOWN EN 5V LDO VDD UVLO COMPARATOR 4V MAX15041 VDD BIAS GENERATOR BST CURRENT-SENSE/CURRENT-LIMIT AMPLIFIER IN LX VOLTAGE REFERENCE N CONTROL LOGIC AND SINK LIMIT 0.65V LX VDD STRONG PREBIAS COMPARATOR 5µA N PWM COMPARATOR 0.606V PGND SS FB ERROR AMPLIFIER Σ OSCILLATOR COMP PGOOD SGND N 0.560V RISING, 0.545V FALLING 8 POWER-GOOD COMPARATOR _______________________________________________________________________________________ Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches The MAX15041 is a high-efficiency, peak-currentmode, step-down DC-DC converter with integrated high-side (170mΩ, typ) and low-side (105mΩ, typ) power switches. The output voltage is set from 0.606V to 0.9 x VIN by using an adjustable, external resistive divider and can deliver up to 3A load current. The 4.5V to 28V input voltage range makes the device ideal for distributed power systems, notebook computers, and preregulation applications. The MAX15041 features a PWM, internally fixed 350kHz switching frequency with a 90% maximum duty cycle. PWM current-mode control allows for an all-ceramic capacitor solution. The MAX15041 comes with a highgain transconductance error amplifier. The currentmode control architecture simplifies compensation design and ensures a cycle-by-cycle current limit and fast reaction to line and load transients. The low RDS-ON, on-chip, MOSFET switches ensure high efficiency at heavy loads and minimize critical inductances, reducing layout sensitivity. The MAX15041 also features thermal shutdown and overcurrent protection (high-side sourcing and low-side sinking), and an internal 5V, LDO with undervoltage lockout. An externally adjustable voltage soft-start gradually ramps up the output voltage and reduces inrush current. Independent enable control and powergood signals allow for flexible power sequencing. The MAX15041 also provides the ability to start up into a prebiased output, below or above the set point. Controller Function–PWM Logic The MAX15041 operates at a constant 350kHz switching frequency. When EN is high, after a brief settling time, PWM operation starts when VSS crosses the FB voltage, at the beginning of soft-start. The first operation is always a high-side MOSFET turnon, at the beginning of the clock cycle. The high-side MOSFET is turned off when: 1) COMP voltage crosses the internal current-mode ramp waveform, which is the sum of the compensation ramp and the current-mode ramp derived from the inductor current waveform (current-sense block). 2) The high-side MOSFET current limit is reached. 3) The maximum duty cycle of 90% is reached. Then, the low-side MOSFET turns on; the low-side MOSFET turns off when the clock period ends. Starting into a Prebiased Output The MAX15041 is capable of safely soft-starting into a prebiased output without discharging the output capacitor. Starting up into a prebiased condition, both low-side and high-side MOSFETs remain off to avoid discharging the prebiased output. PWM operation starts only when the SS voltage crosses the FB voltage. The MAX15041 is also capable of soft-starting into an output prebiased above the OUT nominal set point. In this case, forced PWM operation starts when SS voltage reaches 0.65V (typ). In case of a prebiased output, below or above the OUT nominal set point, if the low-side MOSFET sink current reaches the sink current limit (-3A, typ), the low-side MOSFET turns off before the end of the clock period and the high-side MOSFET turns on until one of the following conditions happens: 1) High-side MOSFET source current hits the reduced high-side MOSFET current limit (0.75A, typ); in this case, the high-side MOSFET is turned off for the remaining clock period. 2) The clock period ends. Enable Input and Power-Good Output The MAX15041 features independent device enable control and power-good signals that allow for flexible power sequencing. The enable input (EN) is an input with a 1.95V (typ) threshold that controls the regulator. Assert a voltage exceeding the threshold on EN to enable the regulator, or connect EN to IN for always-on operations. Power-good (PGOOD) is an open-drain output that deasserts (goes high impedance) when VFB is above 560mV (typ), and asserts low if VFB is below 545mV (typ). When the EN voltage is higher than 1.4V (typ) and lower than 1.95V (typ), most of the internal blocks are disabled, only an internal coarse preregulator, including the EN accurate comparator, is kept on. _______________________________________________________________________________________ 9 MAX15041 Detailed Description MAX15041 Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches Programmable Soft-Start (SS) The MAX15041 utilizes a soft-start feature to slowly ramp up the regulated output voltage to reduce input inrush current during startup. Connect a capacitor from SS to SGND to set the startup time (see the Setting the SoftStart Time section for capacitor selection details). Internal LDO (VDD) The MAX15041 has an internal 5.1V (typ) LDO. VDD is externally compensated with a minimum 1µF, low-ESR ceramic capacitor. The VDD voltage is used to supply the low-side MOSFET driver, and to supply the internal control logic. When the input supply (IN) is below 4.5V, VDD is 50mV (typ) lower than IN. The VDD output current limit is 80mA (typ) and an UVLO circuit inhibits switching when VDD falls below 3.85V (typ). Error Amplifier A high-gain error amplifier provides accuracy for the voltage feedback loop regulation. Connect the necessary compensation network between COMP and SGND (see the Compensation Design Guidelines section). The erroramplifier transconductance is 1.6mS (typ). COMP clamp low is set to 0.68V (typ), just below the PWM ramp compensation valley, helping COMP to rapidly return to correct set point during load and line transients. PWM Comparator The PWM comparator compares COMP voltage to the current-derived ramp waveform (LX current to COMP voltage transconductance value is 9A/V, typ.). To avoid instability due to subharmonic oscillations when the duty cycle is around 50% or higher, a compensation ramp is added to the current-derived ramp waveform. The compensation ramp slope (0.45V x 350kHz) is equivalent to half of the inductor current down slope in the worst case (load 3A, current ripple 30% and maximum duty cycle operation of 90%). Compensation ramp valley is set at 0.83V (typ). Overcurrent Protection and Hiccup Mode When the converter output is shorted or the device is overloaded, the high-side MOSFET current-limit event (6A, typ) turns off the high-side MOSFET and turns on the low-side MOSFET. In addition, it discharges the SS 10 capacitor, CSS for a fixed period of time (∆T0 = 70ns, typ). If the overcurrent condition persists, SS is pulled below 0.606V and a hiccup event is triggered. During a hiccup event, high-side and low-side MOSFETs are kept off, and COMP is pulled low for a period equal to 16 times the nominal soft-start time (blanking time). This is obtained by charging SS from 0 to 0.606V with a 5µA (typ) current, and then slowly discharging it back to 0V with a 333nA (typ) current. After the blanking time has elapsed, the device attempts to restart. If the overcurrent fault has cleared, the device resumes normal operation, otherwise a new hiccup event is triggered (see the Output Short-Circuit Waveforms in the Typical Operating Characteristics). Thermal-Shutdown Protection The MAX15041 contains an internal thermal sensor that limits the total power dissipation in the device and protects it in the event of an extended thermal fault condition. When the die temperature exceeds +155°C (typ), the thermal sensor shuts down the device, turning off the DC-DC converter and the LDO regulator to allow the die to cool. After the die temperature falls by 20°C (typ), the device restarts, using the soft-start sequence. Applications Information Setting the Output Voltage Connect a resistive divider (R1 and R2, see Figures 1 and 2) from OUT to FB to SGND to set the DC-DC converter output voltage. Choose R1 and R2 so that the DC errors due to the FB input bias current do not affect the output-voltage precision. With lower value resistors, the DC error is reduced, but the amount of power consumed in the resistive divider increases. A typical tradeoff value for R2 is 10kΩ, but values between 5kΩ and 50kΩ are acceptable. Once R2 is chosen, calculate R1 using: ⎛V ⎞ R1 = R2 × ⎜ OUT − 1⎟ ⎝ VFB ⎠ where the feedback threshold voltage VFB = 0.606V (typ). ______________________________________________________________________________________ Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches where fSW is the internally fixed 350kHz switching frequency, and ∆IL is the estimated inductor ripple current (typically set to 0.3 x I LOAD ). In addition, the peak inductor current, IL_PK, must always be below both the minimum high-side MOSFET current-limit value, IHSCL_MIN (5A, typ), and the inductor saturation current rating, IL_SAT. Ensure that the following relationship is satisfied: 1 IL _ PK = ILOAD + × ∆IL < min(IHSCL _ MIN ,IL _ SAT ) 2 Diode Selection The MAX15041 requires an external bootstrap steering diode. Connect the diode between VDD and BST. The diode should have a reverse voltage rating, higher than the converter input voltage and a 200mA minimum current rating. Typically, a fast switching or Schottky diode is used in this application, but a simple low-cost diode (1N4007) suffices. Input Capacitor Selection For a step-down converter, input capacitor CIN helps to keep the DC input voltage steady, in spite of discontinuous input AC current. Low-ESR capacitors are preferred to minimize the voltage ripple due to ESR. For ceramic capacitors, ESR contribution is negligible: RESR _ COUT << 1 8 × fSW × COUT For tantalum or electrolytic capacitors, ESR contribution is dominant: 1 RESR _ COUT >> 8 × fSW × COUT Compensation Design Guidelines The MAX15041 uses a fixed-frequency, peak-currentmode control scheme to provide easy compensation and fast transient response. The inductor peak current is monitored on a cycle-by-cycle basis and compared to the COMP voltage (output of the voltage error amplifier). The regulator’s duty-cycle is modulated based on the inductor’s peak current value. This cycle-by-cycle control of the inductor current emulates a controlled current source. As a result, the inductor’s pole frequency is shifted beyond the gain-bandwidth of the regulator. System stability is provided with the addition of a simple series capacitor-resistor from COMP to SGND. This pole-zero combination serves to tailor the desired response of the closed-loop system. The basic regulator loop consists of a power modulator (comprising the regulator’s pulse-width modulator, compensation ramp, control circuitry, MOSFETs, and inductor), the capacitive output filter and load, an output feedback divider, and a voltage-loop error amplifier with its associated compensation circuitry. See Figure 1 for a graphical representation. The average current through the inductor is expressed as: IL = GMOD × VCOMP Size CIN using the following formula: ILOAD V CIN = × OUT fSW × ∆VIN _ RIPPLE VIN Output-Capacitor Selection Low-ESR capacitors are recommended to minimize the voltage ripple due to ESR. Total output-voltage peak-topeak ripple is estimated by the following formula: ∆VOUT = ⎞ ⎛ V ⎞ ⎛ VOUT 1 × 1 − OUT ⎟ × ⎜ RESR _ COUT + fSW × L ⎜⎝ VIN ⎠ ⎝ 8 × fSW × COUT ⎟⎠ where IL is the average inductor current and GMOD is the power modulator’s transconductance. For a buck converter: V OUT = R LOAD × IL where R LOAD is the equivalent load resistor value. Combining the two previous equations, the power modulator’s transfer function in terms of VOUT with respect to VCOMP is: VOUT R ×I = LOAD L = RLOAD × GMOD VCOMP ⎛ IL ⎞ ⎜⎝ G ⎟ MOD ⎠ ______________________________________________________________________________________ 11 MAX15041 Inductor Selection A larger inductor value results in reduced inductor ripple current, leading to a reduced output ripple voltage. However, a larger inductor value results in either a larger physical size or a higher series resistance (DCR) and a lower saturation current rating. Typically, inductor value is chosen to have current ripple equal to 30% of load current. Choose the inductor with the following formula: ⎛ V ⎞ VOUT L= × 1 − OUT ⎟ fSW × ∆IL ⎜⎝ VIN ⎠ MAX15041 Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches POWER MODULATOR ERROR AMPLIFIER FEEDBACK DIVIDER COMPENSATION RAMP VOUT Σ FB R1 OUTPUT FILTER AND LOAD VIN gMC COMP QHS VOUT L0 CONTROL LOGIC R2 ROUT gMV RC PWM COMPARATOR *CCC DCR IL QLS ESR RLOAD COUT CC VCOMP GMOD VOUT IL ROUT = AVEA/gMV *CCC IS OPTIONAL. REF NOTE: THE GMOD STAGE SHOWN ABOVE MODELS THE AVERAGE CURRENT OF THE INDUCTOR INJECTED INTO THE OUTPUT LOAD. THIS REPRESENTS A SIMPLIFICATION FOR THE POWER MODULATOR STAGE DRAWN ABOVE. Figure 1. Peak Current-Mode Regulator Transfer Model Having defined the power modulator’s transfer function gain, the total system loop gain can be written as follows (see Figure 1): α= ROUT × ( sCCRC + 1) ⎡⎣s ( CC + CCC ) (RC + ROUT ) + 1⎤⎦ × ⎡⎣s ( CC || CCC )(RC || ROUT ) + 1⎤⎦ β = GMOD × (sCOUTESR + 1) RLOAD × ⎡⎣sCOUT (ESR + RLOAD ) + 1⎤⎦ R2 A Gain = × VEA × α × β R1 + R2 ROUT where ROUT is the quotient of the error amplifier’s DC gain, AVEA, divided by the error amplifier’s transconductance, gMV; ROUT is much larger than RC and CC is much larger than CCC. Rewriting: Gain = (sCCRC + 1) VFB A VEA × VOUT ⎡ ⎛ A VEA ⎞ ⎤ + 1⎥ × ( sCCCRC + 1) ⎢sCC ⎜ ⎝ gMV ⎟⎠ ⎦ ⎣ × GMODRLOAD × 12 The dominate poles and zeros of the transfer loop gain is shown below: fP1 = 2π × 10 gMV AVEA _ dB / 20 1 fP3 = 2π × CCCRC fZ2 = × CC fZ1 = fP2 = 1 2π × COUT (ESR + RLOAD ) 1 2π × CCRC 1 2π × COUTESR The order of pole-zero occurrence is: fP1 < fP2 < fZ1 < fZ2 ≤ fP3 Note under heavy load, fP2, may approach fZ1. A graphical representation of the asymptotic system closed-loop response, including the dominant pole and zero locations is shown in Figure 2. (sCOUTESR + 1) ⎡⎣sCOUT (ESR + RLOAD ) + 1⎤⎦ ______________________________________________________________________________________ Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches MAX15041 GAIN 1ST ASYMPTOTE VFB x VOUT -1 x 10AVEA[dB]/20 x GMOD x RLOAD 2ND ASYMPTOTE VFB x VOUT -1 x gMV x (CC)-1 x GMOD x RLOAD 3RD ASYMPTOTE VFB x VOUT -1 x gMV x (CC)-1 x GMOD x RLOAD x (COUT(ESR + RLOAD))-1 4TH ASYMPTOTE VFB x VOUT -1 x gMV x RC x GMOD x RLOAD x (COUT(ESR + RLOAD))-1 3RD POLE (CCCRC)-1 2ND ZERO (COUTESR)-1 UNITY 1ST POLE gmV x (10AVEA[dB]/20 CC)-1 RAD/S 1ST ZERO (CCRC)-1 CO 2ND POLE (COUT(ESR + RLOAD))-1 5TH ASYMPTOTE VFB x VOUT -1 x gMV x RC x GMOD x (ESR || RLOAD) 6TH ASYMPTOTE VFB x VOUT -1 x gMV x (CCC)-1 x GMOD x (ESR || RLOAD) Figure 2. Asymptotic Loop Response of Peak Current-Mode Regulator If COUT is large, or exhibits a lossy equivalent series resistance (large ESR), the circuit’s second zero may come into play around the crossover frequency (fCO = ωCO/2π). In this case, a third pole may be induced by a second (optional) small compensation capacitor (CCC), connected from COMP to SGND. The loop response’s fourth asymptote (in bold, Figure 2) is the one of interest in establishing the desired crossover frequency (and determining the compensation component values). A lower crossover frequency provides for stable closed-loop operation at the expense of a slower load and line transient response. Increasing the crossover frequency improves the transient response at the (potential) cost of system instability. A standard rule of thumb sets the crossover frequency ≤ 1/10 of the switching frequency (for the MAX15041, this is approximately 35kHz for the 350kHz fixed switching frequency). First, select the passive and active power components that meet the application’s requirements. Then, choose the small-signal compensation components to achieve the desired closed-loop frequency response and phase margin as outlined in the Closing the Loop: Designing the Compensation Circuitry section. Closing the Loop: Designing the Compensation Circuitry 1) Select the desired crossover frequency. Choose fCO equal to 1/10th of fSW, or fCO ≈ 35kHz. 2) Select RC using the transfer-loop’s fourth asymptote gain (assuming fCO > fP1, fP2, and fZ1 and setting the overall loop gain to unity) as follows: 1= × VFB × gMV × RC × GMOD × RLOAD VOUT 1 2π × fCO × COUT × (ESR + RLOAD ) therefore: 2π × fCO × COUT × (ESR + RLOAD ) V RC = OUT × VFB gMV × GMOD × RLOAD ______________________________________________________________________________________ 13 MAX15041 Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches For RLOAD much greater than ESR, the equation can be further simplified as follows: V 2π × fCO × COUT RC = OUT × VFB gMV × GMOD where VFB is equal to 0.606V. 3) Select C C . C C is determined by selecting the desired first system zero, fZ1, based on the desired phase margin. Typically, setting fZ1 below 1/5th of fCO provides sufficient phase margin. fZ1 = f 1 ≤ CO 2π × CCRC 5 therefore: CC ≥ 5 2π × fCO × RC 4) If the ESR output zero is located at less than one-half the switching frequency use the (optional) secondary compensation capacitor, CCC, to cancel it, as follows: 1 1 = fP3 = fZ2 = 2π × CCCRC 2π × COUTESR therefore: CCC = COUT × ESR RC If the ESR zero exceeds 1/2 the switching frequency, use the following equation: fP3 = f 1 = SW 2π × CCCRC 2 therefore: CCC = 2 2π × fSW × RC this third-pole placement is well beyond the desired crossover frequency, minimizing its interaction with the system loop response at crossover. If CCC is smaller than 10pF, it can be neglected in these calculations. Setting the Soft-Start Time The soft-start feature ramps up the output voltage slowly, reducing input inrush current during startup. Size the CSS capacitor to achieve the desired soft-start time tSS using: I ×t CSS = SS SS VFB ISS, the soft-start current, is 5µA (typ) and VFB, the output feedback voltage threshold, is 0.606V (typ). When using large COUT capacitance values, the high-side current limit may trigger during the soft-start period. To ensure the correct soft-start time, tSS, choose CSS large enough to satisfy: CSS >> COUT × VOUT × ISS (IHSCL _ MIN − IOUT ) × VFB IHSCL_MIN is the minimum high-side switch, currentlimit value. Power Dissipation The MAX15041 is available in a thermally enhanced TQFN package and can dissipate up to 1.666W at TA = +70°C. The exposed pad should be connected to SGND externally, preferably soldered to a large ground plane to maximize thermal performance. When the die temperature exceeds +155°C, The thermal-shutdown protection is activated (see the Thermal-Shutdown Protection section). Layout Procedure Careful PCB layout is critical to achieve clean and stable operation. It is highly recommended to duplicate the MAX15041 evaluation kit layout for optimum performance. If deviation is necessary, follow these guidelines for good PCB layout: 1) Connect input and output capacitors to the power ground plane; connect all other capacitors to the signal ground plane. The downside of CCC is that it detracts from the overall system phase margin. Care should be taken to guarantee 14 ______________________________________________________________________________________ Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches 4) Connect IN, LX, and PGND separately to a large copper area to help cool the IC to further improve efficiency. 5) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close as possible to the IC. 6) Route high-speed switching nodes (such as LX and BST) away from sensitive analog areas (such as FB and COMP). 3) Keep the high-current paths as short and wide as possible. Keep the path of switching current short and minimize the loop area formed by LX, the output capacitors, and the input capacitors. D INPUT 4.5V TO 28V RBST 47Ω IN BST CIN 47µF VDD RPU 10kΩ CBST MAX15041 EN L 4.7µH OUTPUT = 3.3V LX COUT 22µF CVDD 1µF R1 45.3kΩ 1% PGND PGOOD FB PGOOD SS COMP I.C. SGND CSS 0.01µF R1 10.0kΩ 1% RC 1.8kΩ CCC 100pF CC 12nF Figure 3. Typical Operating Circuit 1 (4.5V to 28V Input Buck Converter) Table 1. Typical Component Values for Common Output-Voltage Settings VOUT (V) L (µH) CC (nF) RC (kΩ) 5.0 3.3 4.7 8 2.70 4.7 12 1.80 2.5 3.3 22 1.50 1.8 2.2 33 1.00 1.2 2.2 47 0.68 R1 and R2 Select R2 so that: 5kΩ ≤ R2 ≤ 50kΩ Calculate R1 using the equation in the Setting the Output Voltage section. ______________________________________________________________________________________ 15 MAX15041 2) Place capacitors on VDD, IN, and SS as close as possible to the IC and the corresponding pin using direct traces. Keep the power ground plane (connected to PGND) and signal ground plane (connected to SGND) separate. PGND and SGND connect at only one common point near the input bypass capacitor return terminal. Pin Configuration Chip Information PROCESS: BiCMOS LX LX LX BST TOP VIEW 12 11 10 9 8 PGND 13 PGND 14 MAX15041 IN 15 *EP 1 2 3 4 EN COMP + PGOOD IN 16 VDD MAX15041 Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches I.C. 7 SGND 6 SS 5 FB Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 16 TQFN T1633+4 21-0136 TQFN *EXPOSED PAD, CONNECT TO SGND. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.