LM3204 Miniature, Adjustable, Step-Down DC-DC Converter with Bypass Mode for RF Power Amplifiers General Description Features The LM3204 is a DC-DC converter optimized for powering RF power amplifiers (PAs) from a single Lithium-Ion cell. It steps down an input voltage of 2.7V to 5.5V to an adjustable output voltage of 0.8V to 3.6V. The output voltage is set using an analog input ( VCON) for optimizing efficiency of the RF PA at various power levels. n n n n The LM3204 offers superior features and performance for mobile phones and similar RF PA applications. Fixedfrequency PWM mode minimizes RF interference. Bypass mode turns on an internal bypass switch to power the PA directly from the battery. LM3204 has both forced and automatic bypass modes. Shutdown mode turns the device off and reduces battery consumption to 0.1µA (typ.). The LM3204 is available in a 10-pin lead free micro SMD package. A high switching frequency (2MHz) allows use of tiny surface-mount components. Only three small external surface-mount components, an inductor and two ceramic capacitors are required. n n n n n n n 2MHz (typ.) PWM Switching Frequency Operates from a single Li-Ion cell (2.7V to 5.5V) Adjustable Output Voltage (0.8V to 3.6V) Fast Turn on time when Enabled (50µs Typ.), 3GPP Compliant 300mA Maximum load capability (PWM mode) 500mA Maximum load capability (Bypass mode) PWM, Forced and Automatic Bypass Mode High Efficiency (96% Typ. at 3.6VIN, 3.2VOUT at 120mA) 10-pin micro SMD Package Current Overload Protection Thermal Overload Protection Applications n n n n Cellular Phones Hand-Held Radios RF PC Cards Battery Powered RF Devices Typical Application 20138901 © 2005 National Semiconductor Corporation DS201389 www.national.com LM3204 Miniature, Adjustable, Step-Down DC-DC Converter with Bypass Mode for RF Power Amplifiers November 2005 LM3204 Connection Diagrams 20138902 20138903 Top View Bottom View 10–Bump Thin Micro SMD Package, Large Bump See NS Package Number TLP10NHA Order Information Order Number Package Marking (Note) Supplied As LM3204TL XYTT SJDB 250 Units, Tape and Reel LM3204TLX XYTT SJDB 3000 Units, Tape and Reel Note: The package marking “XY” designates the date code. “TT” is a NSC internal code for die traceability. Pin Description Pin # Name Description A1 VDD Analog Supply Input. A 0.1µF ceramic capacitor is recommended to be placed as close to this pin as possible. (Figure 1) B1 VCON C1 FB D1 BYP D2 EN D3 PGND C3 SW Voltage Control Analog input. VCON controls VOUT in PWM mode. Set: VOUT = 3 x VCON. Do not leave floating. Feedback Analog Input. Connect to the output at the output filter capacitor. (Figure 1) Bypass. Use this digital input to command operation in Bypass mode. Set BYP low ( < 0.4V) for normal operation. Enable Input. Set this digital input high ( > 1.2V) after Vin > 2.7V for normal operation. For shutdown, set low ( < 0.4V). Power Ground Switching Node connection to the internal PFET switch and NFET synchronous rectifier. Connect to an inductor with a saturation current rating that exceeds the maximum Switch Peak Current Limit specification of the LM3204. B3 PVIN Power Supply Voltage Input to the internal PFET switch and Bypass FET. (Figure 1) A3 BYPOUT Bypass FET Drain. Connect to the output capacitor. (Figure 1) Do not leave floating. A2 SGND www.national.com Analog and Control Ground 2 ESD Rating (Note 4) Human Body Model Machine Model If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VDD, PVIN to SGND −0.2V to +6.0V PGND to SGND −0.2V to +0.2V EN, FB, BYP, VCON (SGND −0.2V) to (VDD +0.2V) w/6.0V max SW, BYPOUT Operating Ratings (Notes 1, 2) Input Voltage Range PVIN to VDD PWM Mode Junction Temperature (TJ-MAX) +150˚C Storage Temperature Range −65˚C to +150˚C Maximum Lead Temperature (Soldering, 10 sec.) +260˚C 0mA to 300mA Bypass Mode −0.2V to +0.2V Internally Limited 2.7V to 5.5V Recommended Load Current (PGND −0.2V) to (PVIN +0.2V) w/6.0V max Continuous Power Dissipation (Note 3) 2.0kV 200V 0mA to 500mA Junction Temperature (TJ) Range −30˚C to +125˚C Ambient Temperature (TA) Range (Note 5) −30˚C to +85˚C Thermal Properties Junction-to-Ambient Thermal 100˚C/W Resistance (θJA), TLP10 Package (Note 6) Electrical Characteristics (Notes 2, 7) Limits in standard typeface are for TA = TJ = 25˚C. Limits in boldface type apply over the full operating ambient temperature range (−30˚C ≤ TA = TJ ≤ +85˚C). Unless otherwise noted, specifications apply to the LM3204 with: PVIN = VDD = EN = 3.6V, BYP = 0V. Symbol Parameter Conditions VIN Input Voltage Range (Note 8) PVIN = VDD = VIN VFB, MIN Feedback Voltage at Minimum Setting VCON = 0.267V, VIN = 3.6V VFB, MAX Feedback Voltage at Maximum Setting VCON = 1.20V, VIN = 4.2V OVP Over-Voltage Protection Threshold (Note 9) VBYPASS− Auto Bypass Detection (Note 10) Negative Threshold VBYPASS+ Auto Bypass Detection (Note 10) Positive Threshold ISHDN Shutdown Supply Current (Note 11) EN = SW = BYPOUT = VCON = FB = 0V IQ_PWM DC Bias Current into VDD Min Typ 2.7 Max Units 5.5 V 0.75 0.800 0.85 V 3.528 3.600 3.672 V 330 400 mV 160 250 320 mV 350 450 540 mV 0.1 3 µA VCON = 0.267V, FB = 2V, BYPOUT = 0V, No-Load 720 800 µA BYP = 3.6V, VCON = 0.5V, No-Load 720 800 µA RDSON (P) Pin-Pin Resistance for ISW = 500mA PFET 320 450 mΩ RDSON (N) Pin-Pin Resistance for ISW = - 200mA N-FET 310 450 mΩ RDSON Pin-Pin Resistance for IBYPOUT = 500mA Bypass FET 85 120 mΩ (BYP) 700 820 940 mA 800 1000 1200 mA 2 2.2 MHz IQ_BYP ILIM-PFET Switch Current Limit (Note 12) ILIM-BYP Bypass FET Current Limit (Note 13) FOSC Internal Oscillator Frequency 1.7 VIH Logic High Input Threshold for EN, BYP 1.20 3 V www.national.com LM3204 Absolute Maximum Ratings (Notes 1, 2) LM3204 Electrical Characteristics (Notes 2, 7) Limits in standard typeface are for TA = TJ = 25˚C. Limits in boldface type apply over the full operating ambient temperature range (−30˚C ≤ TA = TJ ≤ +85˚C). Unless otherwise noted, specifications apply to the LM3204 with: PVIN = VDD = EN = 3.6V, BYP = 0V. (Continued) Symbol Parameter Conditions Min Typ Max Units 0.4 V 10 µA VIL Logic Low Input Threshold for EN, BYP IPIN Pin Pull Down Current EN, BYP = 3.6V for EN, BYP 5 Gain VCON to VOUT Gain 3 V/V ICON VCON Input Leakage Current 10 nA VCON = 1.2V System Characteristics The following spec table entries are guaranteed by design if the component values in the typical application circuit are used. These parameters are not guaranteed by production testing. Symbol TRESPONSE TSTARTUP Parameter Time for VOUT to Rise from 0.8V to 3.4V in PWM Mode Conditions Min Typ Max Units VIN = 4.2V, COUT = 4.7µF, RLOAD = 15Ω L = 2.2 µH (ISAT > 0.94A) 25 µs Time for VOUT to rise to 3.4V VIN = 4.2V, COUT = 4.7µF, in PWM Mode RLOAD = 15Ω L = 2.2µH (ISAT = 0.94A) (Note 14) EN = Low to High 50 µs CCON VCON Input Capacitance VCON = 1V, Test frequency = 100kHz 15 pF TON_BYP Bypass FET Turn On Time In Bypass Mode VIN = 3.6V, VCON = 0.267V, COUT = 4.7µF, RLOAD = 15Ω BYP = Low to High 30 µs Auto Bypass Detect Delay Time (Note 10) 20 µs TBYP 10 15 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All voltages are with respect to the potential at the GND pins. Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 150˚C (typ.) and disengages at TJ = 130˚C (typ.). Note 4: The Human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. (MIL-STD-883 3015.7) The machine model is a 200pF capacitor discharged directly into each pin. National Semiconductor recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper ESD handling techniques can result in damage. Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be de-rated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125˚C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA x PD-MAX). Note 6: Junction-to-ambient thermal resistance (θJA) is taken from thermal measurements, performed under the conditions and guidelines set forth in the JEDEC standard JESD51-7. A 1" x 1", 4 layer, 1.5oz. Cu board was used for the measurements. Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Note 8: The LM3204 is designed for mobile phone applications where turn-on after power-up is controlled by the system controller and where requirements for a small package size overrule increased die size for internal Under Voltage Lock-Out (UVLO) circuitry. Thus, it should be kept in shutdown by holding the EN pin low until the input voltage exceeds 2.7V. Note 9: Over-Voltage protection (OVP) threshold is the voltage above the nominal VOUT where the OVP comparator turns off the PFET switch while in PWM mode. Note 10: VIN is compared to the programmed output voltage (VOUT). When VIN–VOUT falls below VBYPASS− for longer than TBYP the Bypass FET turns on and the switching FETs turn off. This is called the Bypass mode. The device comes out of Bypass mode when VIN–VOUT exceeds VBYPASS+ for longer than TBYP, and PWM mode returns. The hysteresis for the bypass detection threshold VBYPASS+ – VBYPASS− will always be positive and will be approximately 200mV (typ.). Note 11: Shutdown current includes leakage current of PFET and Bypass FET. Note 12: Electrical Characteristic table reflects open loop data (FB=0V and current drawn from SW pin ramped up until cycle by cycle current limit is activated). Refer to datasheet curves for closed loop data and its variation with regards to supply voltage and temperature. Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current until output voltage drops by 10%. Note 13: Bypass FET current limit is defined as the load current at which the FB voltage is 1V lower than VIN. Note 14: The startup time is the time to reach 90% of 3.4V nominal output voltage from the EN being low to high. www.national.com 4 (Circuit in Figure 1, PVIN = VDD = EN = 3.6V, BYP = 0V, TA = Shutdown Current vs Temperature (EN = SW = BYPOUT = VCON = FB = 0V) Quiescent Current vs Supply Voltage (VCON = 0.267V, FB = 2V, No load) 20138904 20138905 Output Voltage vs Supply Voltage (VOUT = 1.5V, VCON = 0.5V) Switching Frequency Variation vs Temperature (VOUT = 1.5V, VCON = 0.5V) 20138907 20138906 Output Voltage vs Temperature (VIN = 4.2V, VOUT = 3.25V, VCON = 1.08V) Output Voltage vs Temperature (VOUT = 1.5V, VCON = 0.5V) 20138908 20138909 5 www.national.com LM3204 Typical Performance Characteristics 25˚C, unless otherwise noted) LM3204 Typical Performance Characteristics (Circuit in Figure 1, PVIN = VDD = EN = 3.6V, BYP = 0V, TA = 25˚C, unless otherwise noted) (Continued) Open/Closed Loop Current Limit vs Temperature (PWM Mode) Output Voltage vs Output Current (BYP Mode, VIN = BYP = 3.6V) 20138912 20138913 Low VCON Voltage vs Output Voltage (RLOAD = 15Ω) VCON Voltage vs Output Voltage (IOUT = 200 mA) 20138914 www.national.com 20138915 6 Output Voltage vs Input Voltage (BYP = 0V, Auto-Bypass Function) Efficiency vs Output Voltage (VIN = 3.9V) 20138916 20138917 Efficiency vs Output Current (VOUT = 3.25V, VCON = 1.08V) Efficiency vs Output Current (VOUT = 1.5V, VCON = 0.5V) 20138918 20138919 Load Transient Response (VCON = 1.08V) Load Transient Response (VCON = 0.5V) 20138920 20138921 7 www.national.com LM3204 Typical Performance Characteristics (Circuit in Figure 1, PVIN = VDD = EN = 3.6V, BYP = 0V, TA = 25˚C, unless otherwise noted) (Continued) LM3204 Typical Performance Characteristics (Circuit in Figure 1, PVIN = VDD = EN = 3.6V, BYP = 0V, TA = 25˚C, unless otherwise noted) (Continued) Startup (VCON = 1.13V) Shutdown Response (VCON = 1.08V) 20138942 20138923 Forced Bypass Operation (VIN = 3.0V) Automatic Bypass Operation (VIN = 4.2V to 3.0V) 20138924 20138925 VCON Voltage Response (VIN = 4.2V, VCON = 0.5V/1.1V) Line Transient Response (VIN = 3.0V to 3.6V) 20138926 www.national.com 20138927 8 Timed Current Limit Response (Normal operation to Short circuit) Output Voltage Ripple (VOUT = 1.5V, VCON = 0.5V) 20138928 20138929 Output Voltage Ripple in Dropout (VIN = 3.57V, VOUT = 3.25V, ILOAD = 200 mA) Output Voltage Ripple (VOUT = 3.25V, VCON = 1.08V) 20138930 20138931 RDSON vs Temperature (P-FET) RDSON vs Temperature (N-FET) 20138932 20138933 9 www.national.com LM3204 Typical Performance Characteristics (Circuit in Figure 1, PVIN = VDD = EN = 3.6V, BYP = 0V, TA = 25˚C, unless otherwise noted) (Continued) LM3204 Typical Performance Characteristics (Circuit in Figure 1, PVIN = VDD = EN = 3.6V, BYP = 0V, TA = 25˚C, unless otherwise noted) (Continued) RDSON vs Temperature (Bypass FET) Dropout Voltage vs Output Current (Bypass Mode) 20138934 20138941 Logic High Threshold Voltage 20138943 www.national.com 10 LM3204 Block Diagram 20138935 with 3.2V output, 3.6V input. PWM mode quiescent current is 0.72mA typ. The output voltage is dynamically programmable from 0.8V to 3.6V by adjusting the voltage on the control pin (VCON) without the need for external feedback resistors. This ensures longer battery life by being able to change the PA supply voltage dynamically depending on its transmitting power. Operation Description The LM3204 is a simple, step-down DC-DC converter with a bypass switch, optimized for powering RF power amplifiers (PAs) in mobile phones, portable communicators, and similar battery powered RF devices. It is designed to allow the RF PA to operate at maximum efficiency over a wide range of power levels from a single Li-Ion battery cell. It is based on current-mode buck architecture, with synchronous rectification for high efficiency. It is designed for a maximum load capability of 300mA in PWM mode and 500mA in bypass mode. Maximum load range may vary from this depending on input voltage, output voltage and the inductor chosen. The device has all three of pin-selectable operating modes required for powering RF PAs in mobile phones and other sophisticated portable device with complex power management needs. Fixed-frequency PWM operation offers regulated output at high efficiency while minimizing interference with sensitive IF and data acquisition circuits. Bypass mode (Forced or Automatic) turns on an internal FET bypass switch to power the PA directly from the battery. This helps the RF power amplifier maintain its operating power during low battery conditions by reducing the dropout voltage across the LM3204. Shutdown mode turns the device off and reduces battery consumption to 0.1µA (typ.). DC PWM mode output voltage precision is +/-2% for 3.6VOUT. Efficiency is typically around 96% for a 120mA load Additional features include current overload protection, over voltage protection and thermal shutdown. The LM3204 is constructed using a chip-scale 10-pin micro SMD package. This package offers the smallest possible size, for space-critical applications such as cell phones, where board area is an important design consideration. Use of a high switching frequency (2MHz typ.) reduces the size of external components. As shown in Figure 1, only few external components are required for implementation. Use of a micro SMD package requires special design considerations for implementation. (See Micro SMD Package Assembly and use in the Applications Information section.) Its fine bumppitch requires careful board design and precision assembly equipment. Use of this package is best suited for opaquecase applications, where its edges are not subject to highintensity ambient red or infrared light. Also, the system controller should set EN low during power-up and other low supply voltage conditions. (See Shutdown Mode in the Device Information section.) 11 www.national.com LM3204 Operation Description (Continued) 20138936 FIGURE 1. Typical Operating System Circuit error amplifier output increases, which allows the inductor current to ramp higher before the comparator turns off the PFET. This increases the average current sent to the output and adjusts for the increase in the load. The minimum ontime of PFET in PWM mode is 50ns (typ.). Circuit Operation Referring to Figure 1, the LM3204 operates as follows. During the first part of each switching cycle, the control block in the LM3204 turns on the internal PFET (P-channel MOSFET) switch. This allows current to flow from the input through the inductor to the output filter capacitor and load. The inductor limits the current to a ramp with a slope of around (VIN - VOUT) / L, by storing energy in a magnetic field. During the second part of each cycle, the controller turns the PFET switch off, blocking current flow from the input, and then turns the NFET (N-channel MOSFET) synchronous rectifier on. In response, the inductor’s magnetic field collapses, generating a voltage that forces current from ground through the synchronous rectifier to the output filter capacitor and load. As the stored energy is transferred back into the circuit and depleted, the inductor current ramps down with a slope around VOUT / L. The output filter capacitor stores charge when the inductor current is going high, and releases it when inductor current is going low, smoothing the voltage across the load. The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and synchronous rectifier at SW to a low-pass filter formed by the inductor and output filter capacitor. The output voltage is equal to the average voltage at the SW pin. Bypass Mode The LM3204 contains an internal PFET switch for bypassing the PWM DC-DC converter during Bypass mode. In Bypass mode, this PFET is turned on to power the PA directly from the battery for maximum RF output power. Bypass mode is more efficient than operating in PWM mode at 100% duty cycle because the resistance of the bypass PFET is less than the series resistance of the PWM PFET and inductor. This translates into higher voltage available on the output in Bypass mode, for a given battery voltage. The part can be placed in bypass mode by sending BYP pin high. This is called Forced Bypass Mode and it remains in bypass mode until BYP pin goes low. Alternatively the part can go into Bypass mode automatically. This is called Auto-bypass mode or Automatic Bypass mode. The bypass switch turns on when the difference between the input voltage and programmed output voltage is less than 250mV (typ.) for more than the bypass delay time of 15µs (typ.). The bypass switch turns off when the input voltage is higher than the programmed output voltage by 450mV (typ.) for longer than the bypass delay time. The bypass delay time is provided to prevent false triggering into Automatic Bypass mode by either spikes or dips in VIN. This method is very system resource friendly in that the Bypass PFET is turned on automatically when the input voltage gets close to the output voltage, typical scenario of a discharging battery. It is also turned off automatically when the input voltage rises, typical scenario of a charger connected. Another scenario could be changes made to VCON voltage causing Bypass PFET to turn on and off automatically. It is recommended to connect BYPOUT pin directly to the output capacitor with a separate trace and not to the FB pin. If the VCON is less than approximately 0.15V, the Bypass FET is turned off. PWM Mode While in PWM (Pulse Width Modulation) mode, the output voltage is regulated by switching at a constant frequency and then modulating the energy per cycle to control power to the load. Energy per cycle is set by modulating the PFET switch on-time pulse width to control the peak inductor current. This is done by comparing the PFET drain current to a slope-compensated reference current generated by the error amplifier. At the beginning of each cycle, the clock turns on the PFET switch, causing the inductor current to ramp up. When the current sense signal ramps past the error amplifier signal, the PWM comparator turns off the PFET switch and turns on the NFET synchronous rectifier, ending the first part of the cycle. If an increase in load pulls the output down, the www.national.com 12 The BYP digital input pin is used to select between PWM/ Auto-bypass and Bypass operating mode. Setting BYP pin high ( > 1.2V) places the device in Forced Bypass mode. Setting BYP pin low ( < 0.4V) or leaving it floating places the device in PWM/Auto-bypass mode. Bypass and PWM operation overlap during the transition between the two modes. This transition time is approximately 31µs when changing from PWM to Bypass mode, and 15µs when changing from Bypass to PWM mode. This helps prevent under or overshoots during the transition period between PWM and Bypass modes. Current Limiting A current limit feature allows the LM3204 to protect itself and external components during overload conditions. In PWM mode, a 940mA (max.) cycle-by-cycle current limit is normally used. If an excessive load pulls the output voltage down to below approximately 0.375V, indicating a possible short to ground, then the device switches to a timed current limit mode. In timed current limit mode, the internal PFET switch is turned off after the current comparator trips, and the beginning of the next cycle is inhibited for 3.5µs to force the instantaneous inductor current to ramp down to a safe value. After the 3.5µs interval, the internal PFET is turned on again. This cycle is repeated until the load is reduced and the output voltage exceeds approximately 0.375V. Therefore, the device may not startup if an excessive load is connected to the output when the device is enabled. The synchronous rectifier is off in the timed current limit mode. Timed current limit prevents the loss of current control seen in some products when the output voltage is pulled low in serious overload conditions. A current limit is also provided for the NFET. This is approximately −500mA. Both the NFET and the PFET are turned off in negative current limit until the PFET is turned on again at the beginning of the next cycle. The negative current limit inhibits buildup of excessive negative inductor current. In the Bypass mode, the bypass current limit is 1000mA (typ.). The output voltage drops when the bypass current limit kicks in. Shutdown Mode Setting the EN digital pin low ( < 0.4V) places the LM3204 in a 0.1µA (typ.) Shutdown mode. During shutdown, the PFET switch, NFET synchronous rectifier, reference voltage source, control and bias circuitry of the LM3204 are turned off. Setting EN high ( > 1.2V) enables normal operation. EN should be set low to turn off the LM3204 during power-up and under voltage conditions when the power supply is less than the 2.7V minimum operating voltage. The LM3204 is designed for compact portable applications, such as mobile phones. In such applications, the system controller determines power supply sequencing and requirements for small package size outweigh the benefit of including UVLO (Under Voltage Lock-Out) circuitry. Dynamically Adjustable Output Voltage The LM3204 features dynamically adjustable output voltage to eliminate the need for external feedback resistors. The output can be set from 0.8V to 3.6V by changing the voltage on the analog VCON pin. This feature is useful in PA applications where peak power is needed only when the handset is far away from the base station or when data is being transmitted. In other instances, the transmitting power can be reduced. Hence the supply voltage to the PA can be reduced, promoting longer battery life. See Setting the Output Voltage in the Application Information section for further details. Thermal Overload Protection The LM3204 has a thermal overload protection function to protect the device from short-term misuse and overload conditions. When the junction temperature exceeds around 150˚C, the device inhibits operation. Both the PFET and the NFET are turned off in PWM mode, and the Bypass PFET is turned off in Bypass mode. When the temperature drops below 130˚C, normal operation resumes. Prolonged operation in thermal overload conditions may damage the device. Over Voltage Protection The LM3204 has an over voltage comparator that prevents the output voltage from rising too high, when the device is left in PWM mode under light-load conditions, during output voltage steps, or during startup. When the output voltage rises to 330mV over its target, the OVP comparator inhibits PWM operation to skip pulses until the output voltage returns to the target. During the over voltage protection mode, both the PWM PFET and the NFET synchronous rectifier are off. When the part comes out of the over voltage protection mode, the NFET synchronous rectifier remains off for approximately 3.5µs to avoid inductor current going negative. Application Information SETTING THE OUTPUT VOLTAGE The LM3204 features a pin-controlled variable output voltage to eliminate the need for external feedback resistors. It can be programmed for an output voltage from 0.8V to 3.6V by setting the voltage on the VCON pin, as in the following formula: VOUT = 3 x VCON Internal Synchronous Rectification While in PWM mode, the LM3204 uses an internal NFET as a synchronous rectifier to reduce rectifier forward voltage drop and associated power loss. Synchronous rectification provides a significant improvement in efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier diode. When VCON is between 0.267V and 1.20V, the output voltage will follow proportionally by 3 times of VCON. If VCON is over 1.20V (VOUT = 3.6V), sub-harmonic oscillation may occur because of insufficient slope compensation. 13 www.national.com LM3204 With medium and heavy loads, the internal NFET synchronous rectifier is turned on during the inductor current down slope in the second part of each cycle. The synchronous rectifier is turned off prior to the next cycle. There is no zero cross detect, which means that the NFET can conduct current in both directions and inductor current is always continuous. The advantage of this method is that the part remains in PWM mode at light loads or no load conditions. The NFET has a current limit. The NFET is designed to conduct through its intrinsic body diode during transient intervals before it turns on, eliminating the need for an external diode. Operating Mode Selection Control LM3204 Application Information value by as much as 40%, in addition to the 20% tolerances and 15% temperature coefficients. Request dc bias curves from manufacturer when making selection. The device has been designed to be stable with output capacitors as low as 3µF to account for capacitor tolerances. This value includes dc bias reduction, manufacturing tolerances and temp coefficients. The input filter capacitor supplies AC current drawn by the PFET switch of the LM3204 in the first part of each cycle and reduces the voltage ripple imposed on the input power source. A 0.1µF capacitor is also recommended close to VDD pin. The output filter capacitor absorbs the AC inductor current, helps maintain a steady output voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with sufficient capacitance and sufficiently low ESR (Equivalent Series Resistance) to perform these functions. The ESR of the filter capacitors is generally a major factor in voltage ripple. (Continued) If VCON voltage is less than 0.267V (VOUT = 0.8V), the output voltage may not be regulated due to the required on-time being less than the minimum on-time (50ns). The output voltage can go lower than 0.8V providing a limited VIN range is used. Refer to datasheet curve (Low VCON Voltage vs Output Voltage) for details. This curve is for a typical part and there could be part to part variation for output voltages less than 0.8V over the limited VIN range. In addition, if the VCON is less than approximately 0.15V, the LM3204 output is turned off, but the internal bias circuits are still active. INDUCTOR SELECTION A 2.2µH inductor with saturation current rating over 940mA is recommended for almost all applications. The inductor resistance should be less than 0.3Ω for better efficiency. Table 1 lists suggested inductors and suppliers. MICRO SMD PACKAGE ASSEMBLY AND USE Use of the Micro SMD package requires specialized board layout, precision mounting and careful re-flow techniques, as detailed in National Semiconductor Application Note 1112. Refer to the section Surface Mount Technology (SMD) Assembly Considerations. For best results in assembly, alignment ordinals on the PC board should be used to facilitate placement of the device. The pad style used with Micro SMD package must be the NSMD (non-solder mask defined) type. This means that the solder-mask opening is larger than the pad size. This prevents a lip that otherwise forms if the solder-mask and pad overlap, from holding the device off the surface of the board and interfering with mounting. See Application Note 1112 for specific instructions how to do this. The 10-Bump package used for the LM3204 has 300 micron solder balls and requires 10.82 mil pads for mounting on the circuit board. The trace to each pad should enter the pad with a 90˚ entry angle to prevent debris from being caught in deep corners. Initially, the trace to each pad should be 6-7 mil wide, for a section approximately 6 mil long or longer, as a thermal relief. Then each trace should neck up or down to its optimal width. The important criterion is symmetry. This ensures the solder bumps on the LM3204 re-flow evenly and that the device solders level to the board. In particular, special attention must be paid to the pads for bumps B3, C3 and D3. Because PGND and PVIN are typically connected to large copper planes, inadequate thermal relief can result in inadequate re-flow of these bumps. The Micro SMD package is optimized for the smallest possible size in applications with red or infrared opaque cases. Because the Micro SMD package lacks the plastic encapsulation characteristic of larger devices, it is vulnerable to light. Backside metallization and/or epoxy coating, along with front-side shading by the printed circuit board, reduce this sensitivity. However, the package has exposed die edges. In particular, Micro SMD devices are sensitive to light, in the red and infrared range, shining on the package’s exposed die edges. Do not use or power-up the LM3204 while subjecting it to high intensity red or infrared light; otherwise degraded, unpredictable or erratic operation may result. Examples of light sources with high red or infrared content include the sun and halogen lamps. Place the device in a case opaque to red or infrared light. TABLE 1. Suggested Inductors and Their Suppliers Model Size (WxLxH) [mm] Vendor Coilcraft DO3314-222MX 3.3 x 3.3 x 1.4 VLF3010AT-2R2M1R0 2.6 x 2.8 x 1.0 TDK NR3010T2R2M 3.0 x 3.0 x 1.0 Taiyo-Yuden If a higher value inductor is used the LM3204 may become unstable and exhibit large under or over shoot during line, load and VCON transients. If smaller inductance value is used, slope compensation maybe insufficient causing subharmonic oscillations. The device has been tested with inductor values in the range 1.55µH to 3.1µH to account for inductor tolerances. For low-cost applications, an unshielded bobbin inductor can be used. For noise-critical applications, an unshielded or shielded-bobbin inductor should be used. A good practice is to layout the board with footprints accommodating both types for design flexibility. This allows substitution of an unshielded inductor, in the event that noise from low-cost bobbin models is unacceptable. Saturation occurs when the magnetic flux density from current through the windings of the inductor exceeds what the inductor’s core material can support with a corresponding magnetic field. This can cause poor efficiency, regulation errors or stress to a DC-DC converter like the LM3204. CAPACITOR SELECTION The LM3204 is designed to be used with ceramic capacitors. Use a 10µF ceramic capacitor for the input and a 4.7µF ceramic capacitor for the output. Ceramic capacitors such as X5R, X7R and B are recommended for both filters. These provide an optimal balance between small size, cost, reliability and performance for cell phones and similar applications. Table 2 lists suggested capacitors and suppliers. TABLE 2. Suggested Capacitors and Their Suppliers Model Size (EIA) Vendor LMK212BJ475MG 2012 (0805) Taiyo-Yuden C2012X5R1A475K 2012 (0805) TDK C3216X5R1A106K 3216 (1206) TDK The DC bias characteristics of the capacitor must be considered when making the selection. If smaller case size such as 1608 (0603) is selected, the dc bias could reduce the cap www.national.com 14 up from ground, through the LM3204 by the inductor, to the output filter capacitor and then back through ground, forming a second current loop. Routing these loops so the current curls in the same direction, prevents magnetic field reversal between the two half-cycles and reduces radiated noise. 4. Connect the ground pins of the LM3204, and filter capacitors together using generous component side copper fill as a pseudo-ground plane. Then connect this to the ground-plane (if one is used) with several vias. This reduces ground plane noise by preventing the switching currents from circulating through the ground plane. It also reduces ground bounce at the LM3204 by giving it a low impedance ground connection. (Continued) BOARD LAYOUT CONSIDERATIONS PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss in the traces. These can send erroneous signals to the DC-DC converter, resulting in poor regulation or instability. Poor layout can also result in re-flow problems leading to poor solder joints between the Micro SMD package and board pads. Poor solder joints can result in erratic or degraded performance. Good layout for the LM3204 can by implemented by following a few simple design rules. 1. Place the LM3204 on 10.82 mil pads. As a thermal relief, connect to each pad with a 7 mil wide, approximately 7 mil long traces, and when incrementally increase each trace to its optimal width. The important criterion is symmetry to ensure the solder bumps on the LM3204 re-flow evenly (see Micro SMD Package Assembly and Use). 2. Place the LM3204, inductor and filter capacitors close together and make the trace short. The traces between these components carry relatively high switching currents and act as antennas. Following this rule reduces radiated noise. Place the capacitors and inductor close to the LM3204. The input capacitor should be placed right next to the device between PVIN and PGND pin. 3. Arrange the components so that the switching current loops curl in the same direction. During the first half of each cycle, current flows from the input filter capacitor, through the LM3204 and inductor to the output filter capacitor and back through ground, forming a current loop. In the second half of each cycle, current is pulled 5. Use wide traces between the power components and for power connections to the DC-DC converter circuit. This reduces voltage errors caused by resistive losses across the traces. 6. Route noise sensitive traces, such as the voltage feedback trace, away from noisy traces and components. The voltage feedback trace must remain close to the LM3204 circuit and should be routed directly from FB pin to VOUT at the output capacitor. A good approach is to route the feedback trace on another layer and to have a ground plane between the top layer and the layer on which the feedback trace is routed. This reduces EMI radiation on to the DC-DC converter’s own voltage feedback trace. 7. It is recommended to connect BYPOUT pin to VOUT at the output capacitor using a separate trace, instead of connecting it directly to the FB pin for better noise immunity. 15 www.national.com LM3204 Application Information LM3204 Miniature, Adjustable, Step-Down DC-DC Converter with Bypass Mode for RF Power Amplifiers Physical Dimensions inches (millimeters) unless otherwise noted 10-Bump Thin Micro SMD, Large Bump X1 = 1.819mm ± 0.030mm X2 = 2.174mm ± 0.030mm X3 = 0.600mm ± 0.075mm NS Package Number TLP10NHA National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. 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