EDI8F3232C 32Kx32 SRAM Module 32Kx32 Static RAM CMOS, High Speed Module Features The EDI8F3232C is a high speed megabit Static RAM module organized as 32Kx32. This module is constructed from four 32Kx8 Static RAMs in SOJ packages on an epoxy laminate (FR4) board. Four chip enables (EØ-E3) are used to independently enable the four bytes. Reading or writing can be executed on individual bytes or any combination of multiple bytes through proper use of selects. The EDI8F3232C is offered in both 64 lead SIMM and 64 pin ZIP packages, which enables one megabit of memory to be placed in less than 1.2 square inches of board space. All inputs and outputs are TTL compatible and operate from a single 5V supply. Fully asynchronous circuitry is used, requiring no clocks or refreshing for operation and providing equal access and cycle times for ease of use. 32Kx32 bit CMOS Static Random Access Memory • Access Times 12, 15, 20, and 25ns • Individual Byte Selects • Output Enable Function • Fully Static, No Clocks • TTL Compatible I/O High Density Packaging • 64 Pin SIMM, No. 54 • 64 Pin ZIP, No. 57 • JEDEC Standard Pinout • Common Data Inputs and Outputs Single +5V (±10%) Supply Operation Pin Names Pin Configurations and Block Diagram ZIP PD1 DQØ DQ1 DQ2 DQ3 VCC A7 A8 A9 DQ4 DQ5 DQ6 DQ7 W A14 EØ 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 E2 NC VSS DQ16 DQ17 DQ18 DQ19 A10 A11 A12 A13 DQ20 DQ21 DQ22 DQ23 VSS 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 SIMM 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 VSS PD2 DQ8 DQ9 DQ10 DQ11 AØ A1 A2 DQ12 DQ13 DQ14 DQ15 VSS NC E1 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 E3 NC G DQ24 DQ25 DQ26 DQ27 A3 A4 A5 VCC A6 DQ28 DQ29 DQ30 DQ31 VSS PD2 DQ8 DQ9 DQ10 DQ11 AØ A1 A2 DQ12 DQ13 DQ14 DQ15 VSS NC E1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 E3 NC G DQ24 DQ25 DQ26 DQ27 A3 A4 A5 VCC A6 DQ28 DQ29 DQ30 DQ31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 PD1 DQØ DQ1 DQ2 DQ3 VCC A7 A8 A9 DQ4 DQ5 DQ6 DQ7 W A14 EØ 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 E2 NC VSS DQ16 DQ17 DQ18 DQ19 A10 A11 A12 A13 DQ20 DQ21 DQ22 DQ23 VSS Pin Names A0-A14 EØ-E3 W G DQØ-DQ31 VCC VSS NC Address Inputs Chip Enable Write Enable Output Enable Common Data Input/Output Power (+5V±10%) Ground No Connection AØ-A14 W G 15 8 DQØ-DQ7 EØ PD1=Open PD2 = VSS 8 DQ8-DQ15 E1 8 DQ16-DQ23 E2 8 E3 Electronic Designs Incorporated • One Research Drive • Westborough, MA 01581USA • 508-366-5151 • FAX 508-836-4850 • Electronic Designs Europe Ltd. • Shelley House, The Avenue • Lightwater, Surrey GU18 5RF United Kingdom • 01276 472637 • FAX: 01276 473748 http://www.electronic-designs.com 1 EDI8F3232C Rev. 6 1/98 ECO #9601 DQ24-DQ31 Absolute Maximum Ratings* Recommended DC Operating Conditions Voltage on any pin relative to VSS Operating Temperature TA (Ambient) Commercial Industrial Storage Temperature Plastic Power Dissipation Output Current. Parameter Sym Supply Voltage VCC Supply Voltage VSS Input High Voltage VIH Input Low Voltage VIL -0.5V to 7.0V 0°C to +70°C -40°C to +85°C Min 4.5 0 2.2 -0.3 Typ 5.0 0 --- Max Units 5.5 V 0 V 6.0 V 0.8 V -55°C to +125°C 4 Watts 20 mA *Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. AC Test Conditions Input Pulse Levels Input Rise and Fall Times Input and Output Timing Levels Output Load VSS to 3.0V 5ns 1.5V 1TTL, CL =30pF (note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF) DC Electrical Characteristics Parameter Operating Power Supply Current Sym ICC1 Conditions W, E = VIL, II/O = 0mA, Min Cycle Standby (TTL) Power Supply Current Full Standby Power Supply Current CMOS Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage ICC2 E ≥ VIH, VIN ≤ VIL VIN ≥ VIH E ≥ VCC-0.2V VIN ≥ VCC-0.2V or VIN ≤ 0.2V VIN = 0V to VCC V I/O = 0V to VCC IOH =-4.0mA IOL = 8.0mA ICC3 ILI ILO VOH VOL 12ns 15ns 20ns 25ns Min ------ Typ* -- --2.4 -- ----- Max 640 600 560 520 225 Units mA mA mA mA mA 80 mA ±20 ±20 µA µA V V -0.4 *Typical: TA = 25°C, VCC = 5.0V Capacitance Truth Table G X H L X E H L L L W X H H L Mode Standby Output Deselect Read Write Output High Z High Z DOUT DIN Power ICC2, ICC3 ICC1 ICC1 ICC1 (f=1.0MHz, VIN=VCC or VSS) Parameter Parameter Address LInes Data Lines Chip Enable Line Control Lines Sym Sym CI CD/Q CC CW These parameters are sampled, not 100% tested. EDI8F3232C 32Kx32 SRAM Module 2 EDI8F3232C Rev. 6 1/98 ECO #9601 Max Max 60 20 20 60 Unit Unit pF pF pF pF EDI8F3232C 32Kx32 SRAM Module AC Characteristics Read Cycle Parameter Read Cycle Time Address Access Time Chip Enable Access Time Chip Enable to Output in Low Z (1) Chip Disable to Output in High Z (1) Output Hold from Address Change Output Enable to Output Valid Output Enable to Output in Low Z (1) Output Disable to Output in High Z(1) Symbol JEDEC Alt. TAVAV TRC TAVQV TAA TELQV TACS TELQX TCLZ TEHQZ TCHZ TAVQX TOH TGLQV TOE TGLQX TOLZ TGHQZ TOHZ 12ns Min Max 12 12 12 5 0 5 3 6 0 0 5 15ns Min Max 15 15 15 5 0 9 3 8 0 0 8 Min 20 20ns Max 20 20 5 0 3 11 10 0 0 10 Note 1: Parameter guaranteed, but not tested. Read Cycle 1 - W High, G, E Low TAVAV ADDRESS 1 A TAVQV ADDRESS 2 TAVQX DATA 1 Q DATA 2 Read Cycle 2 - W High TAVAV A E TAVQV TELQV TEHQZ TELQX G TGLQV TGHQZ TGLQX Q 3 EDI8F3232C Rev. 6 1/98 ECO #9601 25ns Min Max Units 25 ns 25 ns 25 ns 5 ns 0 13 ns 3 ns 12 ns 0 ns 0 10 ns AC Characteristics Write Cycle Symbol JEDEC Alt. TAVAV TWC TELWH TCW TELEH TCW Address Setup Time TAVWL TAS TAVEL TAS Address Valid to End of Write TAVWH TAW TAVEH TAW Write Pulse Width TWLWH TWP TWLEH TWP Write Recovery Time TWHAX TWR TEHAX TWR Data Hold Time TWHDX TDH TEHDX TDH Write to Output in High Z (1) TWLQZ TWHZ Data to Write Time TDVWH TDW TDVEH TDW Output Active from End of Write (1) TWHQX TWLZ 12ns Min Max 12 10 10 0 0 10 10 10 10 0 0 0 0 0 3 7 7 0 Parameter Write Cycle Time Chip Enable to End of Write 15ns Min Max 15 12 12 0 0 12 12 11 11 0 0 0 0 0 3 8 8 0 20ns Min Max 20 13 13 0 0 13 13 12 12 0 0 0 0 0 3 9 9 0 Note 1: Parameter guaranteed, but not tested. Write Cycle 1 - W Controlled TAVAV A E TELWH TAVWH TWHAX TWLWH W TAVWL TDVWH D TWHDX DATA VALID TWLQZ TWHQX HIGH Z Q Write Cycle 2 - E Controlled TAVAV A TAVEL TELEH E TEHAX TAVEH TWLEH W TDVEH DATA VALID D Q HIGH Z EDI8F3232C 32Kx32 SRAM Module 4 EDI8F3232C Rev. 6 1/98 ECO #9601 TEHDX 25ns Min Max Units 25 ns 15 ns 15 ns 0 ns 0 ns 15 ns 15 ns 15 ns 15 ns 0 ns 0 ns 0 ns 0 ns 0 5 ns 10 ns 10 ns 0 ns EDI8F3232C 32Kx32 SRAM Module Ordering Information Part Number EDI8F3232C12MMC EDI8F3232C15MMC EDI8F3232C20MMC EDI8F3232C25MMC EDI8F3232C12MZC EDI8F3232C15MZC EDI8F3232C20MZC EDI8F3232C25MZC Speed (ns) 12 15 20 25 12 15 20 25 Package No. 54 54 54 54 57 57 57 57 Note: To order an Industrial grade product change the last C in the suffix to I, eg. EDI8F3232C25MZC becomes EDI8F3232C25MZI. Package Description Package No. 54 64 Pin SIMM Module 0.125 Dia. Typ. (2 Plcs.) 3.855 0.213 MAX 3.584 0.400 0.250 0.400 0.520 MAX P64 P1 0.080 0.050 TYP 31 x 0.050 1.550 Ref. 0.250 TYP 0.125 MIN 0.62R Package No. 57 64 Pin ZIP Module 3.660 3.640 0.050 0.225 MAX 0.530 MAX 0.050 0.130 0.120 0.165 0.135 0.022 0.018 0.250 TYP 5 EDI8F3232C Rev. 6 1/98 ECO #9601 0.100 Typ 0.050 Typ 0.008 0.014 0.100 Typ Electronic Designs Incorporated • One Research Drive • Westborough, MA 01581USA • 508-366-5151 • FAX 508-836-4850 • Electronic Designs Europe Ltd. • Shelley House, The Avenue • Lightwater, Surrey GU18 5RF United Kingdom • 01276 472637 • FAX: 01276 473748 http://www.electronic-designs.com ElectronicSRAM Designs Inc. reserves the right to change specifications without notice. CAGE No. 66301 32Kx32 Module EDI8F3232C 6 EDI8F3232C Rev. 6 1/98 ECO #9601