EDI8L32128C 128Kx32 CMOS High Speed Static RAM FEATURES DESCRIPTION ■ 128Kx32 bit CMOS Static The EDI8L32128C is a high speed, high performance, four megabit density Static RAM organized as a 128Kx32 bit array. ■ Random Access Memory Array Four Chip Enables, Write Control, and Output Enable provide the user with a flexible memory solution. The user may independently enable each of the four bytes, and, with minimal additional peripheral logic, the unit may be configured as a 256Kx16 or 512Kx8 array. • Fast Access Times: 12, 15, 17, 20, and 25ns • Individual Byte Enables • User Configurable Organization with Minimal Additional Logic Fully asynchronous circuitry is used, requiring no clocks or refreshing for operation and providing equal access and cycle times for ease of use. • Master Output Enable and Write Control • TTL Compatible Inputs and Outputs • Fully Static, No Clocks • 68 Lead PLCC, No. 99 (JEDEC MO-47AE) The EDI8L32128C, allows 4 megabits of memory to be placed in less than 0.990 square inches of board space; a savings of 0.885 square inches over four standard 128Kx8 components. • Small Footprint, 0.990 Sq. In. NOTE: Solder Reflow temperature should not exceed 230°C ■ Surface Mount Package • Multiple Ground Pins for Maximum Noise Immunity ■ Single +5V (±5%) Supply Operation FIG. 1 PIN CONFIGURATION PIN DESCRIPTION 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 DQ16 NC NC E3 E2 E1 E0 NC VCC NC NC G W A16 A15 A14 DQ15 TOP VIEW 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 DQ14 DQ13 DQ12 VSS DQ11 DQ10 DQ9 DQ8 VCC DQ7 DQ6 DQ5 DQ4 VSS DQ3 DQ2 DQ1 Address Inputs EØ-3 Chip Enables (One per Byte) W Master Write Enable G Master Output Enable DQØ-31 Common Data Input/Output VCC Power (+5V±5%) VSS Ground NC No Connection BLOCK DIAGRAM A0-16 17 G W E0 E1 E2 E3 DQ31 A6 A5 A4 A3 A2 A1 A0 VCC A13 A12 A11 A10 A9 A8 A7 DQ0 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 DQ17 DQ18 DQ19 VSS DQ20 DQ21 DQ22 DQ23 VCC DQ24 DQ25 DQ26 DQ27 VSS DQ28 DQ29 DQ30 AØ-16 128K x 32 Memory Array DQ0-DQ7 DQ8-DQ15 DQ16-DQ23 DQ24-DQ31 NOTE: Pin 2 & 67 on the 64Kx32 (EDI8L3265C) and the 256Kx32 (EDI8L32256C) are word select pins. December 2000 Rev. 5 ECO #13525 1 White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com EDI8L32128C ABSOLUTE MAXIMUM RATINGS* Voltage on any pin relative to VSS Operating Temperature TA (Ambient) Commercial Industrial Storage Temperature Power Dissipation Output Current. Junction Temperature, TJ RECOMMENDED DC OPERATING CONDITIONS -0.5V to 7.0V Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage 0°C to + 70°C -40°C to +85°C -55°C to +125°C 4 Watts 20 mA 175°C Parameter Address Lines Data Lines Write & Output Enable Lines Chip Enable Lines/Byte Select TRUTH TABLE W X H X H L G X H X L X Mode Standby Output Disable Output Disable Read Write Output High Z High Z High Z DOUT DIN Min 4.75 0 2.2 -0.3 Typ 5.0 0 --- Max 5.25 0 VCC+0.5 0.8 Units V V V V CAPACITANCE (f = 1.0MHz, VIN = V CC or VSS) *Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. E H L L L L Sym VCC VSS VIH VIL Sym CA CD/Q W, G E0-3 Max 40 10 40 8 Unit pF pF pF pF Power ICC2,ICC3, ICC1 ICC1 ICC1 ICC1 DC ELECTRICAL CHARACTERISTICS Parameter Sym Operating Power Supply Current ICC1 Standby (TTL) Supply Current ICC2 Full Standby CMOS Supply Current ICC3 Input Leakage Current Output Leakage Current Output High Volltage Output Low Voltage Conditions W= VIL, II/O = 0mA, Min Cycle E ≥ VIH, VIN ≤ VIL or VIN ≥ VIH, f = ØMHz E ≥ VCC -0.2V VIN ≥ VCC -0.2V or VIN ≤ 0.2V VIN = 0V to VCC V I/O = 0V to VCC IOH = -4.0mA IOL = 8.0mA ILI ILO VOH VOL Typ 620 Max Units 12* 720 15 680 17 640 20/25 600 mA 160 160 160 160 mA 20 20 20 20 mA ±10 ±10 µA µA V V 2.4 0.4 Typical: TA = 25°C, VCC = 5.0V AC TEST CONDITIONS Figure 2 Input Pulse Levels Input Rise and Fall Times Input and Output Timing Levels Output Load Figure 3 Vcc Vcc 480Ω 480Ω VSS to 3.0V 5ns 1.5V Figure 2 NOTE: For tEHQZ, tGHQZ and tWLQZ, CL = 5pF Figure 3) Q Q 255Ω 30pF 255Ω 5pF White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com 2 December 2000 Rev. 5 ECO #13525 EDI8L32128C AC CHARACTERISTICS - READ CYCLE Parameter Read Cycle Time Address Access Time Chip Enable Access Time Chip Enable to Output in Low Z (1) Chip Disable to Output in High Z (1) Output Hold from Address Change Output Enable to Output Valid Output Enable to Output in Low Z (1) Output Disable to Output in High Z(1) Symbol JEDEC Alt. tAVAV tRC tAVQV tAA tELQV tACS tELQX tCLZ tEHQZ tCHZ tAVQX tOH tGLQV tOE tGLQX tOLZ tGHQZ tOHZ 12ns Min Max 12 12 8 2 7 3 5 2 4 15ns Min Max 15 15 10 3 8 3 6 2 5 Min 17 17ns Max 17 17 3 8 3 8 2 6 20ns Min Max 20 20 20 3 10 3 8 2 8 Min 25 25n Max 25 25 3 10 3 10 0 10 Units ns ns ns ns ns ns ns ns ns NOTE 1: Parameter guaranteed, but not tested. FIG. 4 READ CYCLE 1 - W HIGH, G, E LOW tAVAV A ADDRESS 1 ADDRESS 2 tAVQV tAVQX Q DATA 1 DATA 2 FIG. 5 READ CYCLE 2 - W HIGH tAVAV A tAVQV E tELQV tELQX tEHQZ tGLQV tGLQX tGHQZ G Q December 2000 Rev. 5 ECO #13525 3 White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com EDI8L32128C AC CHARACTERISTICS - WRITE CYCLE Symbol JEDEC Alt. tAVAV tWC tCW tELWH tELEH tCW tAVWL tAS tAVEL tAS tAW tAVWH tAVEH tAW tWLWH tWP tWLEH tWP tWHAX tWR tEHAX tWR tWHDX tDH tEHDX tDH tWLQZ tWHZ tDVWH tDW tDVEH tDW tWHQX tWLZ Parameter Write Cycle Time Chip Enable to End of Write Address Setup Time Address Valid to End of Write Write Pulse Width Write Recovery Time Data Hold Time Write to Output in High Z (1) Data to Write Time Output Active from End of Write (1) 12ns Min Max 12 8 8 0 0 9 9 9 9 0 0 0 0 0 5 5 5 2 15ns Min Max 15 9 9 0 0 10 10 10 10 0 0 0 0 0 6 6 6 2 Min 17 10 10 0 0 12 12 12 12 0 0 0 0 0 8 8 2 17ns Max 7 20ns Min Max 20 15 15 0 0 15 15 15 15 0 0 0 0 0 7 8 8 2 25ns Min Max 25 20 20 0 0 15 15 15 15 0 0 0 0 0 10 12 12 2 Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns NOTE: Parameter guaranteed, but not tested. FIG. 6 WRITE CYCLE 1 - W CONTROLLED tAVAV A tGLAX G tAVWH tELWH tWHAX E tAVWL tWLWH W tDVWH D tWHDX DATA VALID tWLQZ tWHQX HIGH Z Q FIG. 7 WRITE CYCLE 2 - E CONTROLLED tAVAV A tAVEH tELEH tEHAX E tAVEL tWLEH W tDVEH D Q White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com tEHDX DATA VALID HIGH Z 4 December 2000 Rev. 5 ECO #13525 EDI8L32128C PACKAGE DESCRIPTION PACKAGE NO. 99: 68 LEAD PLCC JEDEC MO-47AE 0.995 Max 0.956 Max 0.995 0.956 Max Max 0.180 Max 0.040 Max 0.020 0.015 0.050 BSC 0.930 0.890 0.115 Max ALL DIMENSIONS ARE IN INCHES ORDERING INFORMATION Commercial (0°C to +70°C) Part Number EDI8L32128C12AC EDI8L32128C15AC EDI8L32128C17AC EDI8L32128C20AC EDI8L32128C25AC December 2000 Rev. 5 ECO #13525 Speed (ns) 12 15 17 20 25 Industrial (-40°C to +85°C) Part Number Package No. 99 99 99 99 99 EDI8L32128C15AI EDI8L32128C17AI EDI8L32128C20AI 5 Speed (ns) 15 17 20 Package No. 99 99 99 White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com