ETC FST3384A

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FSB560/FSB560A
July 1998
FSB560 / FSB560A
C
E
B
TM
SuperSOT -3 (SOT-23)
NPN Low Saturation Transistor
These devices are designed with high current gain and low saturation voltage with collector currents up to 2A
continuous.
Absolute Maximum Ratings*
Symbol
TA = 25°C unless otherwise noted
Parameter
FSB560/FSB560A
Units
VCEO
Collector-Emitter Voltage
60
V
VCBO
Collector-Base Voltage
80
V
VEBO
Emitter-Base Voltage
5
V
IC
Collector Current - Continuous
2
A
TJ, Tstg
Operating and Storage Junction Temperature Range
-55 to +150
°C
*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.
NOTES:
1) These ratings are based on a maximum junction temperature of 150°C.
2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.
Thermal Characteristics
TA = 25°C unless otherwise noted
Max
Symbol
Characteristic
Units
FSB560/FSB560A
PD
Total Device Dissipation
500
mW
RθJA
Thermal Resistance, Junction to Ambient
250
°C/W
 1998 Fairchild Semiconductor Corporation
fsb560.lwpPrNA 7/1098 RevB
(continued)
Electrical Characteristics
Symbol
TA = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Max
Units
OFF CHARACTERISTICS
BVCEO
Collector-Emitter Breakdown Voltage
IC = 10 mA
60
V
BVCBO
Collector-Base Breakdown Voltage
IC = 100 µA
80
V
BVEBO
Emitter-Base Breakdown Voltage
IE = 100 µA
5
V
ICBO
Collector Cutoff Current
VCB = 30 V
100
VCB = 30 V, TA=100°C
10
nA
uA
VEB = 4V
100
nA
IEBO
Emitter Cutoff Current
ON CHARACTERISTICS*
hFE
DC Current Gain
IC = 100 mA, VCE = 2 V
70
IC=500mA, VCE =2V FSB560
100
FSB560A
VCE(sat)
Collector-Emitter Saturation Voltage
250
IC = 1 A, VCE = 2 V
80
IC = 2 A, VCE = 2 V
40
300
550
IC = 1 A, IB = 100 mA
300
mV
IC = 2 A, IB=200 mA FSB560
FSB560A
350
1.25
V
300
VBE(sat)
Base-Emitter Saturation Voltage
IC = 1 A, IB = 100 mA
VBE(on)
Base-Emitter On Voltage
IC = 1 A, VCE = 2 V
1
V
30
pF
SMALL SIGNAL CHARACTERISTICS
Cobo
Output Capacitance
VCB = 10 V, IE = 0, f = 1MHz
fT
Transition Frequency
IC = 100 mA,VCE = 5 V, f=100MHz
75
-
*Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
 1998 Fairchild Semiconductor Corporation
fsb560.lwpPrNA 7/1098 RevB
FSB560/FSB560A
NPN Low Saturation Transistor
1.4
β = 10
1.2
1
- 40 °C
0.8
0.6
25 °C
0.4
125 °C
0.2
0.001
0.01
0.1
1
I C - COLLECTOR CURRENT (A)
10
VBEON- BASE-EMITTER ON VOLTAGE (V)
Base-Emitter Saturation
Voltage vs Collector Current
Base-Emitter On Voltage vs.
Collector Current
1.4
Vce = 2.0V
1.2
1
- 40 °C
0.8
0.6
25 °C
0.4
125 °C
0.2
0.0001
Collector-Emitter Saturation
Voltage vs Collector Current
0.001
0.01
0.1
1
I C - COLLECTOR CURRENT (A)
10
Input/Output Capacitance vs.
Reverse Bias Voltage
450
0.8
β = 10
f = 1.0 MHz
0.6
125°C
25°C
0.4
- 40°C
0.2
CAPACITANCE (pf)
400
350
C ibo
300
250
200
150
100
C obo
50
0
0.001
0.01
0.1
1
I C- COLLECTOR CURRENT (mA)
10
0
0.1
0.2
0.5 1
2
5
10 20
V CE - COLLECTOR VOLTAGE (V)
50
100
Current Gain vs. Collector Current
700
Vce = 2.0V
600
H FE - CURRENT GAIN
VCESAT- COLLECTOR-EMITTER VOLTAGE (V)
VBESAT-BASE-EMITTER SATURATION VOLTAGE(V)
Typical Characteristics
125°C
500
400
25°C
300
- 40°C
200
100
0
0
0.5
1
1.5
2
2.5
3
I C - COLLECTOR CURRENT (mA)
3.5
NA
SuperSOTTM-3 Tape and Reel Data and Package Dimensions
SSOT-3 Packaging
Configuration: Figure 1.0
Customize Label
Packaging Description:
SSOT-3 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
3,000 units per 7" or 177cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 10,000 units per 13"
or 330cm diameter reel. This and some other options are
described in the Packaging Information table.
Antistatic Cover Tape
These full reels are individually labeled and placed inside
a standard intermediate made of recyclable corrugated
brown paper with a Fairchild logo printing. One pizza box
contains eight reels maximum. And these intermediate
boxes are placed inside a labeled shipping box which
comes in different sizes depending on the number of parts
shipped.
Human Readable Embossed
Label
Carrier Tape
3P
3P
3P
3P
SSOT-3 Std Packaging Information
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Reel Size
Box Dimension (mm)
Standard
(no flow code)
TNR
D87Z
SSOT-3 Std Unit Orientation
TNR
3,000
10,000
7" Dia
13"
187x107x183 343x343x64
Max qty per Box
24,000
30,000
Weight per unit (gm)
0.0097
0.0097
Weight per Reel (kg)
0.1230
0.4150
343mm x 342mm x 64mm
Intermediate box for D87Z Option
Human Readable Label
Note/Comments
Human Readable Label sample
Human Readable
Label
187mm x 107mm x 183mm
Intermediate Box for Standard Option
SSOT-3 Tape Leader and Trailer
Configuration: Figure 2.0
Carrier Tape
Cover Tape
Components
Trailer Tape
300mm minimum or
75 empty pockets
Leader Tape
500mm minimum or
125 empty pockets
August 1999, Rev. C
SuperSOTTM-3 Tape and Reel Data and Package Dimensions, continued
SSOT-3 Embossed Carrier Tape
Configuration: Figure 3.0
P0
P2
D0
D1
T
E1
W
F
E2
Wc
B0
Tc
A0
P1
K0
User Direction of Feed
Dimensions are in millimeter
Pkg type
A0
B0
SSOT-3
(8mm)
3.15
+/-0.10
2.77
+/-0.10
W
8.0
+/-0.3
D0
D1
E1
E2
1.55
+/-0.05
1.125
+/-0.125
1.75
+/-0.10
F
6.25
min
3.50
+/-0.05
P1
P0
4.0
+/-0.1
4.0
+/-0.1
K0
T
1.30
+/-0.10
0.228
+/-0.013
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
Wc
0.06
+/-02
0.5mm
maximum
20 deg maximum
Typical
component
cavity
center line
B0
5.2
+/-0.3
Tc
0.5mm
maximum
20 deg maximum component rotation
Typical
component
center line
Sketch A (Side or Front Sectional View)
A0
Component Rotation
Sketch C (Top View)
Component lateral movement
Sketch B (Top View)
SSOT-3 Reel Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A
Max
Dim A
max
See detail AA
Dim N
7" Diameter Option
B Min
Dim C
See detail AA
W3
13" Diameter Option
Dim D
min
W2 max Measured at Hub
DETAIL AA
Dimensions are in inches and millimeters
Tape Size
Reel
Option
Dim A
Dim B
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
2.165
55
0.331 +0.059/-0.000
8.4 +1.5/0
0.567
14.4
0.311 – 0.429
7.9 – 10.9
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
4.00
100
0.331 +0.059/-0.000
8.4 +1.5/0
0.567
14.4
0.311 – 0.429
7.9 – 10.9
8mm
7" Dia
7.00
177.8
8mm
13" Dia
13.00
330
Dim C
Dim D
Dim N
Dim W1
Dim W2
Dim W3 (LSL-USL)
July 1999, Rev. C
SuperSOTTM-3 Tape and Reel Data and Package Dimensions, continued
SuperSOT-3 (FS PKG Code 32)
1:1
Scale 1:1 on letter size paper
Di mensions shown below are in:
inches [mil limeters]
Part Weight per unit (gram): 0.0097
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
July 1998
FSB619
C
E
B
TM
SuperSOT -3 (SOT-23)
NPN Low Saturation Transistor
These devices are designed with high current gain and low saturation voltage with collector currents up to 3A
continuous.
Absolute Maximum Ratings*
Symbol
TA = 25°C unless otherwise noted
Parameter
FSB619
Units
VCEO
Collector-Emitter Voltage
50
V
VCBO
Collector-Base Voltage
50
V
VEBO
Emitter-Base Voltage
5
V
IC
Collector Current - Continuous
2
A
TJ, Tstg
Operating and Storage Junction Temperature Range
-55 to +150
°C
*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.
NOTES:
1) These ratings are based on a maximum junction temperature of 150°C.
2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.
Thermal Characteristics
TA = 25°C unless otherwise noted
Max
Characteristic
Symbol
Units
FSB619
PD
Total Device Dissipation*
Derate above 25°C
500
4
mW
mW/°C
RθJA
Thermal Resistance, Junction to Ambient
250
°C/W
 1998 Fairchild Semiconductor Corporation
Page 1 of 2
FSB619
Discrete Power & Signal
Technologies
FSB619
*Device mounted on FR-4 PCB 4.5” X 5”; mounting pad 0.02 in2 of 2oz copper.
NPN Low Saturation Transistor
(continued)
Electrical Characteristics
Symbol
TA = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Max
Units
OFF CHARACTERISTICS
BVCEO
Collector-Emitter Breakdown Voltage
IC = 10 mA
50
V
BVCBO
Collector-Base Breakdown Voltage
IC = 100 µA
50
V
BVEBO
Emitter-Base Breakdown Voltage
IE = 100 µA
5
V
ICBO
Collector Cutoff Current
VCB = 40 V
100
nA
IEBO
Emitter Cutoff Current
VEB = 4V
100
nA
ICES
Collector Emitter Cutoff Current
VCES = 40 V
100
nA
ON CHARACTERISTICS*
hFE
VCE(sat)
DC Current Gain
Collector-Emitter Saturation Voltage
IC = 10 mA, VCE = 2V
200
IC = 200 mA, VCE = 2V
300
IC = 1A, VCE = 2V
200
IC = 2A, VCE = 2V
100
-
IC = 100 mA, IB = 10 mA
20
IC = 1 A, IB = 10 mA
235
IC = 2 A, IB = 50 mA
320
mV
VBE(sat)
Base-Emitter Saturation Voltage
IC = 2 A, IB = 50 mA
1
V
VBE(on)
Base-Emitter On Voltage
IC = 2 A, VCE = 2 V
1
V
30
pF
SMALL SIGNAL CHARACTERISTICS
Cobo
Output Capacitance
VCB = 10 V, IE = 0, f = 1MHz
fT
Transition Frequency
IC = 50 mA,VCE = 10 V, f=100MHz
100
-
*Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
Page 2 of 2
fsb619.lwpPrNA 7/10/98 revC
FSB660/FSB660A
July 1998
FSB660 / FSB660A
C
E
B
TM
SuperSOT -3 (SOT-23)
PNP Low Saturation Transistor
These devices are designed with high current gain and low saturation voltage with collector currents up to 2A
continuous.
Absolute Maximum Ratings*
Symbol
TA = 25°C unless otherwise noted
Parameter
FSB660/FSB660A
Units
VCEO
Collector-Emitter Voltage
60
V
VCBO
Collector-Base Voltage
80
V
VEBO
Emitter-Base Voltage
5
V
IC
Collector Current - Continuous
2
A
TJ, Tstg
Operating and Storage Junction Temperature Range
-55 to +150
°C
*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.
NOTES:
1) These ratings are based on a maximum junction temperature of 150°C.
2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.
Thermal Characteristics
TA = 25°C unless otherwise noted
Max
Characteristic
Symbol
Units
FSB660/FSB660A
PD
Total Device Dissipation
500
mW
RθJA
Thermal Resistance, Junction to Ambient
250
°C/W
 1998 Fairchild Semiconductor Corporation
fsb660.lwpPrPA 7/10/98 RevB
(continued)
Electrical Characteristics
Symbol
TA = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Max
Units
OFF CHARACTERISTICS
BVCEO
Collector-Emitter Breakdown Voltage
IC = 10 mA
60
V
BVCBO
Collector-Base Breakdown Voltage
IC = 100 µA
80
V
BVEBO
Emitter-Base Breakdown Voltage
IE = 100 µA
5
V
ICBO
Collector Cutoff Current
VCB = 30 V
100
VCB = 30 V, TA=100°C
10
nA
uA
VEB = 4V
100
nA
IEBO
Emitter Cutoff Current
ON CHARACTERISTICS*
hFE
DC Current Gain
IC = 100 mA, VCE = 2 V
70
IC=500mA, VCE =2V FSB660
100
FSB660A
VCE(sat)
Collector-Emitter Saturation Voltage
250
IC = 1 A, VCE = 2 V
80
IC = 2 A, VCE = 2 V
40
300
550
IC = 1 A, IB = 100 mA
300
mV
IC = 2 A, IB=200 mA FSB660
FSB660A
350
1.25
V
300
VBE(sat)
Base-Emitter Saturation Voltage
IC = 1 A, IB = 100 mA
VBE(on)
Base-Emitter On Voltage
IC = 1 A, VCE = 2 V
1
V
30
pF
SMALL SIGNAL CHARACTERISTICS
Cobo
Output Capacitance
VCB = 10 V, IE = 0, f = 1MHz
fT
Transition Frequency
IC = 100 mA,VCE = 5 V, f=100MHz
75
-
*Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
fsb660.lwpPrPA 7/10/98 RevB
FSB660/FSB660A
PNP Low Saturation Transistor
1.4
β = 10
1.2
1
- 40°C
0.8
0.6
25°C
0.4
125°C
0.2
0.001
0.01
0.1
1
I C - COLLECTOR CURRENT (A)
10
VBEON- BASE-EMITTER ON VOLTAGE (V)
Base-Emitter Saturation
Voltage vs Collector Current
Base-Emitter On Voltage vs.
Collector Current
1.6
Vce = 2.0V
1.4
1.2
1
- 40°C
0.8
0.6
0.8
125°C
0.2
0.0001
0.001
0.01
0.1
1
I C - COLLECTOR CURRENT (A)
400
β = 10
f V=ce1.0MHz
= 2.0V
CAPACITANCE (pf)
350
0.6
10
Input/Output Capacitance vs.
Reverse Bias Voltage
0.7
125°C
0.5
25°C
0.4
0.3
- 40°C
0.2
0.1
0
0.01
25°C
0.4
Collector-Emitter Saturation
Voltage vs Collector Current
Cobo
300
250
200
150
C ibo
100
50
0.1
1
I C - COLLECTOR CURRENT (mA)
10
0
0.1
0.5 1
10 20
V CE - COLLECTOR VOLTAGE (V)
50
100
Current Gain vs. Collector Current
1000
900
H FE - CURRENT GAIN
VCESAT- COLLECTOR-EMITTER VOLTAGE (V)
VBESAT -BASE-EMITTER SATURATION VOLTAGE(V)
Typical Characteristics
125°C
Vce = 2.0V
800
700
600
25°C
500
400
300
200
- 40°C
100
0
0.0001
0.001
0.01
0.1
1
I C - COLLECTOR CURRENT (mA)
10
PA
SuperSOTTM-3 Tape and Reel Data and Package Dimensions
SSOT-3 Packaging
Configuration: Figure 1.0
Customize Label
Packaging Description:
SSOT-3 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
3,000 units per 7" or 177cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 10,000 units per 13"
or 330cm diameter reel. This and some other options are
described in the Packaging Information table.
Antistatic Cover Tape
These full reels are individually labeled and placed inside
a standard intermediate made of recyclable corrugated
brown paper with a Fairchild logo printing. One pizza box
contains eight reels maximum. And these intermediate
boxes are placed inside a labeled shipping box which
comes in different sizes depending on the number of parts
shipped.
Human Readable Embossed
Label
Carrier Tape
3P
3P
3P
3P
SSOT-3 Std Packaging Information
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Reel Size
Box Dimension (mm)
Standard
(no flow code)
TNR
D87Z
SSOT-3 Std Unit Orientation
TNR
3,000
10,000
7" Dia
13"
187x107x183 343x343x64
Max qty per Box
24,000
30,000
Weight per unit (gm)
0.0097
0.0097
Weight per Reel (kg)
0.1230
0.4150
343mm x 342mm x 64mm
Intermediate box for D87Z Option
Human Readable Label
Note/Comments
Human Readable Label sample
Human Readable
Label
187mm x 107mm x 183mm
Intermediate Box for Standard Option
SSOT-3 Tape Leader and Trailer
Configuration: Figure 2.0
Carrier Tape
Cover Tape
Components
Trailer Tape
300mm minimum or
75 empty pockets
Leader Tape
500mm minimum or
125 empty pockets
August 1999, Rev. C
SuperSOTTM-3 Tape and Reel Data and Package Dimensions, continued
SSOT-3 Embossed Carrier Tape
Configuration: Figure 3.0
P0
P2
D0
D1
T
E1
W
F
E2
Wc
B0
Tc
A0
P1
K0
User Direction of Feed
Dimensions are in millimeter
Pkg type
A0
B0
SSOT-3
(8mm)
3.15
+/-0.10
2.77
+/-0.10
W
8.0
+/-0.3
D0
D1
E1
E2
1.55
+/-0.05
1.125
+/-0.125
1.75
+/-0.10
F
6.25
min
3.50
+/-0.05
P1
P0
4.0
+/-0.1
4.0
+/-0.1
K0
T
1.30
+/-0.10
0.228
+/-0.013
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
Wc
0.06
+/-02
0.5mm
maximum
20 deg maximum
Typical
component
cavity
center line
B0
5.2
+/-0.3
Tc
0.5mm
maximum
20 deg maximum component rotation
Typical
component
center line
Sketch A (Side or Front Sectional View)
A0
Component Rotation
Sketch C (Top View)
Component lateral movement
Sketch B (Top View)
SSOT-3 Reel Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A
Max
Dim A
max
See detail AA
Dim N
7" Diameter Option
B Min
Dim C
See detail AA
W3
13" Diameter Option
Dim D
min
W2 max Measured at Hub
DETAIL AA
Dimensions are in inches and millimeters
Tape Size
Reel
Option
Dim A
Dim B
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
2.165
55
0.331 +0.059/-0.000
8.4 +1.5/0
0.567
14.4
0.311 – 0.429
7.9 – 10.9
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
4.00
100
0.331 +0.059/-0.000
8.4 +1.5/0
0.567
14.4
0.311 – 0.429
7.9 – 10.9
8mm
7" Dia
7.00
177.8
8mm
13" Dia
13.00
330
Dim C
Dim D
Dim N
Dim W1
Dim W2
Dim W3 (LSL-USL)
July 1999, Rev. C
SuperSOTTM-3 Tape and Reel Data and Package Dimensions, continued
SuperSOT-3 (FS PKG Code 32)
1:1
Scale 1:1 on letter size paper
Di mensions shown below are in:
inches [mil limeters]
Part Weight per unit (gram): 0.0097
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
FSB6726
FSB6726
C
E
B
SuperSOTTM-3
PNP General Purpose Amplifier
This device is designed for general purpose medium power amplifiers and switches requiring collector currents
to 1.0 A. Sourced from Process 77.
Absolute Maximum Ratings*
TA = 25°C unless otherwise noted
FSB660/FSB660A
Units
VCEO
Collector-Emitter Voltage
30
V
VCBO
Collector-Base Voltage
40
V
VEBO
Emitter-Base Voltage
5
V
IC
Collector Current - Continuous
1.5
A
TJ, Tstg
Operating and Storage Junction Temperature Range
-55 to +150
°C
Symbol
Parameter
*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.
NOTES:
1) These ratings are based on a maximum junction temperature of 150°C.
2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.
Thermal Characteristics
TA = 25°C unless otherwise noted
Max
Characteristic
Symbol
Units
FSB6726
PD
Total Device Dissipation
500
mW
RθJA
Thermal Resistance, Junction to Ambient
250
°C/W
 1999 Fairchild Semiconductor Corporation
Page 1 of 2
fsb6726lwp Pr77 RevA
(continued)
Electrical Characteristics
Symbol
TA = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Max
Units
OFF CHARACTERISTICS
BVCEO
Collector-Emitter Breakdown Voltage
IC = 10 mA
30
V
BVCBO
Collector-Base Breakdown Voltage
IC = 100 µA
40
V
BVEBO
Emitter-Base Breakdown Voltage
IE = 100 µA
5
V
ICBO
Collector Cutoff Current
VCB = 40 V
100
nA
IEBO
Emitter Cutoff Current
VEB = 5V
100
nA
ON CHARACTERISTICS*
hFE
DC Current Gain
IC = 100 mA, VCE = 1 V
60
IC = 1 A,
50
VCE = 1V
-
250
VCE(sat)
Collector-Emitter Saturation Voltage
IC = 1 A, IB = 100 mA
500
mV
VBE(on)
Base-Emitter On Voltage
IC = 1 A, VCE = 1 V
1.2
V
30
pF
25
-
SMALL SIGNAL CHARACTERISTICS
Ccb
Collector-Base Capacitance
VCB = 10 V, f = 1MHz
hfe
Small Signal Current Gain
IC= 50 mA,VCE = 10V, f=20MHz
2.5
*Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
Page 2 of 2
fsb6726lwp Pr77 RevA
FSB6726
PNP General Purpose Amplifier
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
FSBCW30
C
E
B
SuperSOTTM-3
PNP General Purpose Amplifier
This device is designed for general purpose medium power
amplifiers and switches requiring collector currents to 300 mA.
Sourced from Process 68. See BC857A for characteristics.
Absolute Maximum Ratings*
Symbol
TA = 25°C unless otherwise noted
Parameter
Value
Units
32
V
Collector-Base Voltage
32
V
Emitter-Base Voltage
5.0
V
IC
Collector Current - Continuous
500
mA
TJ, Tstg
Operating and Storage Junction Temperature Range
-55 to +150
°C
VCEO
Collector-Emitter Voltage
VCBO
VEBO
*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.
NOTES:
1) These ratings are based on a maximum junction temperature of 150 degrees C.
2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.
Thermal Characteristics
Symbol
PD
RθJA
TA = 25°C unless otherwise noted
Characteristic
Total Device Dissipation
Derate above 25°C
Thermal Resistance, Junction to Ambient
*Device mounted on FR-4 PCB 4.5" x 5"; mounting pad 0.02 in
 1998 Fairchild Semiconductor Corporation
2
Max
Units
FSBCW30
500
4
250
mW
mW/°C
°C/W
of 2oz copper.
FSBCW30, Rev B
FSBCW30
Discrete POWER & Signal
Technologies
(continued)
Electrical Characteristics
Symbol
TA = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Max
Units
OFF CHARACTERISTICS
B V CEO
C ollector-E m itter B reakdow n
V oltage
C ollector-B ase B reakdow n V oltage
I C = 2.0 m A , I B = 0
32
V
I C = 10 µA , I E = 0
32
V
I C = 10 µA , I E = 0
32
V
B V EBO
C ollector-E m itter B reakdow n
V oltage
E m itter-B ase B reakdow n V oltage
I E = 10 µA , I C = 0
5.0
IC B O
C ollector-C utoff C urrent
V C B = 32 V , I E = 0
V C B = 32 V , I E = 0, T A = + 100
°C
B V CBO
B V CES
V
100
10
nA
µA
ON CHARACTERISTICS
hFE
DC Current Gain
VCE = 5.0 V, IC = 2.0 mA
VCE(sat)
Collector-Emitter Saturation Voltage
IC = 10 mA, IB = 0.5 mA
VBE(on)
Base-Emitter On Voltage
VCE = 5.0 V, IC = 2.0 mA
215
0.60
500
0.30
V
0.75
V
10
dB
SMALL SIGNAL CHARACTERISTICS
NF
Noise Figure
VCE = 5.0 V, IC = 200 µA,
RS = 2.0 kΩ, f = 1.0 kHz,
BW = 200 Hz
FSBCW30, Rev B
FSBCW30
PNP General Purpose Amplifier
(continued)
500
V CE = 5V
125 °C
400
300
25 °C
200
100
- 40 °C
0
0.01
0.1
1
10
100
IC - COLLECTOR CURRENT (mA)
Base-Emitter Saturation
Voltage vs Collector Current
1.2
β = 10
1
0.8
- 40 ºC
25 °C
125 ºC
0.6
0.4
0.2
0
0.1
1
10
100
I C - COLLECTOR CURRENT (mA)
300
VCESAT- COLLECTOR EMITTER VOLTAGE (V)
Typical Pulsed Current Gain
vs Collector Current
VBEON - BASE EMITTER ON VOLTAGE (V)
VBESAT- BASE EMITTER VOLTAGE (V)
hFE - TYPICAL PULSED CURRENT GAIN
Typical Characteristics
Collector-Emitter Saturation
Voltage vs Collector Current
0.3
0.2
0.15
25 °C
0.1
0.05
1
0.1
0.01
25
50
75
100
T A - AMBIENT TEMPERATURE ( º C)
125
- 40 ºC
1
10
100
I C - COLLECTOR CURRENT (mA)
300
P 68
Base Emitter ON Voltage vs
Collector Current
1
0.8
- 40 ºC
25 °C
0.6
125 ºC
0.4
V CE = 5V
0.2
BV CER - BREAKDOWN VOLTAGE (V)
ICBO- COLLECTOR CURRENT (nA)
V CB = 50V
10
125 ºC
0
0.1
0
0.1
1
10
I C - COLLECTOR CURRENT (mA)
100 200
Collector-Emitter Breakdown
Voltage with Resistance
Between Emitter-Base
Collector-Cutoff Current
vs. Ambient Temperature
100
β = 10
0.25
95
90
85
80
75
70
0.1
1
10
100
1000
RESISTANCE (kΩ )
FSBCW30, Rev B
FSBCW30
PNP General Purpose Amplifier
(continued)
(continued)
Input and Output Capacitance
vs Reverse Voltage
Collector Saturation Region
4
100
Ta = 25°C
f = 1.0 MHz
CAPACITANCE (pF)
VCE - COLLECTOR-EMITTER VOLTAGE (V)
Typical Characteristics
3
Ic =
2
100 uA
300 mA
50 mA
1
10
Cib
Cob
0
100
300
700
2000 4000
0.1
1
10
100
Vce- COLLECTOR VOLTAGE(V)
Switching Times vs
Collector Current
Gain Bandwidth Product
vs Collector Current
300
40
270
Vce = 5V
ts
240
30
TIME (nS)
210
20
180
IB1 = IB2 = Ic / 10
V cc = 10 V
150
120
90
10
tf
60
30
0
10
0
1
10
20
50
100 150
tr
td
20
30
50
100
200
I C - COLLECTOR CURRENT (mA)
I C- COLLECTOR CURRENT (mA)
300
P 68
Power Dissipation vs
Ambient Temperature
700
P D - POWER DISSIPATION (mW)
f T - GAIN BANDWIDTH PRODUCT (MHz)
I B - BASE CURRENT (uA)
600
500
TO-92
SOT-23
400
300
200
100
0
0
25
50
75
100
TEMPERATURE ( o C)
125
150
FSBCW30, Rev B
FSBCW30
PNP General Purpose Amplifier
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Revised December 1999
FST16209
18-Bit Bus Exchange Switch
General Description
Features
The Fairchild Switch FST16209 provides 18-bits of highspeed CMOS TTL-compatible bus switching or exchanging. The low on resistance of the switch allows inputs to be
connected to outputs without adding propagation delay or
generating additional ground bounce noise.
■ 4Ω switch connection between two ports.
The device operates as a 18-bit bus switch or a 9-bit bus
exchanger, which allows data exchange between the four
signal ports via the data-select terminals.
■ Control inputs compatible with TTL level.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
Ordering Code:
Order Number
Package Number
Package Description
FST16209MEA
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
FST16209MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Truth Table
S2
S1
S0
L
L
L
L
L
H
L
H
L
L
H
H
H
L
H
L
H
H
H
H
A1
A2
Function
Z
Z
Disconnect
B1
Z
A1 = B1
B2
Z
A1 = B2
Z
B1
A2 = B1
L
Z
B2
A2 = B2
Pin Name
Description
H
Z
Z
Disconnect
S2, S1, S0
Data-select inputs
L
B1
B2
A1 = B1 , A2 = B2
A1, A2
Bus A
H
B2
B1
A1 = B2 , A2 = B1
B1, B2
Bus B
© 1999 Fairchild Semiconductor Corporation
DS500056
Pin Descriptions
www.fairchildsemi.com
FST16209 18-Bit Bus Exchange Switch
September 1997
FST16209
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC )
Recommended Operating
Conditions (Note 3)
−0.5V to +7.0V
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN)(Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN<0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT ) Sink Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
Free Air Operating Temperature (TA)
−40 °C to +85 °C
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
TA = −40 °C to +85 °C
Typ
(Note 4)
Min
Units
Conditions
Max
−1.2
IIN = −18mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0 ≤ VIN ≤ 5.5V
0
10
µA
VIN = 5.5V
±1.0
µA
0 ≤ A, B ≤ VCC
7
Ω
VIN = 0V, IIN = 64mA
4.5
IOFF
OFF-STATE Leakage Current
5.5
RON
Switch On Resistance
4.5
(Note 5)
2.0
V
V
4
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
4.5
8
12
Ω
VIN = 2.4V, IIN = 15mA
4.0
14
20
Ω
VIN = 2.4V, IIN = 15mA
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and T A = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
TA = −40 °C to +85 °C,
Symbol
Parameter
CL = 50pF, RU = RD = 500Ω
VCC = 4.5 − 5.5V
Min
tPHL, tPLH
Prop Delay Bus to Bus (Note 6)
tPHL, tPLH
Prop Delay S to Bus
tPZH, tPZL
Output Enable Time, S to A or B
VCC = 4.0V
Max
Min
Units
Conditions
Max
0.25
0.25
ns
VI = OPEN
Figure 1
Figure 2
1.5
7.0
7.0
ns
VI = OPEN
Figure 1
Figure 2
1.5
7.5
8.0
ns
VI = 7V for tPZL
Figure 1
Figure 2
VI = OPEN for tPZH
tPHZ, tPLZ
Output Disable Time S to A or B
Figure No.
1.0
8.5
9.0
ns
VI = 7V for tPLZ
VI = OPEN for tPHZ
Figure 1
Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance (Note 7)
Symbol
Parameter
Typ
Max
Units
Conditions
CIN
Control pin Input Capacitance
3
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
10
pF
VCC = 5.0V,
S0, S1, and S2 = GND
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: CL includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST16209
AC Electrical Characteristics
FST16209
Physical Dimensions inches (millimeters) unless otherwise noted
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
Package Number MS48A
www.fairchildsemi.com
4
FST16209 18-Bit Bus Exchange Switch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
5
www.fairchildsemi.com
Revised December 1999
FST16210
20-Bit Bus Switch
General Description
Features
The Fairchild Switch FST16210 provides 20-Bits of highspeed CMOS TTL-compatible bus switching. The low on
resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise.
■ 4Ω switch connection between two ports.
The device is organized as a 10-bit or 20-Bit bus switch.
When OE1 is LOW, the switch is ON and Port 1A is connected to Port 1B. When OE2 is LOW, Port 2A is connected
to Port 2B.
■ Control inputs compatible with TTL level.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
Ordering Code:
Order Number
Package Number
Package Description
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
FST16210MTD
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Logic Diagram
Truth Table
Pin Descriptions
Pin Name
Inputs
Inputs/Outputs
Description
OE1
OE2
1A, 1B
2A, 2B
OE1, OE2
Bus Switch Enables
L
L
1A = 1B
2A = 2B
1A, 2A
Bus A
L
H
1A = 1B
Z
1B, 2B
Bus B
H
L
Z
2A = 2B
H
H
Z
Z
© 1999 Fairchild Semiconductor Corporation
DS500193
www.fairchildsemi.com
FST16210 20-Bit Bus Switch
November 1998
FST16210
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC )
Recommended Operating
Conditions (Note 3)
−0.5V to +7.0V
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN) (Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN<0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT ) Sink Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
-40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held high or low. They may not float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
TA = −40 °C to +85 °C
Typ
(Note 4)
Min
Max
−1.2
Units
Conditions
IIN = −18mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0
10
µA
VIN = 5.5V
5.5
±1.0
µA
0 ≤A, B ≤VCC
IOZ
RON
4.5
OFF-STATE Leakage Current
2.0
V
V
0≤ VIN ≤5.5V
Switch On Resistance
4.5
4
7
Ω
VIN = 0V, IIN = 64mA
(Note 5)
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
VIN = 2.4V, IIN = 15mA
4.5
8
12
Ω
4.0
11
20
Ω
VIN = 2.4V, IIN = 15mA
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and T A = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
TA = −40 °C to +85 °C,
Symbol
Parameter
CL = 50pF, RU = RD = 500Ω
VCC = 4.5 – 5.5V
Min
tPHL,tPLH
Prop Delay Bus to Bus
(Note 6)
tPZH, tPZL
Output Enable Time
1.5
VCC = 4.0V
Max
Min
Units
Conditions
Figure No.
Max
0.25
0.25
ns
6.0
6.5
ns
VI = OPEN
Figure 1,
Figure 2
VI = 7V for tPZL
VI = OPEN for tPZH
tPHZ, tPLZ
Output Disable Time
1.5
7.0
7.2
VI = 7V for tPLZ
ns
VI = OPEN for tPHZ
Figure 1,
Figure 2
Figure 1,
Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
(Note 7)
Parameter
Typ
Max
Units
Conditions
CIN
Control pin Input Capacitance
3
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
6
pF
VCC, OE = 5.0V
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: C L includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST16210
AC Electrical Characteristics
FST16210 20-Bit Bus Switch
Physical Dimensions inches (millimeters) unless otherwise noted
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384(FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
www.fairchildsemi.com
4
Revised December 1999
FST16211
24-Bit Bus Switch
General Description
Features
The Fairchild Switch FST16211 provides 24-bits of highspeed CMOS TTL-compatible bus switching. The low on
resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise.
■ 4Ω switch connection between two ports.
The device is organized as a 12-bit or 24-bit bus switch.
When OE1 is LOW, the switch is ON and Port 1A is connected to Port 1B. When OE2 is LOW, Port 2A is connected
to Port 2B.
■ Control inputs compatible with TTL level.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
Ordering Code:
Order Number
Package Number
Package Description
FST16211MEA
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
FST16211MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Truth Table
Inputs
OE1
Inputs/Outputs
OE2
1A, 1B
2A, 2B
Pin Descriptions
L
L
1A = 1B
2A = 2B
Pin Name
Description
L
H
1A = 1B
Z
OE1, OE2
Bus Switch Enables
H
L
Z
2A = 2B
1A, 2A
Bus A
H
H
Z
Z
1B, 2B
Bus B
© 1999 Fairchild Semiconductor Corporation
DS500037
www.fairchildsemi.com
FST16211 24-Bit Bus Switch
July 1997
FST16211
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 3)
−0.5V to +7.0V
Supply Voltage (VCC )
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN) (Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN<0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT ) Sink Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
-40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
Parameter
VCC
(V)
TA = −40 °C to +85 °C
Min
Typ
(Note 4)
Units
Conditions
Max
−1.2
IIN = −18mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0≤ VIN ≤5.5V
0
10
µA
VIN = 5.5V
±1.0
µA
0 ≤A, B ≤VCC
4.5
2.0
V
V
IOZ
OFF-STATE Leakage Current
5.5
RON
Switch On Resistance
4.5
4
7
Ω
VIN = 0V, IIN = 64mA
(Note 5)
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
4.5
8
12
Ω
VIN = 2.4V, IIN = 15mA
4.0
11
20
Ω
VIN = 2.4V, IIN = 15mA
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and T A = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
TA = −40 °C to +85 °C,
Symbol
Parameter
CL = 50pF, RU = RD = 500Ω
VCC = 4.5 – 5.5V
Min
tPHL,tPLH
Prop Delay Bus to Bus (Note 6)
tPZH, tPZL
Output Enable Time
tPHZ, tPLZ
Output Disable Time
VCC = 4.0V
Max
Min
Units
Conditions
Figure No.
Max
0.25
0.25
ns
VI = OPEN
1.5
6.0
6.5
ns
VI = 7V for tPZL
1.5
7.0
7.2
ns
VI = 7V for tPLZ
Figure 1
VI = OPEN for tPHZ Figure 2
Figure 1
Figure 2
Figure 1
VI = OPEN for tPZH Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
(Note 7)
Parameter
Typ
Max
Units
Conditions
CIN
Control pin Input Capacitance
3
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
6
pF
VCC, OE = 5.0V
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: C L includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST16211
AC Electrical Characteristics
FST16211
Physical Dimensions inches (millimeters) unless otherwise noted
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
Package Number MS56A
www.fairchildsemi.com
4
FST16211 24-Bit Bus Switch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD56
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
5
www.fairchildsemi.com
Revised December 1999
FST16212
24-Bit Bus Exchange Switch
General Description
Features
The Fairchild Switch FST16212 provides 24-bits of highspeed CMOS TTL-compatible bus switching or exchanging. The low on resistance of the switch allows inputs to be
connected to outputs without adding propagation delay or
generating additional ground bounce noise.
■ 4Ω switch connection between two ports.
The device operates as a 24-bit bus switch or a 12-bit bus
exchanger, which allows data exchange between the four
signal ports via the data-select terminals.
■ Control inputs compatible with TTL level.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
Ordering Code:
Order Number
Package Number
Package Description
FST16212MEA
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
FST16212MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Truth Table
S2
S1
S0
A1
A2
Function
L
L
L
Z
Z
Disconnect
L
L
H
B1
Z
A1 = B1
L
H
L
B2
Z
A1 = B2
L
H
H
Z
B1
A2 = B1
H
L
L
Z
B2
A2 = B2
Pin Name
Description
H
L
H
Z
Z
Disconnect
S2, S1, S0
Data-select inputs
H
H
L
B1
B2
A1 = B1, A2 = B2
A1, A2
Bus A
B1
A1 = B2, A2 = B1
B1, B2
Bus B
H
H
H
B2
© 1999 Fairchild Semiconductor Corporation
DS500038
Pin Descriptions
www.fairchildsemi.com
FST16212 24-Bit Bus Exchange Switch
July 1997
FST16212
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 3)
−0.5V to +7.0V
Supply Voltage (VCC )
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN) (Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN<0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT ) Sink Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
−40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held high or low. They may not float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
TA = −40 °C to +85 °C
Typ
(Note 4)
Min
Max
−1.2
Units
Conditions
IIN = −18mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0≤ VIN ≤5.5V
0
10
µA
VIN = 5.5V
±1.0
µA
0 ≤A, B ≤VCC
7
Ω
VIN = 0V, IIN = 64mA
4.5
2.0
V
V
IOZ
OFF-STATE Leakage Current
5.5
RON
Switch On Resistance
4.5
4
(Note 5)
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
4.5
8
12
Ω
VIN = 2.4V, IIN = 15mA
4.0
14
20
Ω
VIN = 2.4V, IIN = 15mA
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and T A=+25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
TA = −40 °C to +85 °C,
Symbol
Parameter
CL = 50pF, RU = RD = 500Ω
VCC = 4.5 – 5.5V
Min
tPHL,tPLH
Prop Delay Bus to Bus (Note 6)
tPHL,tPLH
Prop Delay S to Bus
tPZH, tPZL
Output Enable Time, S to A or B
VCC = 4.0V
Max
Min
Units
Conditions
Max
0.25
0.25
ns
VI = OPEN
Figure 1
Figure 2
1.5
7.0
7.5
ns
VI = OPEN
Figure 1
Figure 2
1.5
7.5
8.0
ns
VI = 7V for tPZL
Figure 1
Figure 2
VI = OPEN for tPZH
tPHZ, tPLZ
Output Disable Time S to A or B
Figure No.
1.0
8.5
9.0
ns
VI = 7V for tPLZ
VI = OPEN for tPHZ
Figure 1
Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
(Note 7)
Parameter
Typ
Max
Units
Conditions
CIN
Control pin Input Capacitance
3
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
10
pF
VCC = 5.0V, S0, S1, or S2 =GND
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: CL includes load and stray capacitance
Note Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST16212
AC Electrical Characteristics
FST16212
Physical Dimensions inches (millimeters) unless otherwise noted
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
Package Number MS56A
www.fairchildsemi.com
4
FST16212 24-Bit Bus Exchange Switch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD56
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
5
www.fairchildsemi.com
Revised December 1999
FST16213
24-Bit Bus Exchange Switch
General Description
Features
The Fairchild Switch FST16213 provides 24-bits of highspeed CMOS TTL-compatible bus switching or exchanging. The low on resistance of the switch allows inputs to be
connected to outputs without adding propagation delay or
generating additional ground bounce noise.
■ 4Ω switch connection between two ports.
The device operates as a 24-bit bus switch or a 12-bit bus
exchanger, which allows data exchange between the four
signal ports via the data-select terminals.
■ Control inputs compatible with TTL level.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
Ordering Code:
Order Number
Package Number
Package Description
FST16213MEA
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
FST16213MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
© 1999 Fairchild Semiconductor Corporation
DS500039
www.fairchildsemi.com
FST16213 24-Bit Bus Exchange Switch
July 1997
FST16213
Connection Diagram
Pin Descriptions
Pin Name
Description
S2, S1, S0
Data-select inputs
A1 , A2
Bus A
B1 , B2
Bus B
Truth Table
S2 S1 S0
www.fairchildsemi.com
2
A1
A2
Function
L
L
L
Z
Z
Disconnect
L
L
H
B1
Z
A1 = B1
L
H
L
B2
Z
A1 = B2
A2 = B1
L
H
H
Z
B1
H
L
L
Z
B2
H
L
H A2 and B2 A1 and B2
H
H
L
B1
B2
A1 = B1, A2 = B2
H
H
H
B2
B1
A1 = B2, A2 = B1
A2 = B2
A1 = A2 = B2
Supply Voltage (VCC)
Recommended Operating
Conditions (Note 3)
−0.5V to +7.0V
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN) (Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN<0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT) Sink Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
−40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held high or low. They may not float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
TA = −40 °C to +85 °C
Typ
(Note 4)
Min
Max
−1.2
Units
Conditions
IIN = −18mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0≤ VIN ≤5.5V
0
10
µA
VIN = 5.5V
±1.0
µA
0 ≤A, B ≤VCC
4.5
2.0
V
V
IOZ
OFF-STATE Leakage Current
5.5
RON
Switch On Resistance
4.5
4
7
Ω
VIN = 0V, IIN = 64mA
A to B or B to A
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
(Note 5)
4.5
8
12
Ω
VIN = 2.4V, IIN = 15mA
4.0
11
20
Ω
VIN = 2.4V, IIN = 15mA
Switch On Resistance
4.5
10
14
Ω
VIN = 0V, IIN = 64mA
A1 to A2
4.5
10
14
Ω
VIN = 0V, IIN = 30mA
(Note 5)
4.5
16
22
Ω
VIN = 2.4V, IIN = 15mA
4.0
22
30
Ω
VIN = 2.4V, IIN = 15mA
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and TA = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
3
www.fairchildsemi.com
FST16213
Absolute Maximum Ratings(Note 1)
FST16213
AC Electrical Characteristics
TA = −40 °C to +85 °C,
Symbol
CL = 50pF, RU = RD = 500Ω
Parameter
VCC = 4.5 − 5.5V
Min
Max
VCC = 4.0V
Min
Units
Conditions
Figure No.
Max
tPHL,tPLH
Prop Delay Bus to Bus (Note 6)
0.25
0.25
ns
VI = OPEN
Figure 1
Figure 2
tPHL,tPLH
Prop Delay A1 to A2
0.5
0.5
ns
VI = OPEN
Figure 1
Figure 2
tPZH, tPZL
Output Enable Time, S to A or B
7.5
8.0
ns
VI = 7V for tPZL
Figure 1
Figure 2
1.5
VI = OPEN for tPZH
tPHZ, tPLZ
Output Disable Time S to A or B
1.0
8.5
9.0
ns
VI = 7V for tPLZ
VI = OPEN for tPHZ
tPZH, tPZL
Output Enable Time, S0 to A2 and B2
1.5
9.5
10.0
ns
VI = 7V for tPZL
VI = OPEN for tPZH
tPHZ, tPLZ
Output Disable Time, S0 to A2 and B2
1.5
9.0
10.0
ns
VI = 7V for tPLZ
VI = OPEN for tPHZ
Figure 1
Figure 2
Figure 1
Figure 2
Figure 1
Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
(Note 7)
Parameter
Typ
Max
Units
Conditions
CIN
Control pin Input Capacitance
3
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
10
pF
VCC = 5.0V
S0, S1, or S2 = GND
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: CL includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
www.fairchildsemi.com
4
FST16213
Physical Dimensions inches (millimeters) unless otherwise noted
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
Package Number MS56A
5
www.fairchildsemi.com
FST16213 24-Bit Bus Exchange Switch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD56
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
www.fairchildsemi.com
6
Revised December 1999
FST16232
Synchronous 16-Bit to 32-Bit
Multiplexer/Demultiplexer Bus Switch
General Description
Features
The Fairchild Switch FST16232 is a 16-bit to 32-bit highspeed CMOS TTL-compatible synchronous multiplexer/
demultiplexer bus switch. The low on resistance of the
switch allows inputs to be connected to outputs without
adding propagation delay or generating additional ground
bounce noise.
■ 4Ω switch connection between two ports.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
■ Control inputs compatible with TTL level.
The device allows two separate datapaths to be multiplexed onto, or demultiplexed from, a single path. Two control select pins (S1, S0) are synchronous and clocked on
the rising edge of CLK when CLKEN is LOW.
Ordering Code:
Order Number
Package Number
Package Description
FST16232MEA
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
FST16232MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
© 1999 Fairchild Semiconductor Corporation
DS500054
www.fairchildsemi.com
FST16232 Synchronous 16-Bit to 32-Bit Multiplexer/Demultiplexer Bus Switch
July 1997
FST16232
Connection Diagram
Pin Descriptions
Pin Name
Description
S1 , S0
Control Pins
CLK
Clock Input
CLKEN
Clock Enable Input
1A, 2A
Bus A
1B, 2B
Bus B
Truth Table
Inputs
www.fairchildsemi.com
2
Function
S1
S0
CLK
CLKEN
X
X
X
H
Last State
L
L
↑
L
Disconnect
L
H
↑
L
A = B1 and A = B2
H
L
↑
L
A = B1
H
H
↑
L
A = B2
Supply Voltage (VCC)
Recommended Operating
Conditions (Note 3)
−0.5V to +7.0V
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN)(Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN<0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT) Sink Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
−40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
TA = −40 °C to +85 °C
Typ
(Note 4)
Min
Units
Conditions
Max
−1.2
IIN = −18mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0≤ VIN ≤5.5V
0
10
µA
VIN = 5.5V
±1.0
µA
0 ≤A, B ≤VCC
4.5
2.0
V
V
IOFF
OFF-STATE Leakage Current
5.5
RON
Switch On Resistance
4.5
4
7
Ω
VIN = 0V, IIN = 64mA
(Note 5)
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
4.5
8
12
Ω
VIN = 2.4V, IIN = 15mA
4.0
11
20
Ω
VIN = 2.4V, IIN = 15mA
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and TA = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
3
www.fairchildsemi.com
FST16232
Absolute Maximum Ratings(Note 1)
FST16232
AC Electrical Characteristics
TA = −40 °C to +85 °C,
Symbol
Parameter
CL = 50pF, RU = RD = 500Ω
VCC = 4.5 – 5.5V
Min
fMAX
Maximum Clock Frequency
tPHL, tPLH
Prop Delay Bus to Bus (Note 6)
tPHL, tPLH
Prop Delay CLK to B or A
tPZH, tPZL
Output Enable Time
CLK to A = B1 = B2
Output Enable Time
CLK to A or B1 or B2
tPHZ, tPLZ
Output Disable Time
CLK to A or B
tS
tH
tW
VCC = 4.0V
Max
Min
150
Units
Conditions
Figure
No.
Max
150
MHz
VI = OPEN
Figure 1
Figure 2
0.25
0.25
ns
VI = OPEN
Figure 1
Figure 2
2.0
6.3
6.0
ns
VI = OPEN
Figure 1
Figure 2
1.7
8.5
9.0
ns
VI = 7V for tPZL,
Figure 1
Figure 2
2.0
6.5
6.5
ns
1.0
8.5
9.0
ns
Setup Time S1, S0 before CLK ↑
2.5
2.8
Setup Time CLKEN before CLK ↑
1.8
2.0
Hold Time S1, S 0 after CLK ↑
1.0
1.0
Hold Time CLKEN after CLK ↑
1.5
1.5
Pulse Width
3.1
3.1
VI = OPEN for tPZH
VI = 7V for tPZL,
VI = OPEN for tPZH
VI = 7V for tPLZ,
VI = OPEN for tPHZ
Figure 1
Figure 2
Figure 1
Figure 2
ns
Figure 1
Figure 2
ns
Figure 1
Figure 2
ns
Clock HIGH or LOW
Figure 1
Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance (Note 7)
Symbol
Parameter
Typ
Max
Units
Conditions
CIN
Control pin Input Capacitance
4
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
7
pF
VCC = 5.0V, S0, S1 = 0V
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: CL includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
www.fairchildsemi.com
4
FST16232
Physical Dimensions inches (millimeters) unless otherwise noted
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
Package Number MS56A
5
www.fairchildsemi.com
FST16232 Synchronous 16-Bit to 32-Bit Multiplexer/Demultiplexer Bus Switch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD56
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
www.fairchildsemi.com
6
Revised December 1999
FST16233
16-Bit to 32-Bit Multiplexer/Demultiplexer Bus Switch
General Description
Features
The Fairchild Switch FST16233 is a 16-bit to 32-bit highspeed CMOS TTL-compatible multiplexer/demultiplexer
bus switch. The low on resistance of the switch allows
inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise.
■ 4Ω switch connection between two ports.
The device can be used in applications where two buses
need to be addressed simultaneously. The FST16233 can
be used as two 8-bit to 16-bit multiplexers or as one 16-bit
to 32-bit multiplexer.
■ Control inputs compatible with TTL level.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
Two select (SEL1, SEL0) and two test (TEST0, TEST1)
inputs provide switch enable and multiplexer select control.
The FST16233 is designed to prevent through-current
when switching buses.
Ordering Code:
Order Number
Package Number
Package Description
FST16233MEA
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
FST16233MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
© 1999 Fairchild Semiconductor Corporation
DS500055
www.fairchildsemi.com
FST16233 16-Bit to 32-Bit Multiplexer/Demultiplexer Bus Switch
September 1997
FST16233
Connection Diagram
Pin Descriptions
Pin Name
Description
SEL0, SEL1
Select Inputs
TEST0, TEST1
Test Inputs
A
Bus A
B1 , B2
Bus B
Truth Table
Inputs
www.fairchildsemi.com
2
SEL
TEST
Function
A = B1
L
L
H
L
A = B2
X
H
A = B1 and A = B2
Supply Voltage (VCC)
Recommended Operating
Conditions (Note 3)
−0.5V to +7.0V
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN) (Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN<0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT) Sink Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
−40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
TA = −40 °C to +85 °C
Typ
(Note 4)
Min
Units
Conditions
Max
−1.2
IIN = −18mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0≤ VIN ≤5.5V
0
10
µA
VIN = 5.5V
0 ≤A, B ≤VCC
4.5
2.0
V
V
IOFF
OFF-STATE Leakage Current
5.5
±1.0
µA
RON
Switch On Resistance
4.5
4
7
Ω
VIN = 0V, IIN = 64mA
(Note 5)
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
4.5
8
12
Ω
VIN = 2.4V, IIN = 15mA
4.0
11
20
Ω
VIN = 2.4V, IIN = 15mA
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and TA = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
3
www.fairchildsemi.com
FST16233
Absolute Maximum Ratings(Note 1)
FST16233
AC Electrical Characteristics
TA = −40 °C to +85 °C,
Symbol
Parameter
CL = 50pF, RU= RD = 500Ω
VCC = 4.5 − 5.5V
Min
tPHL, tPLH
A or B, to B or A (Note 6)
tPHL,tPLH
SEL to A
Output Enable Time,
tPZH, tPZL
VCC = 4.0V
Max
Min
Units
Conditions
Figure No.
Max
0.25
0.25
ns
VI = OPEN
Figure 1
Figure 2
1.5
6.1
6.8
ns
VI = OPEN
Figure 1
Figure 2
1.0
6.5
7.2
ns
VI = 7V for tPZL,
Figure 1
Figure 2
VI = OPEN for tPZH
SEL or TEST to B
tPHZ, tPLZ
Output Disable Time,
1.5
7.8
8.5
VI = 7V for tPLZ,
ns
VI = OPEN for tPHZ
SEL or TEST to B
Figure 1
Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
(Note 7)
Parameter
Typ
Max
Units
Conditions
CIN
Control pin Input Capacitance
4
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
6
pF
VCC = 5.0V, Switch OFF
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: CL includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
www.fairchildsemi.com
4
FST16233
Physical Dimensions inches (millimeters) unless otherwise noted
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
Package Number MS56A
5
www.fairchildsemi.com
FST16233 16-Bit to 32-Bit Multiplexer/Demultiplexer Bus Switch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD56
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
www.fairchildsemi.com
6
Preliminary
Revised December 1999
FST162861
20-Bit Bus Switch with 25Ω Series Resistors in Outputs
(Preliminary)
General Description
The Fairchild Switch FST162861 provides 20-Bits of highspeed CMOS TTL-compatible bus switching. The low on
resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise.
The device is organized as a 10-bit or 20-Bit bus switch.
When OE1 is LOW, the switch is ON and Port 1A is connected to Port 1B. When OE2 is LOW, Port 2A is connected
to Port 2B. When OEX is HIGH, a high impedance state
exists between the A and B ports. The FST162861 has an
equivalent 25Ω series resistors to reduce signal-reflection
noise, eliminating the need for external terminating resistors.
Features
■ 25Ω switch connection between two ports.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
■ Control inputs compatible with TTL level.
Ordering Code:
Order Number
Package Number
Package Description
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
FST162861MTD
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Logic Diagram
Truth Table
Inputs
Pin Descriptions
OE1
Pin Name
Description
OE1, OE2
Bus Switch Enables
1A, 2A
Bus A
1B, 2B
Bus B
© 1999 Fairchild Semiconductor Corporation
DS500319
Inputs/Outputs
OE2
1A, 1B
2A, 2B
L
L
1A = 1B
2A = 2B
L
H
1A = 1B
Z
H
L
Z
2A = 2B
H
H
Z
Z
www.fairchildsemi.com
FST162861 20-Bit Bus Switch with 25Ω Series Resistors in Outputs (Preliminary)
September 1999
FST162861
Preliminary
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC )
Recommended Operating
Conditions (Note 4)
−0.5V to +7.0V
DC Switch Voltage (VS) (Note 2)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN) (Note 3)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN<0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT ) Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
-40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: VS is the voltage observed/applied at either the A or B Port across
the switch.
Note 3: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 4: Unused control inputs must be held high or low. They may not float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
TA = −40 °C to +85 °C
Typ
(Note 5)
Min
Max
−1.2
IIN = −18mA
VIK
Clamp Diode Voltage
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0
10
µA
VIN = 5.5V
5.5
±1.0
µA
0 ≤ A, B ≤ VCC
RON
OFF-STATE Leakage Current
2.0
V
Conditions
VIH
IOZ
4.5
Units
V
0 ≤ VIN ≤ 5.5V
Switch ON Resistance
4.5
20
26
38
Ω
VIN = 0V, IIN = 64mA
(Note 6)
4.5
20
28
40
Ω
VIN = 0V, IIN = 30mA
4.5
20
35
48
Ω
VIN = 2.4V, IIN = 15mA
TBD
TBD
Ω
VIN = 2.4V, IIN = 15mA
4.0
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 5: Typical values are at VCC = 5.0V and T A = +25°C
Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
Preliminary
TA = −40 °C to +85 °C,
CL = 50 pF, RU = RD = 500Ω
Symbol
Parameter
VCC = 4.5 – 5.5V
Min
tPHL,tPLH
Prop Delay Bus to Bus (Note 7)
tPZH, tPZL
Output Enable Time
1.5
VCC = 4.0V
Max
Min
Units
Conditions
Max
1.25
1.25
ns
6.0
6.5
ns
VI = OPEN
Figure 1,
Figure 2
VI = 7V for tPZL
VI = OPEN for tPZH
tPHZ, tPLZ
Output Disable Time
1.5
Figure No.
6.0
6.5
ns
VI = 7V for tPLZ
VI = OPEN for tPHZ
Figure 1,
Figure 2
Figure 1,
Figure 2
Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
CIN
CI/O
(Note 8)
Parameter
Typ
Control Pin Input Capacitance
Max
3
Units
Conditions
pF
VCC = 5.0V, VIN = 0V
Input/Output Capacitance “OFF State”
6
pF
VCC, OE = 5.0V, VIN = 0V
Input/Output Capacitance “ON State”
12
pF
VCC = 5.0V, OE = 0.0V, VIN = 0V
Note 8: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50Ω source terminated in 50Ω
Note: C L includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST162861
AC Electrical Characteristics
FST162861
Preliminary
Physical Dimensions inches (millimeters) unless otherwise noted
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384(FST3384) bus switch product.
www.fairchildsemi.com
4
Preliminary
FST162861 20-Bit Bus Switch with 25Ω Series Resistors in Outputs (Preliminary)
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
5
www.fairchildsemi.com
Revised December 1999
FST16292
12-Bit to 24-Bit Multiplexer/Demultiplexer Bus Switch
General Description
Features
The Fairchild Switch FST16292 provides twelve 2:1 highspeed CMOS TTL-compatible multiplexer/demultiplexer
bus switches. The low on resistance of the switch allows
inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise.
■ 4Ω switch connection between two ports.
The select pin connects the A Port to the selected B Port
output. The A2 Ports are not externally connected, thus
have a 500Ω pull-down resistor to ground.
■ Control inputs compatible with TTL level.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
■ Internal 500Ω pull-down resistor on A2 port.
Ordering Code:
Order Number
Package Number
Package Description
FST16292MEA
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
FST16292MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Pin Descriptions
Truth Table
Pin Name
Description
S0
A1
A2
Function
SO
Data-select input
L
B1
B2
A1 = B1 , A2 = B2
A1
Bus A
H
B2
B1
A1 = B2 , A2 = B1
B1 , B2
Bus B
© 1999 Fairchild Semiconductor Corporation
DS500104
www.fairchildsemi.com
FST16292 12-Bit to 24-Bit Multiplexer/Demultiplexer Bus Switch
July 1997
FST16292
Absolute Maximum Ratings(Note 1)
−0.5V to +7.0V
Supply Voltage (VCC )
DC Switch Voltage (VS)
−0.5V to +7.0V
DC Input Voltage (VIN) (Note 2)
−0.5V to +7.0V
DC Input Diode Current (lIK) VIN<0V
−50mA
DC Output (IOUT ) Sink Current
128mA
4.0V to 5.5V
Power Supply Operating (VCC)
Input Voltage (VIN)
0V to 5.5V
Output Voltage (VOUT)
0V to 5.5V
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
Recommended Operating
Conditions
Switch Control Input
−65°C to +150 °C
0ns/V to 5ns/V
Switch I/O
0ns/V to DC
−40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
TA = −40 °C to +85 °C
Typ
(Note 3)
Min
Max
−1.2
4.5
Units
IIN = −18mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0≤ VIN ≤5.5V
0
10
µA
VIN = 5.5V
0 ≤A, B ≤VCC
2.0
V
Conditions
V
IOZ
OFF-STATE Leakage Current
5.5
±1.0
µA
RON
Switch On Resistance
4.5
4
7
Ω
VIN = 0V, IIN = 64mA
(Note 4)
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
4.5
8
12
Ω
VIN = 2.4V, IIN = 15mA
4.0
14
20
Ω
VIN = 2.4V, IIN = 15mA
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 3: Typical values are at VCC = 5.0V and T A =+25°C
Note 4: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
TA = −40 °C to +85 °C,
Symbol
Parameter
CL = 50pF, RU = RD = 500Ω
VCC = 4.5 – 5.5V
Min
tPHL,tPLH
Prop Delay Bus to Bus (Note 5)
tPHL,tPLH
Prop Delay S0 to A1
tPZL, tPZH
Output Enable Time
S0 to B1 or B2
tPLZ, tPHZ
Output Disable Time
VCC = 4.0V
Max
Min
Units
Conditions
Figure No.
Max
0.25
0.25
ns
VI = OPEN
Figure 1
Figure 2
1.5
7.0
7.4
ns
VI = OPEN
Figure 1
Figure 2
1.0
6.7
7.0
ns
VI = 7V for tPZL
Figure 1
Figure 2
1.0
7.5
7.8
ns
VI = OPEN for tPZH
VI = 7V for tPLZ
VI = OPEN for tPHZ
S0 to B1 or B2
Figure 1
Figure 2
Note 5: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
(Note 6)
Parameter
Typ
Max
Units
Conditions
CIN
Control pin Input Capacitance
3
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
10
pF
VCC = 5.0V, S0 =GND
Note 6: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: CL includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST16292
AC Electrical Characteristics
FST16292
Physical Dimensions inches (millimeters) unless otherwise noted
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
Package Number MS56A
www.fairchildsemi.com
4
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD56
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
5
www.fairchildsemi.com
FST16292 12-Bit to 24-Bit Multiplexer/Demultiplexer Bus Switch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Preliminary
Revised December 1999
FST16861
20-Bit Bus Switch (Preliminary)
General Description
Features
The Fairchild Switch FST16861 provides 20-Bits of highspeed CMOS TTL-compatible bus switching. The low ON
resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise.
■ 4Ω switch connection between two ports.
The device is organized as a 10-bit or 20-Bit bus switch.
When OE1 is LOW, the switch is ON and Port 1A is connected to Port 1B. When OE2 is LOW, Port 2A is connected
to Port 2B. When OEX is HIGH, a high impedance state
exists between the A and B Ports.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
■ Control inputs compatible with TTL level.
Ordering Code:
Order Number
Package Number
Package Description
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
FST16861MTD
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Logic Diagram
Truth Table
Pin Descriptions
Inputs
Inputs/Outputs
Pin Name
Description
OE1
OE2
1A, 1B
2A, 2B
OE1, OE2
Bus Switch Enables
L
L
1A = 1B
2A = 2B
1A, 2A
Bus A
L
H
1A = 1B
Z
1B, 2B
Bus B
H
L
Z
2A = 2B
H
H
Z
Z
© 1999 Fairchild Semiconductor Corporation
DS500318
www.fairchildsemi.com
FST16861 20-Bit Bus Switch (Preliminary)
September 1999
FST16861
Preliminary
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 4)
0.5V to +7.0V
Supply Voltage (VCC )
DC Switch Voltage (VS) (Note 2)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN) (Note 3)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
−50mA
Output Voltage (VOUT)
0V to 5.5V
128mA
Input Rise and Fall Time (tr, tf)
DC Input Diode Current (lIK) VIN<0V
DC Output (IOUT ) Current
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
-40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: VS is the voltage observed/applied at either the A or B Ports across
the switch.
Note 3: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 4: Unused control inputs must be held high or low. They may not float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
TA = −40 °C to +85 °C
Typ
(Note 5)
Min
Max
−1.2
IIN = −18mA
VIK
Clamp Diode Voltage
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0
10
µA
VIN = 5.5V
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤A, B ≤VCC
Switch On Resistance
4.5
4
7
Ω
VIN = 0V, IIN = 64mA
(Note 6)
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
VIN = 2.4V, IIN = 15mA
RON
2.0
V
Conditions
VIH
IOZ
4.5
Units
V
0≤ VIN ≤5.5V
4.5
8
12
Ω
4.0
11
20
Ω
VIN = 2.4V, IIN = 15mA
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 5: Typical values are at VCC = 5.0V and T A = +25°C
Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
Preliminary
TA = −40 °C to +85 °C,
CL = 50pF, RU = RD = 500Ω
Symbol
Parameter
VCC = 4.5 – 5.5V
Min
tPHL,tPLH
Prop Delay Bus-to-Bus (Note 7)
tPZH, tPZL
Output Enable Time
1.5
VCC = 4.0V
Max
Min
Units
Conditions
Max
0.25
0.25
ns
VI = OPEN
6.0
6.5
ns
VI = 7V for tPZL
Figure 1,
Figure 2
VI = OPEN for tPZH
tPHZ, tPLZ
Output Disable Time
1.5
Figure No.
6.0
6.5
ns
VI = 7V for tPLZ
VI = OPEN for tPHZ
Figure 1,
Figure 2
Figure 1,
Figure 2
Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
CIN
CI/O
(Note 8)
Parameter
Typ
Max
Units
Conditions
3
pF
VCC = 5.0V, VIN = 0V
Input/Output Capacitance “OFF State”
6
pF
VCC, OE = 5.0V, VIN = 0V
Input/Output Capacitance “ON State”
12
pF
VCC = 5.0V, OE = 0.0V, VIN = 0V
Control Pin Input Capacitance
Note 8: TA = +25°C, f = 1 Mhz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50Ω source terminated in 50Ω
Note: C L includes load and stray capacitance
Note: Input PRR = 1.0 MHz, TW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST16861
AC Electrical Characteristics
FST16861
Preliminary
Physical Dimensions inches (millimeters) unless otherwise noted
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384(FST3384) bus switch product.
www.fairchildsemi.com
4
Preliminary
FST16861 20-Bit Bus Switch (Preliminary)
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
5
www.fairchildsemi.com
Revised December 1999
FST3125
Quad Bus Switch
General Description
Features
The Fairchild Switch FST3125 provides four high-speed
CMOS TTL-compatible bus switches. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating
additional ground bounce noise.
■ 4Ω switch connection between two ports.
The device is organized as four 1-bit switches with separate OE inputs. When OE is LOW, the switch is ON and
Port A is connected to Port B. When OE is HIGH, the
switch is OPEN and a high-impedance state exists
between the two ports.
■ Control inputs compatible with TTL level.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
Ordering Code:
Order Number
Package Number
FST3125M
M14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
FST3125QSC
MQA16
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
FST3125MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagrams
Pin Assignment for SOIC and TSSOP
Pin Assignment for QSOP
Pin Descriptions
Truth Table
Pin Name
Description
OE1, OE2, OE3, OE4
Bus Switch Enables
Inputs
1A, 2A, 3A, 4A
Bus A
OE
A,B
1B, 2B, 3B, 4B
Bus B
L
A=B
NC
Not Connected
H
Z
© 1999 Fairchild Semiconductor Corporation
DS500043
Inputs/Outputs
www.fairchildsemi.com
FST3125 Quad Bus Switch
August 1997
FST3125
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC )
Recommended Operating
Conditions (Note 3)
−0.5V to +7.0V
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN)(Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN<0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT ) Sink Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0ns/V to 5ns/V
Switch I/O
0ns/V to DC
Free Air Operating Temperature (TA)
−40 °C to +85 °C
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held high or low. They may not float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
TA = −40 °C to +85 °C
Min
Typ
(Note 4)
Units
Conditions
Max
−1.2
IIN = −18mA
VIK
Clamp Diode Voltage
VIH
High Level Input Voltage
4.0–5.5
VIL
Low Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
IOZ
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤A, B ≤VCC
RON
Switch On Resistance
4.5
7
Ω
VIN = 0V, IIN = 64mA
4.5
(Note 5)
2.0
V
V
4
0≤ VIN ≤5.5V
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
4.5
8
15
Ω
VIN = 2.4V, IIN = 15mA
4.0
11
20
Ω
VIN = 2.4V, IIN = 15mA
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND,
∆ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V.
IOUT = 0
Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and T A = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
TA = −40 °C to +85 °C,
CL = 50pF, RU = RD = 500Ω
Symbol
Parameter
VCC = 4.5 – 5.5V
Min
tPHL,tPLH
Prop Delay Bus to Bus (Note 6)
tPZH, tPZL
Output Enable Time
VCC = 4.0V
Max
Min
Units
Conditions
Max
0.25
0.25
ns
VI = OPEN
5.0
5.5
ns
VI = 7V for tPZL
1.0
Figure 1
Figure 2
VI = OPEN for tPZH
tPHZ, tPLZ
Output Disable Time
1.5
Figure No.
5.3
5.6
ns
VI = 7V for tPLZ
VI = OPEN for tPHZ
Figure 1
Figure 2
Figure 1
Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
(Note 7)
Parameter
Typ
Max
Units
Conditions
CIN
Control Pin Input Capacitance
3
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
5
pF
VCC, OE = 5.0V
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: C L includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST3125
AC Electrical Characteristics
FST3125
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number MQA16
www.fairchildsemi.com
4
FST3125
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
5
www.fairchildsemi.com
FST3125 Quad Bus Switch
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
www.fairchildsemi.com
6
Revised December 1999
FST3126
Quad Bus Switch
General Description
Features
The Fairchild Switch FST3126 provides four high-speed
CMOS TTL-compatible bus switches. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating
additional ground bounce noise.
■ 4Ω switch connection between two ports.
The device is organized as four 1-bit switches with separate OE inputs. When OE is HIGH, the switch is ON and
Port A is connected to Port B. When OE is LOW, the switch
is OPEN and a high-impedance state exists between the
two ports.
■ Control inputs compatible with TTL level.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
Ordering Code:
Order Number
Package Number
FST3126M
M14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
FST3126QSC
MQA16
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
FST3126MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagrams
Pin Assignment for SOIC and TSSOP
Pin Assignment for QSOP
Pin Descriptions
Truth Table
Pin Name
Description
OE1, OE2, OE3, OE4
Bus Switch Enables
Inputs
Inputs/Outputs
1A, 2A, 3A, 4A
Bus A
OE
A,B
1B, 2B, 3B, 4B
Bus B
L
Z
NC
Not Connected
H
A=B
© 1999 Fairchild Semiconductor Corporation
DS500044
www.fairchildsemi.com
FST3126 Quad Bus Switch
August 1997
FST3126
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC )
Recommended Operating
Conditions (Note 3)
−0.5V to +7.0V
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN) (Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN<0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT ) Sink Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
−40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held high or low. They may not float.
DC Electrical Characteristics
Symbol
Parameter
VCC
(V)
TA = −40 °C to +85 °C
Typ
(Note 4)
Min
Max
−1.2
Units
Conditions
IIN = −18mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0≤ VIN ≤5.5V
IOZ
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤A, B ≤VCC
RON
Switch On Resistance
4.5
4
7
Ω
VIN = 0V, IIN = 64mA
(Note 5)
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
4.5
2.0
V
V
4.5
8
15
Ω
VIN = 2.4V, IIN = 15mA
4.0
11
20
Ω
VIN = 2.4V, IIN = 15mA
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND,
∆ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V.
IOUT = 0
Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and T A = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
TA = −40 °C to +85 °C,
CL = 50pF, RU = RD = 500Ω
Symbol
Parameter
VCC = 4.5 − 5.5V
Min
tPHL,tPLH
Prop Delay Bus to Bus (Note 6)
tPZH, tPZL
Output Enable Time
VCC = 4.0V
Max
1.0
Min
Units
Conditions
Figure No.
Max
0.25
0.25
ns
VI=OPEN
4.5
5.0
ns
VI = 7V for tPZL
Figure 1
Figure 2
VI = OPEN for tPZH
tPHZ, tPLZ
Output Disable Time
1.5
5.7
6.2
ns
VI = 7V for tPLZ
VI = OPEN for tPHZ
Figure 1
Figure 2
Figure 1
Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
(Note 7)
Parameter
Typ
Max
Units
Conditions
CIN
Control Pin Input Capacitance
3
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
5
pF
VCC = 5.0V, OE = 0V
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: C L includes load and stray capacitance
Note: Input PRR = 1.0MHz, tW = 500ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST3126
AC Electrical Characteristics
FST3126
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number MQA16
www.fairchildsemi.com
4
FST3126
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
5
www.fairchildsemi.com
FST3126 Quad Bus Switch
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
www.fairchildsemi.com
6
Revised December 1999
FST3244
Octal Bus Switch
General Description
Features
The Fairchild Switch FST3244 provides 8-bits of highspeed CMOS TTL-compatible bus switching in a standard
’244 pin-out. The low on resistance of the switch allows
inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise.
■ 4Ω switch connection between two ports.
The device is organized as two 4-bit switches with separate
OE inputs. When OE is LOW, the switch is ON and Port A
is connected to Port B. When OE is HIGH, the switch is
OPEN and a high-impedance state exists between the two
ports.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
■ Control inputs compatible with TTL level.
Ordering Code:
Order Number
Package Number
Package Description
FST3244WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
FST3244QSC
MQA20
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
FST3244MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Truth Table
Inputs
Pin Descriptions
Inputs/Outputs
OE1
OE2
1A, 1B
2A, 2B
L
L
1A = 1B
2A = 2B
Bus Switch Enable
L
H
1A = 1B
Z
Bus A
H
L
Z
2A = 2B
Bus B
H
H
Z
Z
Pin Name
Description
OE1, OE2
1A, 2A
1B, 2B
© 1999 Fairchild Semiconductor Corporation
DS500021
www.fairchildsemi.com
FST3244 Octal Bus Switch
June 1997
FST3244
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 3)
Supply Voltage (VCC )
−0.5V to +7.0V
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN) (Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
−50mA
Output Voltage (VOUT)
0V to 5.5V
128mA
Input Rise and Fall Time (tr, tf)
DC Input Diode Current (lIK) VIN<0V
DC Output (IOUT ) Sink Current
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
Free Air Operating Temperature (TA)
−40 °C to +85 °C
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The Recommended Operating Conditions tables will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
TA = −40 °C to +85 °C
Typ
(Note 4)
Min
Units
−1.2
4.5
Conditions
Max
Clamp Diode Voltage
VIH
High Level Input Voltage
4.0–5.5
VIL
Low Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
IOZ
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤A, B ≤VCC
RON
Switch On Resistance
4.5
4
7
Ω
VIN = 0V, IIN = 64mA
(Note 5)
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
4.5
8
15
Ω
VIN = 2.4V, IIN = 15mA
4.0
11
20
Ω
VIN = 2.4V, IIN = 15mA
2.0
V
IIN = −18mA
VIK
V
0≤ VIN ≤5.5V
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and T A = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
TA = −40 °C to +85 °C,
CL = 50pF, RU = RD = 500Ω
Symbol
Parameter
VCC = 4.5 – 5.5V
Min
tPHL,tPLH
Prop Delay Bus to Bus(Note 6)
tPZH, tPZL
Output Enable Time
VCC = 4.0V
Max
Min
Units
0.25
ns
5.6
6.1
ns
VI = OPEN
Figure 1
Figure 2
VI = 7V for tPZL
VI = OPEN for tPZH
tPHZ, tPLZ
Output Disable Time
1.0
6.2
Figure No.
Max
0.25
1.0
Conditions
5.6
ns
VI = 7V for tPLZ
VI = OPEN for tPHZ
Figure 1
Figure 2
Figure 1
Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance
Symbol
(Note 7)
Parameter
Typ
Max
Units
Conditions
CIN
Control Pin Input Capacitance
3
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
5
pF
VCC, OE = 5.0V
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: C L includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 nS
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST3244
AC Electrical Characteristics
FST3244
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number MQA20
www.fairchildsemi.com
4
FST3244 Octal Bus Switch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
5
www.fairchildsemi.com
Revised December 1999
FST3245
Octal Bus Switch
General Description
Features
The Fairchild Switch FST3245 provides 8-bits of highspeed CMOS TTL-compatible bus switching in a standard
’245 pin-out. The low on resistance of the switch allows
inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise.
The device is organized as an 8-bit switch. When OE is
LOW, the switch is ON and Port A is connected to Port B.
When OE is HIGH, the switch is OPEN and a high-impedance state exists between the two ports.
■ 4Ω switch connection between two ports.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
■ Control inputs compatible with TTL level.
Ordering Code:
Order Number
Package Number
Package Description
FST3245WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
FST3245QSC
MQA20
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
FST3245MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Pin Descriptions
Truth Table
Pin Name
Description
Input OE
Function
OE
Bus Switch Enable
L
Connect
A
Bus A
B
Bus B
H
Disconnect
© 1999 Fairchild Semiconductor Corporation
DS500020
www.fairchildsemi.com
FST3245 Octal Bus Switch
June 1997
FST3245
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 3)
Supply Voltage (VCC )
−0.5V to +7.0V
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN) (Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
−50mA
Output Voltage (VOUT)
0V to 5.5V
128mA
Input Rise and Fall Time (tr, tf)
DC Input Diode Current (lIK) VIN < 0V
DC Output (IOUT ) Sink Current
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
−40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
TA = −40 °C to +85 °C
Typ
(Note 4)
Min
Units
−1.2
4.5
Conditions
Max
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
IOZ
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤A, B ≤ VCC
RON
Switch On Resistance
4.5
4
7
Ω
VIN = 0V, IIN = 64 mA
(Note 5)
4.5
4
7
Ω
VIN = 0V, IIN = 30 mA
4.5
8
15
Ω
VIN = 2.4V, IIN = 15 mA
4.0
11
20
Ω
VIN = 2.4V, IIN = 15 mA
2.0
V
IIN = −18 mA
VIK
V
0≤ VIN ≤ 5.5V
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and T A = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
TA = −40 °C to +85 °C,
CL = 50pF, RU = RD = 500Ω
Symbol
Parameter
VCC = 4.5 – 5.5V
Min
tPHL,tPLH
Prop Delay Bus to Bus (Note 6)
tPZH, tPZL
Output Enable Time
1.5
VCC = 4.0V
Max
Min
Units
Conditions
Max
0.25
0.25
ns
5.9
6.4
ns
VI = OPEN
Figure 1
Figure 2
VI = 7V for tPZL
Figure 1
Figure 2
VI = OPEN for tPZH
tPHZ, tPLZ
Output Disable Time
1.5
6.0
Figure No.
5.7
ns
VI = 7V for tPLZ
VI = OPEN for tPHZ
Figure 1
Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance
Symbol
(Note 7)
Parameter
Typ
Max
Units
Conditions
CIN
Control Pin Input Capacitance
3
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
5
pF
VCC, OE = 5.0V
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: C L includes load and stray capacitance
Note: Input PRR = 1.0 MHz tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST3245
AC Electrical Characteristics
FST3245
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number MQA20
www.fairchildsemi.com
4
FST3245
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
5
www.fairchildsemi.com
FST3245 Octal Bus Switch
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
www.fairchildsemi.com
6
Revised December 1999
FST3253
Dual 4:1 Multiplexer/Demultiplexer Bus Switch
General Description
Features
The Fairchild Switch FST3253 is a dual 4:1 high-speed
CMOS TTL-compatible multiplexer/demultiplexer bus
switch. The low on resistance of the switch allows inputs to
be connected to outputs without adding propagation delay
or generating additional ground bounce noise.
■ 4Ω switch connection between two ports.
When OE is LOW, S0 and S1 connect the A Port to the
selected B Port output. When OE is HIGH, the switch is
OPEN and a high-impedance state exists between the two
ports.
■ Control inputs compatible with TTL level.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
Ordering Code:
Order Number
Package Number
FST3253M
M16A
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
FST3253QSC
MQA16
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
FST3253MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Truth Table
Pin Descriptions
S1
S0
OE1
OE2
Function
X
X
H
X
Disconnect 1A
Disconnect 2A
Pin Name
Description
X
X
X
H
OE1, OE2
Bus Switch Enables
L
L
L
L
A = B1
S0 , S1
Select Inputs
L
H
L
L
A = B2
A
Bus A
H
L
L
L
A = B3
B1 , B2 , B3 , B4
Bus B
H
H
L
L
A = B4
© 1999 Fairchild Semiconductor Corporation
DS500058
www.fairchildsemi.com
FST3253 Dual 4:1 Multiplexer/Demultiplexer Bus Switch
September 1997
FST3253
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC )
Recommended Operating
Conditions (Note 3)
−0.5V to +7.0V
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN)(Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN<0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT ) Sink Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0ns/V to 5ns/V
Switch I/O
0ns/V to DC
−40 °C to −85 °C
Free Air Operating Temperature (TA)
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The Recommended Operating Conditions tables will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
Parameter
VCC
(V)
TA = −40 °C to +85 °C
Min
Typ
(Note 4)
Units
Conditions
Max
−1.2
IIN = −18mA
VIK
Clamp Diode Voltage
VIH
High Level Input Voltage
4.0–5.5
VIL
Low Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0≤ VIN ≤5.5V
IOZ
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤A, B ≤VCC
RON
Switch On Resistance
4.5
4
7
Ω
VIN = 0V, IIN = 64mA
(Note 5)
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
4.5
8
15
Ω
VIN = 2.4V, IIN = 15mA
4.0
11
20
Ω
VIN = 2.4V, IIN = 15mA
4.5
2.0
V
V
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and T A = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
TA = −40 °C to +85 °C
CL = 50pF, RU = RD = 500Ω
Symbol
Parameter
VCC = 4.5 – 5.5V
Min
tPHL,tPLH
tPZH, tPZL
tPHZ, tPLZ
Prop Delay Bus to Bus (Note 6)
Max
VCC = 4.0V
Min
Units
Conditions
Figure No.
Max
0.25
0.25
Prop Delay, Select to Bus A
1.0
5.3
6.3
Output Enable Time, Select to Bus B
1.0
5.3
6.0
Output Enable Time, IOE to Bus A, B
1.0
5.3
6.2
Output Disable Time., Select to Bus B
1.0
5.8
6.2
Output Disable Time, IOE to Bus A, B
1.0
5.5
6.2
ns
ns
ns
VI = OPEN
Figure 1
Figure 2
VI = 7V for tPZL
VI = OPEN for tPZH
VI = 7V for tPLZ
VI = OPEN for tPHZ
Figure 1
Figure 2
Figure 1
Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance
Symbol
Parameter
Typ
Control Pin Input Capacitance
CIN
CI/O
(Note 7)
A Port
B Port
Input/Output Capacitance
Max
Units
3
pF
13
pF
5
pF
Conditions
VCC = 5.0V
VCC, OE = 5.0V
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: C L includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST3253
AC Electrical Characteristics
FST3253
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number MQA16
www.fairchildsemi.com
4
FST3253 Dual 4:1 Multiplexer/Demultiplexer Bus Switch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
5
www.fairchildsemi.com
Revised December 1999
FST3257
Quad 2:1 Multiplexer/Demultiplexer Bus Switch
General Description
Features
The Fairchild Switch FST3257 is a quad 2:1 high-speed
CMOS TTL-compatible multiplexer/demultiplexer bus
switch. The low on resistance of the switch allows inputs to
be connected to outputs without adding propagation delay
or generating additional ground bounce noise.
■ 4Ω switch connection between two ports.
When OE is LOW, the select pin connects the A Port to the
selected B Port output. When OE is HIGH, the switch is
OPEN and a high-impedance state exists between the two
ports.
■ Control inputs compatible with TTL level.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
Ordering Code:
Order Number
Package Number
FST3257M
M16A
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
FST3257QSC
MQA16
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
FST3257MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Pin Descriptions
Truth Table
Pin Name
Description
OE
Bus Switch Enable
S
Select Input
S
OE
Function
X
H
Disconnect
L
A = B1
L
A = B2
A
Bus A
L
B1–B2
Bus B
H
© 1999 Fairchild Semiconductor Corporation
DS500057
www.fairchildsemi.com
FST3257 Quad 2:1 Multiplexer/Demultiplexer Bus Switch
September 1997
FST3257
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 3)
−0.5V to +7.0V
Supply Voltage (VCC )
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN)(Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN<0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT ) Sink Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
−40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The Recommended Operating Conditions tables will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
Parameter
VCC
(V)
TA = −40 °C to +85 °C
Typ
(Note 4)
Min
Units
Conditions
Max
−1.2
IIN = −18mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0≤ VIN ≤5.5V
IOZ
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤A, B ≤VCC
RON
Switch On Resistance
4.5
4
7
Ω
VIN = 0V, IIN = 64mA
(Note 5)
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
4.5
8
15
Ω
VIN = 2.4V, IIN = 15mA
4.0
11
VIN = 2.4V, IIN = 15mA
4.5
2.0
V
V
20
Ω
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and T A = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
TA = −40 °C to +85°C,
Symbol
CL = 50 pF, RU = RD = 500Ω
Parameter
VCC = 4.5 – 5.5V
Min
tPHL,tPLH
Prop Delay Bus to Bus (Note 6)
Max
Units
VCC = 4.0V
Min
0.25
1.0
4.7
5.2
tPZH, tPZL Output Enable Time, Select to Bus B
1.0
5.2
5.7
Output Enable Time, OE to Bus A, B
1.0
5.1
5.6
ns
ns
tPHZ, tPLZ Output Disable Time, Select to Bus B
Output Disable Time, Output Enable Time,
Figure No.
Max
0.25
Prop Delay, Select to Bus A
Conditions
1.0
5.2
5.5
1.5
5.5
5.5
ns
Figure 1
Figure 2
VI = OPEN
VI = 7V for tPZL
VI = OPEN for tPZH
VI = 7V for tPLZ
VI = OPEN for tPHZ
Figure 1
Figure 2
Figure 1
Figure 2
OE to Bus A, B
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance
(Note 7)
Symbol
Parameter
CIN
CI/O
Typ
Control Pin Input Capacitance
Max
Units
3
pF
A Port Input/Output Capacitance
7
pF
B Port
5
pF
Conditions
VCC = 5.0V
VCC, OE = 5.0V
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: C L includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST3257
AC Electrical Characteristics
FST3257
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number MQA16
www.fairchildsemi.com
4
FST3257 Quad 2:1 Multiplexer/Demultiplexer Bus Switch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
5
www.fairchildsemi.com
Revised December 1999
FST3345
8-Bit Bus Switch
General Description
Features
The Fairchild Switch FST3345 provides 8-bits of highspeed CMOS TTL-compatible bus switching. The low on
resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise.
■ 4Ω switch connection between two ports.
The device is organized as an 8-bit switch bank with dual
output enable inputs (OE and OE). When OE is LOW or
OE is HIGH, the switch is ON and Port A is connected to
Port B. When OE is HIGH and OE is LOW, the switch is
OPEN and a high-impedance state exists between the two
ports.
■ Control inputs compatible with TTL level.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
Ordering Code:
Order Number
Package Number
Package Description
FST3345WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
FST3345QSC
MQA20
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
FST3345MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Pin Descriptions
Truth Table
Pin Name
Description
OE, OE
Bus Switch Enables
OE
A
Bus A
X
L
B
Bus B
H
X
Connect
L
H
Disconnect
© 1999 Fairchild Semiconductor Corporation
DS500019
Inputs
Function
OE
Connect
www.fairchildsemi.com
FST3345 8-Bit Bus Switch
June 1997
FST3345
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC )
Recommended Operating
Conditions (Note 3)
−0.5V to +7.0V
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN) (Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN<0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT ) Sink Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
−40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
TA = −40 °C to +85 °C
Typ
(Note 4)
Min
Units
Conditions
Max
−1.2
IIN = -18mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0≤ VIN ≤5.5V
IOZ
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤A, B ≤VCC
RON
Switch On Resistance
4.5
4
7
Ω
VIN = 0V, IIN = 64mA
(Note 5)
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
VIN = 2.4V, IIN = 15mA
4.5
2.0
V
V
4.5
8
15
Ω
4.0
11
20
Ω
VIN = 2.4V, IIN = 15mA
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and T A = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
TA = −40 °C to +85 °C,
CL = 50 pF, RU = RD = 500Ω
Symbol
Parameter
VCC = 4.5 − 5.5V
Min
tPHL,tPLH
Prop Delay Bus to Bus (Note 6)
tPZH, tPZL
Output Enable Time
1.5
VCC = 4.0V
Max
Min
Units
Conditions
Max
0.25
0.25
ns
6.5
7.0
ns
VI = OPEN
Figure 1
Figure 2
VI = 7V for tPZL
VI = OPEN for tPZH
tPHZ, tPLZ
Output Disable Time
1.0
Figure No.
8.0
8.2
ns
VI = 7V for tPLZ
VI = OPEN for tPHZ
Figure 1
Figure 2
Figure 1
Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance
Symbol
(Note 7)
Parameter
Typ
Max
Units
Conditions
CIN
Control Pin Input Capacitance
4
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
5
pF
VCC, OE = 5.0V, OE = 0V
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: C L includes load and stray capacitance
Note: Input PRR = 1.0 MHz tW = 500 nS
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST3345
AC Electrical Characteristics
FST3345
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number MQA20
www.fairchildsemi.com
4
FST3345
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
5
www.fairchildsemi.com
FST3345 8-Bit Bus Switch
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
www.fairchildsemi.com
6
Revised May 1999
FST3383
10-Bit Low Power Bus-Exchange Switch
General Description
Features
The FST3383 provides two sets of high-speed CMOS TTLcompatible bus switches. The low on resistance of the
switch allows inputs to be connected to outputs without
adding propagation delay or generating additional ground
bounce noise. The device operates as a 10-bit bus switch
or a 5-bit bus exchanger. The bus exchange (BX) signal
provides nibble swapping of the AB and CD pairs of signals. This exchange configuration allows byte swapping of
buses in systems. It can also be used as a quad 2-to-1
multiplexer and to create low delay barrel shifters. The bus
enable (BE) signal turns the switches ON.
■ 5Ω switch connection between two ports
■ Zero propagation delay
■ Ultra low power with 0.2 µA typical ICC
■ Zero ground bounce in flow-through mode
■ Control inputs compatible with TTL level
Ordering Code:
Order Number
Package Number
Package Description
FST3383WM
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
FST3383QSC
MQA24
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
FST3383MTC
MTC24
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Pin Descriptions
Truth Table
Pin Names
Description
BE BX
A0–A4
B0–B4
Function
BE
Bus Switch Enable
BX
Bus Exchange
L
L
C0–C4
D0 – D4
Connect
A0–A4, B0–B4
Buses A, B
L
H D0–D4
C0–C4
Exchange
C0–C4, D0–D4
Buses C, D
© 1999 Fairchild Semiconductor Corporation
DS011652.prf
H
X High-Z State High-Z State Disconnect
www.fairchildsemi.com
FST3383 10-Bit Low Power Bus-Exchange Switch
December 1993
FST3383
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC )
−0.5V to +7.0V
DC Switch Voltage (VS)
−0.5V to +7.0V
DC Input Voltage (VI) (Note 2)
−0.5V to +7.0V
DC Input Diode Current (IIN)
with VI < 0
Supply Voltage (VCC)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
120 mA
−65°C to +150°C
Power Dissipation
4.0V to 5.5V
−40°C to +85°C
Free Air Operating Temperature (TA)
−20 mA
DC Output (IO) Sink Current
Storage Temperature Range (TSTG)
Recommended Operating
Conditions
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
0.5W
DC Electrical Characteristics
Symbol
Parameter
VCC
(V)
TA = −40°C to +85°C
Min
Typ
Max
Units
−1.2
V
Conditions
(Note 3)
Maximum Clamp Diode Voltage
VIH
Minimum High Level Input Voltage
4.75–5.25
VIL
Maximum Low Level Input Voltage
4.75–5.25
0.8
V
IIN
Maximum Input
0
10
µA
0 ≤ VIN ≤ 5.25V
5.25
±1
µA
0 ≤ A, B ≤ VCC
Leakage Current
4.75
IIN = −18 mA
VIK
2.0
V
±10
IOZ
Maximum 3-STATE I/O Leakage
5.25
IOS
Short Circuit Current
4.75
RON
Switch On Resistance (Note 4)
4.75
5
7
10
ICC
Maximum Quiescent Supply Current
5.25
0.2
∆ICC
Increase in ICC per Input (Note 5)
5.25
100
mA
VI(A), VI(B) = 0V, VI(B), VI(A) = 4.75V
Ω
VI = 0V, ION = 30 mA
15
Ω
VI = 2.4V, ION = 15 mA
10
µA
VI = VCC, GND, IO = 0
2.5
mA
VIN = 3.15V, IO = 0, Per Control Input
Note 3: All typical values are at VCC = 5.0V, TA = 25°C.
Note 4: Measured by voltage drop between A and B pin at indicated current through the switch. On resistance is determined by the lower of the voltages on
the two (A or B) pins.
Note 5: Per TTL driven input (VIN = 3.15V, control inputs only). A and B pins do not contribute to ICC.
www.fairchildsemi.com
2
Symbol
VCC
(V)
Parameter
TA = −40°C to +85°C, CL = 50 pF
Min
Typ
Max
Units
0.25
ns
(Note 6)
tPLH,
Data Propagation Delay
tPHL
An to Cn, Dn or Bn to Dn, Cn (Note 7)
tPLH,
Switch Exchange Time
tPHL
BX to An, Bn, Cn, Dn
tPZL,
Switch Enable Time
tPZH
BE to An, Bn, Cn or Dn
tPLZ,
Switch Disable Time
tPHZ
BE to An, Bn, Cn, or Dn
4.75
4.75
1.5
6.5
ns
4.75
1.5
6.5
ns
4.75
1.5
5.5
ns
Note 6: All typical values are at VCC = 5.0V, TA = 25°C.
Note 7: This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On resistance of the switch and the load capacitance. The time constant for the switch and alone is of the order of 0.25 ns for 50 pF load. Since this time constant is
much smaller than the rise/fall times of typical driving signals, it adds very little propagation delay to the system. Propagation delay of the bus switch when
used in a system is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side.
Capacitance (Note 8)
Typ
Max
Units
CIN
Symbol
Control Input Capacitance
Parameter
4
6
pF
Conditions
VCC = 5.0V
CI/O (OFF)
Input/Output Capacitance
9
13
pF
VCC = 5.0V
Note 8: Capacitance is characterized but not tested.
On-Resistance (RON) vs Input Voltage
(VCC = 5.0V)
3
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FST3383
AC Electrical Characteristics
FST3383
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M24B
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number MQA24
www.fairchildsemi.com
4
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC24
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
1. Life support devices or systems are devices or systems
device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the
sonably expected to cause the failure of the life support
body, or (b) support or sustain life, and (c) whose failure
device or system, or to affect its safety or effectiveness.
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
www.fairchildsemi.com
user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
FST3383 10-Bit Low Power Bus-Exchange Switch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Revised December 1999
FST3384
10-Bit Low Power Bus Switch
General Description
Features
The Fairchild Switch FST3384 provides 10 bits of highspeed CMOS TTL-compatible bus switches. The low on
resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise. The device is organized
as two 5-bit switches with separate bus enable (OE) signals. When OE is LOW, the switch is ON and Port A is connected to Port B. When OE is HIGH, the switch is OPEN
and a high-impedance state exists between the two ports.
■ 4Ω switch connection between two ports
■ Minimal propagation delay through the switch
■ Ultra low power with < 0.1 µA typical ICC
■ Zero ground bounce in flow-through mode
■ Control inputs compatible with TTL level
Ordering Code:
Order Number
Package Number
Package Description
FST3384WM
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
FST3384QSC
MQA24
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
FST3384MTC
MTC24
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Pin Descriptions
Truth Table
Pin Names
Description
OEA, OEB
Bus Switch Enable
A0–A9
B0–B9
OEA OEB
B0–B4
B5–B9
L
L
A0–A4
A5–A9
Bus A
L
H
A0–A4
HIGH-Z State
Bus B
H
L
HIGH-Z State A5–A9
H
H
HIGH-Z State HIGH-Z State
© 1999 Fairchild Semiconductor Corporation
DS500046
Print form created on December 13, 1999 4:03
Function
Connect
Connect
Connect
Disconnect
www.fairchildsemi.com
FST3384 10-Bit Low Power Bus Switch
September 1997
FST3384
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 3)
−0.5V to +7.0V
Supply Voltage (VCC )
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN) (Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (IIK) VIN<0V
−50 mA
Output Voltage (VOUT)
DC Output (IOUT ) Sink Current
128 mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150°C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
−40°C to +85°C
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the “Electrical
Characteristics” table are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
Parameter
VCC
(V)
TA = −40°C to +85°C
Min
Typ
(Note 4)
Units
Condition
Max
−1.2
IIN= − 18mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0-5.5
VIL
LOW Level Input Voltage
4.0-5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
IOZ
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤ A, B ≤ VCC
RON
Switch On Resistance
4.5
4
7
Ω
VIN = 0V, IIN = 64mA
(Note 5)
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
4.5
8
15
Ω
VIN = 2.4V, IIN = 15mA
4.0
11
20
Ω
VIN = 2.4V, IIN = 15mA
4.5
2.0
V
V
0 ≤ VIN ≤ 5.5V
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 4: All typical values are at VCC = 5.0V, TA = 25°C.
Note 5: Measured by voltage drop between A and B pin at indicated current through the switch. On resistance is determined by the lower of the voltages on
the two (A or B) pins.
www.fairchildsemi.com
2
TA = −40°C to +85°C
Symbol
CL = 50 pF, RU = RD = 500Ω
Parameter
VCC = 4.5 − 5.5V
Min
tPHL, tPLH
tPZH, tPZL
Prop Delay Bus to Bus (Note 6)
Output Enable Time
1.0
Max
VCC = 4.0V
Min
Units
Figure No.
Max
0.25
0.25
ns
5.7
6.2
ns
VI = OPEN
Figure 1
Figure 2
VI = 7V for tPZL
Figure 1
Figure 2
VI = OPEN for tPZH
OEA, OE B to An, Bn
tPHZ, tPLZ
Conditions
Output Disable Time
1.5
5.2
5.5
ns
II = 7V for tPLZ
Figure 1
Figure 2
VI = OPEN for tPHZ
OEA, OE B to An, Bn
Note 6: This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance
Symbol
(Note 7)
Typ
Max
Units
CIN
Control Input Capacitance
Parameter
3
6
pF
Conditions
VCC = 5.0V
CI/O (OFF)
Input/Output Capacitance
5
13
pF
VCC, OE = 5.0V
Note 7: Capacitance is characterized but not tested.
AC Loading and Waveforms
FST3384 VIN vs RON (Typ)
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: C L includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 nS
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST3384
AC Electrical Characteristics
FST3384
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M24B
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number MQA24
www.fairchildsemi.com
4
FST3384 10-Bit Low Power Bus Switch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC24
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
5
www.fairchildsemi.com
FST3384A
10-Bit Low Power Extended Input Voltage Bus Switch
General Description
The FST3384A provides 10 bits of high-speed CMOS
TTL-compatible bus switches. The low on resistance of the
switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground
bounce noise. The device is organized as two 5-bit switches
with separate bus enable (BE ) signals. When BE is low, the
switch is on and port A is connected to port B. When BE is
high, the switch is open and a high-impedance state exists
between the two ports.
The FST3384A 10-bit bus switch is pin-for-pin and function
compatible with the FST3384 device. It has the added feature of allowing extended negative input voltages on the I/O
pins. The FST3384A bus switch, unlike most bus switches
on the market, will not falsely turn on when BE is high and
negative undershoot voltages are encountered on the I/O
pins. Thus it is “undershoot hardened” (see related application note) tolerating undershoots up to −1.5V.
Typical applications include IDE bus connector interfaces,
PCI card interfaces, backplane card interfaces, and other
noisy environments where switches are needed.
Features
n Extended input voltage design tolerates input
undershoots up to −1.5V
n 10Ω switch connection between two ports
n Ultra low power with 2 µA typical ICC
n Zero ground bounce in flow-through mode
n Control inputs compatible with TTL level
n Available in SOIC, QSOP and TSSOP
Ordering Code:
Order Number
Package Number
Package Description
FST3384AQSC
MQA24
24-Lead (0.150" Wide) Shrink Small Outline Package, QSOP
FST3384AMTC
MTC24
24-Lead Thin Small Outline Package, TSSOP
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Pin Assignment
SOIC, QSOP and TSSOP
DS012481-1
DS012481-2
© 1998 Fairchild Semiconductor Corporation
DS012481
www.fairchildsemi.com
FST3384A 10-Bit Low Power Extended Input Voltage Bus Switch
February 1998
Pin Descriptions
Pin Names
Description
BE A, BE B
Bus Switch Enable
A0–A9
Bus A
B0–B9
Bus B
Truth Table
www.fairchildsemi.com
BE A
BE B
L
L
A0–A4
B0–B4
A5–A9
B5–B9
L
H
A0–A4
HIGH-Z State
Connect
H
L
HIGH-Z State
A5–A9
Connect
H
H
HIGH-Z State
HIGH-Z State
2
Function
Connect
Disconnect
Absolute Maximum Ratings (Note 1)
Supply Voltage (VCC)
DC Switch Voltage (VS)
DC Input Input Voltage (VI) (Note 2)
DC Input Diode Current with (VI < 0)
DC Output (IO) Sink Current
Storage Temperature Range (TSTG)
Power Dissipation
Recommended Operating
Conditions
−0.5V to +7.0V
−0.5 to +7.0V
−0.5 to +7.0V
−20 mA
120 mA
−65˚C to +150˚C
0.5W
Supply Voltage (VCC)
Free Air Operating Temperature (TA)
4.0V to 5.5V
−40˚C to +85˚C
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The
“Recommended Operating Conditions” table will define the conditions for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
DC Electrical Characteristics
Symbol
Parameter
TA = −40˚C to +85˚C
VCC
(V)
Min
Typ
Units
Conditions
Max
(Note 5)
VIK
Maximum Clamp
4.75
−1.2
V
IIN = −18 mA
Diode Voltage
VIH
Minimum High
4.75–5.25
2.0
V
Level Input Voltage
VIL
Maximum Low
4.75–5.25
0.8
Level Input Voltage
IIN
IOZ
0
10
Leakage Current
Maximum Input
5.25
±1
Maximum 3-STATE
5.25
± 10
µA
0 ≤ VIN ≤ 5.25V
µA
0 ≤ A, B ≤ VCC
I/O Leakage
IOS
Short Circuit Current
4.75
100
mA
VI(A), VI(B) = 0V,
VI(B), VI(A) = 4.75V
RON
Switch On
4.75
Resistance (Note 3)
ICC
Maximum Quiescent
5.25
6
12
Ω
VI = 0V, ION = 30 mA
15
25
Ω
VI = 2.4V, ION = 15 mA
0.2
10
µA
∆ICC
Increase in ICC
VI = VCC, GND
IO = 0
Supply Current
5.25
2.5
per Input (Note 4)
mA
VIN = 3.15V, IO = 0
Per Control Input
Note 3: Measured by voltage drop between A and B pin at indicated current through the switch. On resistance is determined by the lower of the voltages on the two
(A or B) pins.
Note 4: Per TTL driven Input (VIN = 3.15V, control inputs only). A and B pins do not contribute to ICC.
Note 5: All typical values are at VCC = 5.0V, TA = 25˚C.
3
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AC Electrical Characteristics
Symbol
Parameter
TA = −40˚C to +85˚C
VCC
(V)
Units
CL = 50 pF
Min
Typ
Max
(Note 6)
Data Propagation Delay
tPLH
An to Bn or Bn to An
tPHL
4.75
0.50
ns
(Note 7)
tPZL
Switch Enable Time
tPZH
BE A, BE B to An, Bn
tPLZ
Switch Disable Time
tPHZ
BE A, BE B to An, Bn
4.75
1.5
6.8
ns
4.75
1.5
6.0
ns
Note 6: All typical values are at VCC = 5.0V, TA = 25˚C.
Note 7: This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On resistance of
the switch and the load capacitance. The time constant for the switch and alone is of the order of 0.5 ns for 50 pF load. Since this time constant is much smaller than
the rise/fall times of typical driving signals, it adds very little propagation delay to the system. Propagation delay of the bus switch when used in a system is determined
by the driving circuit on the driving side of the switch and its interaction with the load on the driven side.
Capacitance
Symbol
(Note 8)
Typ
Max
Units
Conditions
CIN
Control Input Capacitance
Parameter
4
6
pF
VCC = 5.0V
CI/O (OFF)
Input/Output Capacitance
9
13
pF
VCC = 5.0V
Note 8: Capacitance is characterized but not tested.
FST3384A VIN vs RON (Typ)
DS012481-3
www.fairchildsemi.com
4
Physical Dimensions
inches (millimeters) unless otherwise noted
24-Lead (0.150" Wide) Shrink Small Outline Package, JEDEC (QSC)
(also known as QSOP)
Package Number MQA24
5
www.fairchildsemi.com
FST3384A 10-Bit Low Power Extended Input Voltage Bus Switch
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
24-Lead Thin Small Outline Package, JEDEC (MTC)
Package Number MTC24
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into
sonably expected to cause the failure of the life support
the body, or (b) support or sustain life, and (c) whose
device or system, or to affect its safety or effectiveness.
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
Fairchild Semiconductor
Corporation
Americas
Customer Response Center
Tel: 1-888-522-5372
www.fairchildsemi.com
Fairchild Semiconductor
Europe
Fax: +49 (0) 1 80-530 85 86
Email: [email protected]
Deutsch Tel: +49 (0) 8 141-35-0
English Tel: +44 (0) 1 793-85-68-56
Italy
Tel: +39 (0) 2 57 5631
Fairchild Semiconductor
Hong Kong Ltd.
13th Floor, Straight Block,
Ocean Centre, 5 Canton Rd.
Tsimshatsui, Kowloon
Hong Kong
Tel: +852 2737-7200
Fax: +852 2314-0061
National Semiconductor
Japan Ltd.
Tel: 81-3-5620-6175
Fax: 81-3-5620-6179
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
Revised December 1999
FST6800
10-Bit Bus Switch with Pre-Charged Outputs
General Description
Features
The Fairchild Switch FST6800 provides 10-bits of highspeed CMOS TTL-compatible bus switching. The low on
resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise. The device precharges
the B Port to a selectable bias voltage (BiasV) to minimize
live insertion noise.
■ 4Ω switch connection between two ports.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
■ Output precharge to minimize live insertion noise.
■ Control inputs compatible with TTL level.
The device is organized as a 10-bit switch with a bus
enable (OE) signal. When OE is LOW, the switch is ON
and Port A is connected to Port B. When OE is HIGH, the
switch is OPEN and the B Port is precharged to BiasV
through an equivalent 10-kΩ resistor.
Ordering Code:
Order Number
Package Number
Package Description
FST6800WM
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
FST6800QSC
MQA24
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
FST6800MTC
MTC24
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Pin Descriptions
Truth Table
Pin Name
Description
OE
Bus Switch Enable
A
Bus A
B
Bus B
© 1999 Fairchild Semiconductor Corporation
DS500022
OE
B0–B9
Function
L
A0–A9
Connect
H
BiasV
Precharge
www.fairchildsemi.com
FST6800 10-Bit Bus Switch with Pre-Charged Outputs
June 1997
FST6800
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 3)
Supply Voltage (VCC )
−0.5V to +7.0V
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
4.0V to 5.5V
Bias V Voltage Range
−0.5V to +6.0V
Precharge Supply (BiasV)
1.5V to VCC
DC Input Voltage (VIN) (Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN<0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT ) Sink Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
−40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The Recommended Operating Conditions tables will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
Parameter
VCC
(V)
TA = −40 °C to +85 °C
Typ
(Note 4)
Min
Max
−1.2
Units
Conditions
IIN = −18mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0≤ VIN ≤5.5V
IO
Output Current
4.5
mA
BiasV = 2.4V, B = 0
IOZ
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤A ≤VCC
RON
Switch On Resistance
4.5
4
7
Ω
VIN = 0V, IIN = 64mA
(Note 5)
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
4.5
2.0
V
V
0.25
4.5
8
15
Ω
VIN = 2.4V, IIN = 15mA
4.0
11
20
Ω
VIN = 2.4V, IIN = 15mA
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and T A= +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
TA = −40 °C to +85 °C,
CL = 50pF, RU = RD = 500Ω
Symbol
Parameter
VCC = 4.5 – 5.5V
Min
tPHL,tPLH
Prop Delay Bus to Bus (Note 6)
tPZH
Output Enable Time
tPZL
tPHZ
Output Disable Time
tPLZ
VCC = 4.0V
Max
Min
0.25
Units
Conditions
Figure No.
Max
0.25
ns
VI = OPEN
Figures 1,
2
1.5
6.2
6.5
ns
VI = OPEN, BiasV = GND
1.5
6.2
6.5
ns
VI = 7V, BiasV = 3V
1.5
6.1
6.5
ns
VI = OPEN, BiasV = GND
1.5
7.3
6.8
ns
VI = 7V, BiasV = 3V
Figure 1
Figure 2
Figure 1
Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance
Symbol
(Note 7)
Parameter
Typ
Max
Units
Conditions
CIN
Control Pin Input Capacitance
3
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
5
pF
VCC, OE = 5.0V
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: C L includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST6800
AC Electrical Characteristics
FST6800
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M24B
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number MQA24
www.fairchildsemi.com
4
FST6800 10-Bit Bus Switch with Pre-Charged Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC24
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
5
www.fairchildsemi.com
Preliminary
Revised December 1999
FSTD16211
24-Bit Bus Switch with Level Shifting (Preliminary)
General Description
Features
The Fairchild Switch FSTD16211 provides 24-bits of highspeed CMOS TTL-compatible bus switching. The low on
resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise. A diode to VCC has been
integrated into the circuit to allow for level shifting between
5V inputs and 3.3V outputs.
■ 4Ω switch connection between two ports.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
■ Control inputs compatible with TTL level.
The device is organized as a 12-bit or 24-bit bus switch.
When OE1 is LOW, the switch is ON and Port 1A is connected to Port 1B. When OE2 is LOW, Port 2A is connected
to Port 2B. When OE1/2 is HIGH, a high impedance state
exists between the A and B Ports.
Ordering Code:
Order Number
Package Number
Package Description
FSTD16211MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Truth Table
Inputs
Inputs/Outputs
Pin Descriptions
OE1
OE2
1A, 1B
2A, 2B
L
L
1A = 1B
2A = 2B
Pin Name
Description
Bus Switch Enables
L
H
1A = 1B
Z
OE1, OE2
H
L
Z
2A = 2B
1A, 2A
Bus A
1B, 2B
Bus B
H
H
Z
Z
© 1999 Fairchild Semiconductor Corporation
DS500313
www.fairchildsemi.com
FSTD16211 24-Bit Bus Switch with Level Shifting (Preliminary)
August 1999
FSTD16211
Preliminary
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 4)
Supply Voltage (VCC)
−0.5V to +7.0V
DC Switch Voltage (VS) (Note 2)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Control Pin Voltage (VIN)(Note 3)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN < 0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT)
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
-40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: VS is the voltage observed/applied at either A or B Ports across the
switch.
Note 3: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 4: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
Parameter
VCC
(V)
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
VOH
HIGH Level
4.0–5.5
II
Input Leakage Current
TA = −40 °C to +85 °C
Min
Typ
(Note 5)
4.5
Max
Units
−1.2
V
2.0
Conditions
IIN = −18mA
V
0.8
See Figure 3
V
V
5.5
±1.0
µA
0≤ VIN ≤5.5V
0
10
µA
VIN = 5.5V
±1.0
µA
0 ≤A, B ≤VCC
IOZ
OFF-STATE Leakage Current
5.5
RON
Switch On Resistance
4.5
4
7
Ω
VIN = 0V, IIN = 64mA
(Note 6)
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
4.5
35
50
Ω
VIN = 2.4V, IIN = 15mA
4.0
TBD
TBD
Ω
VIN = 2.4V, IIN = 15mA
1.5
mA
10
µA
2.5
mA
ICC
Quiescent Supply Current
5.5
∆ ICC
Increase in ICC per Input
5.5
OE1 = OE2 = GND
VIN = VCC or GND, IOUT = 0
OE1 = OE2 = V CC
VIN = VCC or GND, IOUT = 0
One input at 3.4V
Other inputs at VCC or GND
Note 5: Typical values are at VCC = 5.0V and T A= +25°C
Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
Preliminary
TA = −40 °C to +85 °C,
CL = 50pF, RU = RD = 500Ω
Symbol
Parameter
VCC = 4.5 – 5.5V
Min
tPHL,tPLH
Prop Delay Bus to Bus (Note 7)
tPZH, tPZL
Output Enable Time
tPHZ, tPLZ
Output Disable Time
VCC = 4.0V
Max
Min
Units
Conditions
Figure No.
Max
0.25
0.25
ns
VI = OPEN
1.5
10.0
11.0
ns
VI = 7V for tPZL
1.5
9.0
10.0
ns
VI = 7V for tPLZ
Figure 1
Figure 2
Figure 1
VI = OPEN for tPZH Figure 2
Figure 1
VI = OPEN for tPHZ Figure 2
Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical ON
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
(Note 8)
Parameter
Typ
Max
Units
Conditions
CIN
Control Pin Input Capacitance
3
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
6
pF
VCC, OE = 5.0V
Note 8: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50Ω source terminated in 50Ω
Note: CL includes load and stray capacitance
Note: Input PRR = 1.0 MHz, TW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FSTD16211
AC Electrical Characteristics
FSTD16211
Preliminary
Output Voltage HIGH vs. Supply Voltage
FIGURE 3.
www.fairchildsemi.com
4
Preliminary
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD56
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
5
www.fairchildsemi.com
FSTD16211 24-Bit Bus Switch with Level Shifting (Preliminary)
Physical Dimensions inches (millimeters) unless otherwise noted
Revised November 1999
FSTU32160
16-Bit to 32-Bit
Multiplexer/Demultiplexer Bus Switch with
−2V Undershoot Hardened Circuit (UHC) Protection
General Description
Features
The Fairchild Switch FSTU32160 is a 16-bit to 32-bit highspeed CMOS TTL-compatible multiplexer/demultiplexer
bus switch. The low on resistance of the switch allows
inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise.
■ Undershoot hardened to −2V (A and B Ports).
The device can be used in applications where two buses
need to be addressed simultaneously. The FSTU32160 is
designed so that the A Port demultiplexes into B1 or B2 or
both. The A and B Ports are “undershoot hardened” with
UHC protection to support an extended range to 2.0V
below ground. Fairchild’s integrated Undershoot Hardened
Circuit, UHC senses undershoot at the I/O’s, and responds
by preventing voltage differentials from developing and
turning on the switch.
■ Slower Output Enable times prevent signal disruption
■ 4Ω switch connection between two ports.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
■ Control inputs compatible with TTL level.
■ See Applications Note AN-5008 for details
Two select (SEL1, SEL 2) inputs provide switch enable control. When SEL1, SEL2 are HIGH, the device precharges
the B Port to a selectable bias voltage (Bias V) to minimize
live insertion noise.
Ordering Code:
Order Number
Package Number
Package Description
FSTU32160MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
UHC is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation
DS500244
www.fairchildsemi.com
FSTU32160 16-Bit to 32-Bit
May 1999
FSTU32160
Connection Diagram
Pin Descriptions
Pin Name
Description
SEL1, SEL2
Select Inputs
A
Bus A
B1 , B2
Bus B
Truth Table
Inputs
SEL1
SEL2
2
x A = x B1
L
H
H
L
x A = x B2
L
L
x A = x B1 and x B2
H
H
x B1, x B2 = BiasV
Logic Diagram
www.fairchildsemi.com
Function
Recommended Operating
Conditions (Note 4)
Supply Voltage (VCC)
−0.5V to +7.0V
DC Switch Voltage (VS) (Note 2)
−2.0V to +7.0V
Power Supply Operating (VCC)
BiasV Voltage Range
−0.5V to +7.0V
Precharge Supply (BiasV)
1.5 to VCC
Input Voltage (VIN)
0V to 5.5V
Output Voltage (VOUT)
0V to 5.5V
DC Input Control Pin Voltage
−0.5V to +7.0V
(VIN) (Note 3)
DC Input Diode Current (lIK) VIN < 0V
−50 mA
DC Output Current (IOUT)
Storage Temperature Range (TSTG)
Input Rise and Fall Time (tr, tf)
128 mA
Switch Control Input
+/− 100 mA
DC VCC/GND Current (ICC/IGND)
4.0V to 5.5V
0nS/V to 5nS/V
Switch I/O
−65°C to +150 °C
0nS/V to DC
−40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: VS is the voltage observed/applied at either the A or B Ports across
the switch.
Note 3: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 4: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
TA = −40 °C to +85 °C
Symbol
Parameter
VCC
Min
Typ
(V)
Max
Units
Conditions
(Note 5)
−1.2
4.5
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0
10
µA
VIN = 5.5V
mA
BiasV = 2.4V, SELX = 2.0V
2.0
V
IIN = −18mA
VIK
V
0.25
0 ≤ VIN ≤ 5.5V
IO
Output Current
4.5
IOZH, IOZL
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤ A, ≤ VCC, V
IOZH, IOZL
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤ B, ≤ VCC, V
RON
Switch On Resistance
4.5
4
7
Ω
(Note 6)
4.5
4
7
Ω
VIN = 0V, IIN = 30 mA
4.5
8
14
Ω
VIN = 2.4V, IIN = 15 mA
4.0
11
VIN = 2.4V, IIN = 15 mA
BX = 0
BiasV1 = BiasV2 = 5.5V
BiasV1 = BiasV2 = FLOATING
VIN = 0V, IIN = 64 mA
20
Ω
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
IBIAS
Bias Pin Leakage Current
5.5
±1.0
µA
SEL1, SEL2 = 0V
VIKU
Voltage Undershoot
5.5
−2.0
V
Other inputs at VCC or GND
BX = 0V, BiasVX = 5.5V
0.0 mA ≥ IIN ≥ −50 mA
SEL1, SEL2 = 5.5V
Note 5: Typical values are at VCC = 5.0V and TA = +25°C
Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
3
www.fairchildsemi.com
FSTU32160
Absolute Maximum Ratings(Note 1)
FSTU32160
AC Electrical Characteristics
TA = −40 °C to +85 °C,
Symbol
Parameter
CL = 50 pF, RU= RD = 500Ω
VCC = 4.5 − 5.5V
Min
tPHL, tPLH
A or B, to B or A (Note 7)
tPZH
Output Enable Time,
SEL to A, B
tPZL
Output Enable Time,
SEL to A, B
Output Disable Time,
tPHZ
SEL to A, B
tPLZ
Output Disable Time,
SEL to A, B
VCC = 4.0V
Max
Min
Units
Conditions
Figure No.
VI = OPEN
Figure 2
Figure 3
VI = OPEN for tPZH
Figure 2
Figure 3
Max
0.25
0.25
ns
7.0
30.0
35.0
ns
7.0
30.0
35.0
ns
1.0
6.9
7.3
ns
1.0
7.7
7.7
ns
BiasV = GND
VI = 7V for tPZL
Figure 2
Figure 3
BiasV = 3V
VI = OPEN for tPHZ
BiasV = GND
VI = 7V for tPLZ ,
Figure 2
Figure 3
Figure 2
Figure 3
BiasV = 3V
Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
(Note 8)
Parameter
Typ
Max
Units
Conditions
CIN
Control pin Input Capacitance
4
pF
VCC = 5.0V
CI/O OFF
Input/Output Capacitance “OFF State”
8
pF
VCC = 5.0V, Switch OFF
Note 8: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
Undershoot Characteristic (Note 9)
Symbol
VOUTU
Parameter
Output Voltage During Undershoot
Min
Typ
2.5
VOH − 0.3
Max
Units
V
Conditions
Figure 1
Note 9: This test is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input transient voltage
undershoot event.
FIGURE 1.
Device Test Conditions
Transient
Input Voltage (VIN) Waveform
Parameter
Value
VIN
see Waveform
V
R1 = R2
100K
Ω
VTRI
11.0
V
VCC
5.5
V
www.fairchildsemi.com
Units
4
FSTU32160
AC Loading and Waveforms
Note: Input driven by 50Ω source terminated in 50Ω
Note: C L includes load and stray capacitance, CL = 50 pF
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 2. AC Test Circuit
FIGURE 3. AC Waveforms
5
www.fairchildsemi.com
FSTU32160 16-Bit to 32-Bit
Physical Dimensions inches (millimeters) unless otherwise noted
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD56
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
www.fairchildsemi.com
6
Revised November 1999
FSTU32160A
16-Bit to 32-Bit
Multiplexer/Demultiplexer Bus Switch with
−2V Undershoot Hardened Circuit (UHC) Protection
General Description
Features
The Fairchild Switch FSTU32160A is a 16-bit to 32-bit
high-speed CMOS TTL-compatible multiplexer/demultiplexer bus switch. The low on resistance of the switch
allows inputs to be connected to outputs without adding
propagation delay or generating additional ground bounce
noise.
■ Undershoot hardened to −2V (A and B Ports).
The device can be used in applications where two buses
need to be addressed simultaneously. The FSTU32160A is
designed so that the A Port demultiplexes into B1 or B2 or
both. The A and B Ports are “undershoot hardened” with
UHC protection to support an extended range to 2.0V
below ground. Fairchild’s integrated Undershoot Hardened
Circuit, UHC senses undershoot at the I/O’s, and responds
by preventing voltage differentials from developing and
turning on the switch.
■ Control inputs compatible with TTL level.
■ 4Ω switch connection between two ports.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
■ See Applications Note AN-5008 for details
Two select (SEL1, SEL 2) inputs provide switch enable control. When SEL1, SEL2 are HIGH, the device precharges
the B Port to a selectable bias voltage (Bias V) to minimize
live insertion noise.
Ordering Code:
Order Number
Package Number
Package Description
FSTU32160AMTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
UHC is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation
DS500258
www.fairchildsemi.com
FSTU32160A 16-Bit to 32-Bit
June 1999
FSTU32160A
Connection Diagram
Pin Descriptions
Pin Name
Description
SEL1, SEL2
Select Inputs
A
Bus A
B1 , B2
Bus B
Truth Table
Inputs
SEL1
SEL2
2
x A = x B1
L
H
H
L
x A = x B2
L
L
x A = x B1 and x B2
H
H
x B1, x B2 = BiasV
Logic Diagram
www.fairchildsemi.com
Function
Recommended Operating
Conditions (Note 4)
Supply Voltage (VCC)
−0.5V to +7.0V
DC Switch Voltage (VS) (Note 2)
−2.0V to +7.0V
Power Supply Operating (VCC)
BiasV Voltage Range
−0.5V to +7.0V
Precharge Supply (BiasV)
1.5 to VCC
Input Voltage (VIN)
0V to 5.5V
Output Voltage (VOUT)
0V to 5.5V
DC Input Control Pin Voltage
−0.5V to +7.0V
(VIN) (Note 3)
DC Input Diode Current (lIK) VIN < 0V
−50 mA
DC Output Current (IOUT)
Storage Temperature Range (TSTG)
Input Rise and Fall Time (tr, tf)
128 mA
Switch Control Input
+/− 100 mA
DC VCC/GND Current (ICC/IGND)
4.0V to 5.5V
0nS/V to 5nS/V
Switch I/O
−65°C to +150 °C
0nS/V to DC
−40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: VS is the voltage observed/applied at either the A or B Ports across
the switch.
Note 3: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 4: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
TA = −40 °C to +85 °C
Symbol
Parameter
VCC
Min
Typ
(V)
Max
Units
Conditions
(Note 5)
−1.2
4.5
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0
10
µA
VIN = 5.5V
mA
BiasV = 2.4V
2.0
V
IIN = −18mA
VIK
V
0.25
0 ≤ VIN ≤ 5.5V
IO
Output Current
4.5
IOZH, IOZL
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤ A ≤ V CC, V
IOZH, IOZL
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤ B ≤ V CC, V
RON
Switch On Resistance
4.5
4
7
Ω
(Note 6)
4.5
4
7
Ω
VIN = 0V, IIN = 30 mA
4.5
8
14
Ω
VIN = 2.4V, IIN = 15 mA
4.0
11
VIN = 2.4V, IIN = 15 mA
BX = 0
BiasV1 = BiasV2 = 5.5V
BiasV1 = BiasV2 = Floating
VIN = 0V, IIN = 64 mA
20
Ω
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V
IBIAS
Bias Pin Leakage Current
5.5
±1.0
µA
SEL1, SEL2 = 0V
VIKU
Voltage Undershoot
5.5
−2.0
V
Other inputs at VCC or GND
BX = 0V, BiasVX = 5.5V
0.0 mA ≥ IIN ≥ −50 mA
SEL1, SEL2 = 5.5V
Note 5: Typical values are at VCC = 5.0V and TA = +25°C
Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
3
www.fairchildsemi.com
FSTU32160A
Absolute Maximum Ratings(Note 1)
FSTU32160A
AC Electrical Characteristics
TA = −40 °C to +85 °C,
CL = 50 pF, RU= RD = 500Ω
Symbol
Parameter
VCC = 4.5 − 5.5V
Min
tPHL, tPLH
A or B, to B or A (Note 7)
tPZH
Output Enable Time,
SEL to A, B
tPZL
Output Enable Time,
SEL to A, B
Output Disable Time,
tPHZ
SEL to A, B
tPLZ
Output Disable Time,
SEL to A, B
VCC = 4.0V
Max
Min
Units
Conditions
Figure No.
VI = OPEN
Figure 2
Figure 3
VI = OPEN for tPZH
Figure 2
Figure 3
Max
0.25
0.25
ns
0.5
4.0
4.5
ns
1.0
4.8
5.5
ns
1.0
5.9
6.9
ns
1.0
7.4
7.0
ns
BiasV = GND
VI = 7V for tPZL
Figure 2
Figure 3
BiasV = 3V
VI = Open for tPHZ
BiasV = GND
VI = 7V for tPLZ
Figure 2
Figure 3
Figure 2
Figure 3
BiasV = 3V
Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
(Note 8)
Parameter
Typ
Max
Units
Conditions
CIN
Control pin Input Capacitance
4
pF
VCC = 5.0V
CI/O OFF
Input/Output Capacitance “OFF State”
8
pF
VCC = 5.0V, Switch OFF
Note 8: TA = +25°C, f = 1 Mhz, Capacitance is characterized but not tested.
Undershoot Characteristic (Note 9)
Symbol
Parameter
Output Voltage During Undershoot
VOUTU
Min
Typ
2.5
VOH − 0.3
Max
Units
V
Conditions
Figure 1
Note 9: This is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input transient voltage undershoot
event.
FIGURE 1.
Device Test Conditions
Transient
Input Voltage (VIN) Waveform
Parameter
Value
VIN
See Waveform
V
R1 - R2
100K
Ω
VTRI
11.0
V
VCC
5.5
V
www.fairchildsemi.com
Units
4
FSTU32160A
AC Loading and Waveforms
Note: Input driven by 50Ω source terminated in 50Ω
Note: C L includes load and stray capacitance, CL = 50 pF
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 2. AC Test Circuit
FIGURE 3. AC Waveforms
5
www.fairchildsemi.com
FSTU32160A 16-Bit to 32-Bit
Physical Dimensions inches (millimeters) unless otherwise noted
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD56
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
www.fairchildsemi.com
6
Revised December 1999
FSTU3257
Quad 2:1 Multiplexer/Demultiplexer Bus Switch with
−2V Undershoot Hardened Circuit (UHC) Protection
General Description
Features
The Fairchild Switch FSTU3257 is a quad 2:1 high-speed
CMOS TTL-compatible multiplexer/demultiplexer bus
switch. The low on resistance of the switch allows inputs to
be connected to outputs without adding propagation delay
or generating additional ground bounce noise.
■ Undershoot hardened to −2V (A and B Ports)
When OE is LOW, the select pin connects the A Port to the
selected B Port output. The A and B Ports are “undershoot
hardened” with UHC protection to support an extended
range of 2.0V below ground. Fairchild’s integrated Undershoot Hardened Circuit UHC senses undershoot at the I/O
and responds by preventing voltage differentials from
developing and turning on the switch. When OE is HIGH,
the switch is OPEN and a high-impedance state exists
between the two ports.
■ Soft enable turn-on to minimize bus to bus charge
sharing during enable
■ 4Ω switch connection between two ports.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
■ Control inputs compatible with TTL level.
■ See Applications Note AN-5008 for details
Ordering Code:
Order Number
Package Number
Package Description
FSTU3257QSC
MQA16
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
FSTU3257MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
UHC is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation
DS500302
www.fairchildsemi.com
FSTU3257 Quad 2:1 Multiplexer/Demultiplexer Bus Switch with −2V Undershoot Hardened Circuit (UHC)
Protection
August 1999
FSTU3257
Logic Diagram
Connection Diagram
Pin Descriptions
Truth Table
Pin Name
Description
S
OE
Function
OE
Bus Switch Enable
X
H
Disconnect
S
Select Input
A
Bus A
L
L
A = B1
H
L
A = B2
B1–B2
www.fairchildsemi.com
Bus B
2
Recommended Operating
Conditions (Note 4)
Supply Voltage (VCC)
−0.5V to +7.0V
DC Switch Voltage (VS) (Note 2)
−2.0V to +7.0V
Power Supply Operating (VCC)
DC Input Control Pin Voltage (VIN)(Note 3)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN<0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT)
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
−40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The Recommended Operating Conditions tables will define the conditions
for actual device operation.
Note 2: VS is the voltage observed/applied at either the A or B Ports across
the switch.
Note 3: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 4: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
Parameter
VCC
(V)
TA = −40 °C to +85 °C
Typ
(Note 5)
Min
Max
−1.2
Units
Conditions
IIN = −18mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0≤ VIN ≤5.5V
IOZ
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤A, B ≤VCC
RON
Switch On Resistance
(Note 6)
4.5
4
7
Ω
VIN = 0V, IIN = 64mA
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
4.5
8
15
Ω
VIN = 2.4V, IIN = 15mA
4.0
11
20
Ω
VIN = 2.4V, IIN = 15mA
5.5
3
µA
VIN = VCC or GND, IOUT = 0
5.5
2.5
mA
5.5
−2.0
V
ICC
Quiescent Supply Current
∆ ICC
Increase in ICC per Input
VIKU
Voltage Undershoot
4.5
2.0
V
V
One input at 3.4V
Other inputs at VCC or GND
0.0 mA ≥ IIN ≥ −50 mA
OE = 5.5V
Note 5: Typical values are at VCC = 5.0V and TA = +25°C
Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
3
www.fairchildsemi.com
FSTU3257
Absolute Maximum Ratings(Note 1)
FSTU3257
AC Electrical Characteristics
TA = −40 °C to +85°C,
Symbol
CL = 50pF, RU = RD = 500Ω
Parameter
VCC = 4.5 – 5.5V
Min
tPHL,tPLH
Max
Prop Delay Bus to Bus (Note 7)
Prop Delay, Select to Bus A
7.0
Units
VCC = 4.0V
Min
No.
0.25
0.25
30.0
35.0
7.0
30.0
35.0
Output Enable Time, OE to Bus A, B
7.0
30.0
35.0
ns
ns
1.5
8.4
9.8
1.5
8.8
9.8
ns
Output Disable Time, Output Enable Time, OE to Bus A, B
Figure
Max
tPZH, tPZL Output Enable Time, Select to Bus B
tPHZ, tPLZ Output Disable Time, Select to Bus B
Conditions
VI = OPEN
VI = 7V for tPZL
VI = OPEN for tPZH
VI = 7V for tPLZ
VI = OPEN for tPHZ
Figure 2
Figure 3
Figure 2
Figure 3
Figure 2
Figure 3
Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance
(Note 8)
Symbol
Parameter
CIN
Typ
Control Pin Input Capacitance
A Port
CI/O
B Port
CI/O ON State
Max
3
Input/Output Capacitance
Input/Output Capacitance ON State (A or B Port)
Units
7.5
pF
5.5
pF
14
pF
Conditions
VCC = 5.0V
pF
VCC, OE = 5.0V
VCC = 5.0V Switch ON
Note 8: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
Undershoot Characteristic (Note 9)
Symbol
Parameter
Output Voltage During Undershoot
VOUTU
Min
Typ
2.5
VOH − 0.3
Max
Units
V
Conditions
Figure 1
Note 9: This is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input transient voltage undershoot
event.
FIGURE 1.
Device Test Conditions
Parameter
Value
VIN
See Waveform
V
R1 - R2
100K
Ω
VTRI
11.0
V
VCC
5.5
V
www.fairchildsemi.com
Transient
Input Voltage (VIN) Waveform
Units
4
FSTU3257
AC Loading and Waveforms
Note: Input driven by 50Ω source terminated in 50Ω
Note: C L includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 nS
FIGURE 2. AC Test Circuit
FIGURE 3. AC Waveforms
5
www.fairchildsemi.com
FSTU3257
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number MQA16
www.fairchildsemi.com
6
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
7
www.fairchildsemi.com
FSTU3257 Quad 2:1 Multiplexer/Demultiplexer Bus Switch with −2V Undershoot Hardened Circuit (UHC)
Protection
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Revised December 1999
FSTU3384
10-Bit Bus Switch with
−2V Undershoot Hardened Circuit (UHC) Protection
General Description
Features
The Fairchild Switch FSTU3384 provides 10 bits of highspeed CMOS TTL-compatible bus switches. The low on
resistance of the switch allows inputs to be connected to
outputs without adding propagation delay generating additional ground bounce noise. Both the A Ports and the B
Ports are “undershoot hardened” with UHC protection to
support an extended input range to 2.0V below ground.
Fairchild’s integrated Undershoot Hardened Circuit, UHC
senses undershoot at the I/Os, and responds by preventing
voltage differentials from developing and turning on the
switch. The device is organized as two 5-bit switches with
separate bus enable (OE) signals. When OE is LOW, the
switch is ON and Port A is connected to Port B. When OE
is HIGH, the switch is OPEN and a high-impedance state
exists between the two ports.
■ 4Ω switch connection between two ports
■ Undershoot Hardened to -2.0V.
■ Minimal propagation delay through the switch
■ Low lCC.
■ Zero ground bounce in flow-through mode
■ Control inputs compatible with TTL level
■ See Applications Note AN-5008 for details.
Ordering Code:
Order Number
Package Number
Package Description
FSTU3384WM
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MO-153 4.4mm Wide
FSTU3384QSC
MQA24
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide
FSTU3384MTC
MTC24
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Truth Table
Pin Descriptions
Pin Names
Description
OEA, OEB
Bus Switch Enable
A0–A9
Bus A
B0–B9
Bus B
OEA OEB
B0–B4
B5–B9
L
L
A0–A4
A5–A9
L
H
A0–A4
HIGH-Z State
H
L
HIGH-Z State A5–A9
H
H
HIGH-Z State HIGH-Z State
Function
Connect
Connect
Connect
Disconnect
UHC is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation
DS500195
www.fairchildsemi.com
FSTU3384 10-Bit Bus Switch with
May 1999
FSTU3384
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 3)
−0.5V to +7.0V
Supply Voltage (VCC )
DC Switch Voltage (VS)
−2.0V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN) (Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (IIK) VIN<0V
−50 mA
Output Voltage (VOUT)
DC Output (IOUT ) Sink Current
128 mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150°C
0nS/V to 5nS/V
Switch I/O
0nS/V to DC
−40°C to +85°C
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the “Electrical
Characteristics” table are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
Parameter
VCC
(V)
TA = −40°C to +85°C
Typ
(Note 5)
Min
Units
Condition
Max
−1.2
IIN = − 18 mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0-5.5
VIL
LOW Level Input Voltage
4.0-5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
IOZ
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤ A, B ≤ VCC, VIN = VIH
RON
Switch On Resistance
4.5
7
Ω
VS = 0V, IIN = 64 mA
(Note 4)
4.5
2.0
V
V
4
0 ≤ VIN ≤ 5.5V
4.5
4
7
Ω
VS = 0V, IIN = 30 mA
4.5
8
15
Ω
VS = 2.4V, IIN = 15 mA
4.0
11
VS = 2.4V, IIN = 15 mA
20
Ω
ICC
Quiescent Supply Current
5.5
3
µA
VS = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
OE input at 3.4V
IBIAS
Bias Pin Leakage Current
5.5
±1.0
µA
OE = 0V, B = 0V, BiasV = 5.5V
IOZU
Switch Undershoot Current
5.5
100
µA
IIN= − 20 mA, OE = 5.5V, VOUT ≥ VIH
VIKU
Voltage Undershoot
5.5
−2.0
V
0.0 mA ≥ IIN ≥ − 50 mA, OE = 5.5V
Other inputs at VCC or GND
Note 4: Measured by voltage drop between A and B pin at indicated current through the switch. On resistance is determined by the lower of the voltages on
the two (A or B) pins.
Note 5: All typical values are at VCC = 5.0V, TA = 25°C.
www.fairchildsemi.com
2
TA = −40°C to +85°C
CL = 50 pF, RU = RD = 500Ω
Symbol
Parameter
VCC = 4.5 − 5.5V
Min
tPHL, tPLH
tPZH, tPZL
tPHZ, tPLZ
Max
Prop Delay Bus to Bus (Note 6)
Output Enable Time
OEA, OEB to An, Bn
Output Disable Time
OEA, OEB to An, Bn
VCC = 4.0V
Min
Units
Conditions
Figure No.
Max
0.25
0.25
ns
1.0
5.7
6.2
ns
1.5
5.2
5.5
ns
VI = OPEN
Figure 1,
Figure 2
VI = 7V for tPZL
VI = OPEN for tPZH
VI = 7V for tPLZ
VI = OPEN for tPHZ
Figure 1,
Figure 2
Figure 1,
Figure 2
Note 6: This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance
Symbol
(Note 7)
Parameter
Typ
Max
Units
Conditions
CIN
Control Input Capacitance
3
pF
VCC = 5.0V
CI/O (OFF)
Input/Output Capacitance
5
pF
VCC, OE = 5.0V
Note 7: Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω, RU = RD = 500 Ω
Note: C L includes load and stray capacitance, CL= 50 pF
Note: Input PRR = 1.0 MHz, tW = 500 nS
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FSTU3384
AC Electrical Characteristics
FSTU3384
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MO-153 4.4mm Wide
Package Number M24B
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide
Package Number MQA24
www.fairchildsemi.com
4
FSTU3384 10-Bit Bus Switch with
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC24
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
5
www.fairchildsemi.com
Revised December 1999
FSTU6800
10-Bit Bus Switch with Pre-Charged Outputs
and −2V Undershoot Hardened Circuit (UHC) Protection
General Description
Features
The Fairchild Switch FSTU6800 provides 10-bits of highspeed CMOS TTL-compatible bus switching. The low on
resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise. Both the A Ports and the B
Ports are “undershoot hardened” with UHC protection to
support an extended input range to 2.0V below ground.
Fairchild’s integrated Undershoot Hardened Circuit, UHC
senses undershoot at the I/Os, and responds by preventing
voltage differentials from developing and turning on the
switch. The device also precharges the B Port to a selectable bias voltage (BiasV) to minimize live insertion noise.
■ 4Ω switch connection between two ports.
■ Undershoot Hardened to -2.0V.
■ Soft enable turn-on to minimize bus-to-bus charge
sharing during enable.
■ Low lCC.
■ Zero bounce in flow-through mode.
■ Output precharge to minimize live insertion noise.
■ Control inputs compatible with TTL level.
■ See Applications Note AN-5008 for details.
The device is organized as a 10-bit switch with a bus
enable (OE) signal. When OE is LOW, the switch is ON
and Port A is connected to Port B. When OE is HIGH, the
switch is OPEN and the B Port is precharged to BiasV
through an equivalent 10-kΩ resistor.
Ordering Code:
Order Number
Package Number
Package Description
FSTU6800WM
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MO-153 4.4mm Wide
FSTU6800QSC
MQA24
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide
FSTU6800MTC
MTC24
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Pin Descriptions
Truth Table
Pin Name
Description
OE
Bus Switch Enable
A
Bus A
OE
B0–B9
B
Bus B
L
A0–A9
Connect
BiasV
Bus B Voltage Bias
H
BiasV
Precharge
Function
UHC is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation
DS500194
www.fairchildsemi.com
FSTU6800 10-Bit Bus Switch with Pre-Charged Outputs
December 1998
FSTU6800
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 3)
Supply Voltage (VCC )
−0.5V to +7.0V
DC Switch Voltage (VS)
−2.0V to +7.0V
Power Supply Operating (VCC)
4.0V to 5.5V
Bias V Voltage Range
−0.5V to +7.0V
Precharge Supply (BiasV)
1.5V to VCC
DC Input Voltage (VIN) (Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN< 0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT ) Sink Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
Switch Control Input
−65°C to +150 °C
0 nS/V to 5 nS/V
Switch I/O
0nS/V to DC
−40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The Recommended Operating Conditions tables will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
TA = −40 °C to +85 °C
Typ
(Note 5)
Min
Units
Conditions
Max
−1.2
IIN = −18mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0 ≤ VIN ≤ 5.5V
IO
Output Current
4.5
mA
BiasV = 2.4V, B = 0
IOZ
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤ A ≤ VCC, VIN = VIH
RON
Switch On Resistance
4.5
4
7
Ω
VS = 0V, IIN = 64 mA
(Note 4)
4.5
4
7
Ω
VS = 0V, IIN = 30 mA
4.5
8
15
Ω
VS = 2.4V, IIN = 15 mA
4.0
11
4.5
2.0
V
V
0.25
20
Ω
VS = 2.4V, IIN = 15 mA
ICC
Quiescent Supply Current
5.5
3
µA
VS = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
OE input at 3.4V
IBIAS
Bias Pin Leakage Current
5.5
±1.0
µA
OE = 0V, B = 0V, BiasV = 5.5V
IOZU
Switch Undershoot Current
5.5
100
µA
IIN = −20 mA, OE = 5.5V, VOUT ≥ VIH
VIKU
Voltage Undershoot
5.5
−2.0
V
0.0 mA ≥ IIN ≥ −50 mA, OE = 5.5V
Other inputs at VCC or GND
Note 4: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
Note 5: Typical values are at VCC = 5.0V and T A= +25°C
www.fairchildsemi.com
2
TA = −40 °C to +85 °C,
CL = 50 pF, RU = RD = 500Ω
Symbol
Parameter
VCC = 4.5 – 5.5V
Min
tPHL,tPLH
Prop Delay Bus to Bus (Note 6)
tPZH
Output Enable Time
tPZL
tPHZ
Output Disable Time
tPLZ
VCC = 4.0V
Max
Min
Units
Conditions
Figure No.
Max
0.25
0.25
ns
VI = OPEN
7.0
30.0
35.0
ns
VI = OPEN
BiasV = GND
7.0
30.0
35.0
ns
VI = 7V
BiasV = 3V
1.0
6.1
6.5
ns
VI = OPEN
BiasV = GND
1.0
7.3
6.8
ns
VI = 7V
BiasV = 3V
Figure 1
Figure 2
Figure 1
Figure 2
Figure 1
Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance
Symbol
(Note 7)
Parameter
Typ
Max
Units
Conditions
CIN
Control Pin Input Capacitance
3
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
5
pF
VCC, OE = 5.0V
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω, RU = RD = 500 Ω
Note: C L includes load and stray capacitance, CL= 50 pF
Note: Input PRR = 1.0 MHz, tW = 500 nS
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FSTU6800
AC Electrical Characteristics
FSTU6800
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MO-153 4.4mm Wide
Package Number M24B
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide
Package Number MQA24
www.fairchildsemi.com
4
FSTU6800 10-Bit Bus Switch with Pre-Charged Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC24
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
5
www.fairchildsemi.com
Preliminary
Revised December 1999
FSTU6800A
10-Bit Bus Switch with Pre-Charged Outputs
and −2V Undershoot Hardened Circuit (UHC) Protection
(Preliminary)
General Description
Features
The Fairchild Switch FSTU6800A provides 10-bits of highspeed CMOS TTL-compatible bus switching. The low on
resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise. Both the A Ports and the B
Ports are “undershoot hardened” with UHC protection to
support an extended input range to 2.0V below ground.
Fairchild’s integrated Undershoot Hardened Circuit, UHC
senses undershoot at the I/Os, and responds by preventing
voltage differentials from developing and turning on the
switch. The device also precharges the B Port to a selectable bias voltage (BiasV) to minimize live insertion noise.
■ 4Ω switch connection between two ports.
■ Undershoot Hardened to -2.0V.
■ Soft enable turn-on to minimize bus-to-bus charge
sharing during enable.
■ Low lCC.
■ Zero bounce in flow-through mode.
■ Output precharge to minimize live insertion noise.
■ Control inputs compatible with TTL level.
■ See Applications Note AN-5008 for details.
The device is organized as a 10-bit switch with a bus
enable (OE) signal. When OE is LOW, the switch is ON
and Port A is connected to Port B. When OE is HIGH, the
switch is OPEN and the B Port is precharged to BiasV
through an equivalent 10-kΩ resistor.
Ordering Code:
Order Number
Package Number
Package Description
FSTU6800AWM
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MO-153 4.4mm Wide
FSTU6800AQSC
MQA24
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide
FSTU6800AMTC
MTC24
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
UHC is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation
DS500209
www.fairchildsemi.com
FSTU6800A 10-Bit Bus Switch with Pre-Charged Outputs
December 1998
FSTU6800A
Preliminary
Logic Diagram
Connection Diagram
Pin Descriptions
Truth Table
Pin Name
Description
OE
B0–B9
Function
OE
Bus Switch Enable
L
A0–A9
Connect
A
Bus A
H
BiasV
Precharge
B
Bus B
BiasV
Bus B Voltage Bias
www.fairchildsemi.com
2
Preliminary
Recommended Operating
Conditions (Note 3)
Supply Voltage (VCC)
−0.5V to +7.0V
DC Switch Voltage (VS)
−2.0V to +7.0V
Power Supply Operating (VCC)
4.0V to 5.5V
Bias V Voltage Range
−0.5V to +7.0V
Precharge Supply (BiasV)
1.5V to VCC
DC Input Voltage (VIN) (Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN< 0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT) Sink Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
Switch Control Input
−65°C to +150 °C
0 nS/V to 5 nS/V
Switch I/O
0 nS/V to DC
−40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The Recommended Operating Conditions tables will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
VIK
Clamp Diode Voltage
TA = −40 °C to +85 °C
Typ
(Note 5)
Min
4.5
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
II
Input Leakage Current
5.5
IO
Output Current
4.5
IOZ
OFF-STATE Leakage Current
5.5
RON
Switch On Resistance
4.5
4
(Note 4)
4.5
ICC
Quiescent Supply Current
∆ ICC
Increase in ICC per Input
IBIAS
Bias Pin Leakage Current
IOZU
Switch Undershoot Current
VIKU
Voltage Undershoot
Units
Conditions
Max
−1.2
V
0.8
V
2.0
IIN = −18 mA
V
±1.0
µA
0 ≤ VIN ≤ 5.5V
mA
BiasV = 2.4V, B = 0
±1.0
µA
0 ≤ A ≤ VCC, V IN = VIH
7
Ω
VS = 0V, IIN = 64 mA
4
7
Ω
VS = 0V, IIN = 30 mA
4.5
8
15
Ω
VS = 2.4V, IIN = 15 mA
4.0
11
20
Ω
VS = 2.4V, IIN = 15 mA
3
µA
0.25
5.5
VS = VCC or GND, IOUT = 0
OE input at 3.4V
5.5
2.5
mA
5.5
±1.0
µA
OE = 0V, B = 0V, BiasV = 5.5V
5.5
100
µA
IIN = −20 mA, OE = 5.5V, VOUT ≥ VIH
5.5
−2.0
V
0.0 mA ≥ IIN ≥ −50 mA, OE = 5.5V
Other inputs at VCC or GND
Note 4: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
Note 5: Typical values are at VCC = 5.0V and TA= +25°C
3
www.fairchildsemi.com
FSTU6800A
Absolute Maximum Ratings(Note 1)
FSTU6800A
Preliminary
AC Electrical Characteristics
TA = −40 °C to +85 °C,
CL = 50 pF, RU = RD = 500Ω
Symbol
Parameter
VCC = 4.5 – 5.5V
Min
tPHL, tPLH
Prop Delay Bus to Bus (Note 6)
tPZH
Output Enable Time
tPZL
tPHZ
Output Disable Time
tPLZ
VCC = 4.0V
Max
Min
Units
Conditions
Figure No.
Max
0.25
0.25
ns
VI = OPEN
1.0
6.2
6.5
ns
VI = OPEN
BiasV = GND
1.0
6.2
6.5
ns
VI = 7V
BiasV = 3V
1.0
6.1
6.5
ns
VI = OPEN
BiasV = GND
1.0
7.3
6.8
ns
VI = 7V
BiasV = 3V
Figure 1
Figure 2
Figure 1
Figure 2
Figure 1
Figure 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance
Symbol
(Note 7)
Parameter
Typ
Max
Units
Conditions
CIN
Control Pin Input Capacitance
3
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
5
pF
VCC, OE = 5.0V
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω, RU = RD = 500 Ω
Note: CL includes load and stray capacitance, C L= 50 pF
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
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Preliminary
FSTU6800A
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MO-153 4.4mm Wide
Package Number M24B
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide
Package Number MQA24
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FSTU6800A 10-Bit Bus Switch with Pre-Charged Outputs
Preliminary
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC24
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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