ZL40122 High Speed, Current Feedback Quad Operational Amplifier Data Sheet Features March 2006 • 450 MHz small signal bandwidth • 1500 V/µs slew rate • Ordering Information 5.2 mA/channel static supply current ZL40122/DCA ZL40122/DCB ZL40122DCF1 14 lead SOIC 14 lead SOIC 14 lead SOIC* • 65 mA output current ZL40122DCE1 14 lead SOIC* • 120 MHz gain flatness to +/- 0. 1dB • 14 pin SOIC Tubes Tape & Reel Tape & Reel, Bake & Drypack Tubes, Bake & Drypack *Pb Free Matte Tin -40°C to +85°C the ideal choice where a high density of high speed devices is required. Applications • Video switchers/routers • Video line drivers • Twisted pair driver/receiver • Active filters The flat gain response to 120 MHz, 450 MHz small signal bandwidth and 1500 V/µs slew rate make the device an excellent solution for video applications such as driving video signals down significant cable lengths. Other applications which may take advantage of the ZL40122 superior dynamic performance features include low cost high order active filters and twisted pair driver/receivers. Description The ZL40122 is a high speed, quad, current feedback operational amplifier offering high performance at a low cost. The device has a very high output current drive capability of 65 mA while requiring only 5.2 mA of static supply current. This feature makes the ZL40122 Out_1 14 Out_4 1 In_n_1 2 13 In_n_4 1 4 In_p_1 3 12 In_p_4 ZL40122 V+ 4 11 V- In_p_2 5 10 In_p_3 2 3 In_n_2 6 9 In_n_3 Out_2 7 8 Out_3 Figure 1 - Functional Block Diagram and Pin Connection 1 Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2003-2006, Zarlink Semiconductor Inc. All Rights Reserved. ZL40122 Data Sheet Change Summary Changes from November 2004 Issue to March 2006 Issue. Page, section, figure and table numbers refer to this current issue. Page Item 1 Change Updated Ordering Information Application Notes Current Feedback Op Amps Current feedback op amps offer several advantages over voltage feedback amplifiers: • AC bandwidth not dependent on closed loop gain • High Slew Rate • Fast settling time The architecture of the current feedback opamp consists of a high impedance non-inverting input and a low impedance inverting input which is always feedback connected. The error current is amplified by a transimpedance amplifier which can be considered to have gain Z( f ) = Zo f 1 + j fo where Zo is the DC gain. It can be shown that the closed loop non-inverting gain is given by Vout = Vin Av fR f 1 + j f Z o o where Av is the DC closed loop gain, Rf is the feedback resistor. The closed loop bandwidth is therefore given by BWCL = f o Z o GBOL = Rf Rf and for low values of closed loop gain Av depends only on the feedback resistor Rf and not the closed loop gain. Increasing the value of Rf • Increases closed loop stability • Decreases loop gain • Decreases bandwidth • Reduces gain peaking • Reduces overshoot Using a resistor value of Rf=510 Ω for Av=+2 V/V gives good stability and bandwidth. However since requirements for stability and bandwidth vary it may be worth experimentation to find the optimal Rf for a given application. 2 Zarlink Semiconductor Inc. ZL40122 Data Sheet Layout Considerations Correct high frequency operation requires a considered PCB layout as stray capacitances have a strong influence over high frequency operation for this de0ice. The Zarlink evaluation board serves as a good example layout that should be copied. The following guidelines should be followed: • Include 6.8 uF tantalum and 0.1 uF ceramic capacitors on both positive and negative supplies • Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitances • Minimize all trace lengths to reduce series inductance 3 Zarlink Semiconductor Inc. ZL40122 Data Sheet Application Diagrams Vcc 6.8uF • • • 0.1uF Vin • Vout • ¼ ZL40122 Rf Rin • Ra • 0.1uF Vout Rf = Av = 1 + Vin Ra • • 6.8uF Vee Figure 2 - Non-inverting Gain Vcc 6.8uF • • • Rb 0.1uF Vout • ¼ ZL40122 Rf Vin • • Ra Rin • 0.1uF • • Vout Rf = Av = − Vin Ra 6.8uF Vee Figure 3 - Inverting Gain 4 Zarlink Semiconductor Inc. ZL40122 Data Sheet Absolute Maximum Ratings Parameter Symbol Min. Max. Units VIN ±1.2 V 1 Vin Differential 2 Output Short Circuit Protection VOS/C See Apps Note in this data sheet 3 Supply voltage V+, V- ±6.5 V 4 Voltage at Input Pins 5 Voltage at Output Pins 6 EDS Protection (HBM Human Body Model) (see Note 2) 7 Storage Temperature 8 9 V(+IN), V(-IN) V- V+ V VO V- V+ V 2 (see Note 3) kV -55 +150 °C Latch-up test ±100 mA for 100 ms (see Note 4) Supply transient test 20% pulse for 100 ms (see Note 5) Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 2: Human body model, 1.5 kΩ in series with 100 pF. Machine model, 20 Ωin series with 100 pF. Note 3: 0.8 kV between the pairs of +INA, -INA and +INB pins only. 2 kV between supply pins, OUTA or OUTB pins and any input pin. Note 4: ±100 mA applied to input and output pins to force the device to go into "latch-up". The device passes this test to JEDEC spec 17. Note 5: Positive and Negative supply transient testing increases the supplies by 20% for 100 ms. Operating Range Characteristic Min. Typ. Max. Units Supply Voltage (Vcc) ±4.0 ±6.0 V Operating Temperature (Ambient) -40 +85 °C Junction to Ambient resistance Rth(j-a) 150 °C 4 layer FR4 board Junction to Case resistance Rth(j-c) 60 °C 4 layer FR4 board 5 Zarlink Semiconductor Inc. Comments ZL40122 Data Sheet Electrical Characteristics - Vcc=±5 V, Tamb=25C(typ.),Tamb=-40C to +85C(min-max), Av=+2V/V, Rf=510 Ω, Rload=100 Ω unless specified. Characteristic Conditions Typ 25C Min/ Max 25C Min/ Max –40 to Units Test Type1 +85C Frequency Domain Response -3 dB Bandwidth Av=+1; Vo < 0.5 Vp-p; Rf=1.5 kΩ 450 - - MHz C Av=+2; Vo < 0.5 Vp-p; Rf=510 Ω 380 - - MHz C Av=+2; Vo < 5 Vp-p; Rf=510 Ω 170 - - MHz C +/- 0.1 dB Flatness Av=+2; Vo < 0.5 Vp-p; Rf=510 Ω 120 - - MHz C Differential Gain (NTSC) Rload=150 Ω 0.01 - - % C Differential Phase (NTSC) Rload=150 Ω 0.015 - - deg. C 1 - - ns C Vout=5 V Step 2.8 - - ns C Settling Time to 0.1% Vout=2 V Step 6 - - ns C Overshoot Vout=0.5 V Step 4 - - % C Slew Rate Vout=5 V Step 1500 - - V/µs C Time Domain Response Rise and Fall Time Vout=0.5 V Step Noise and Distortion 2nd Harmonic Distortion Vout=2 Vp-p, 1 MHz -84 - - dBc C 3nd Harmonic Distortion Vout=2 Vp-p, 1 MHz -85 - - dBc C Voltage >1 MHz 5.5 - - nV Hz C Non-Inverting Current >1 MHz 1.3 - - pV Hz C Inverting Current >1 MHz 11 - - pA Hz C Input Offset Voltage 2.7 ±6.3 ±7.7 mV A Average Drift - - 15 µV/deg. C C 2.6 ±5.6 ±6 uA A - - 6 nA/deg. C C Equivalent Input Noise Static, DC Performance Input Bias Current – Non-inverting Average Drift 6 Zarlink Semiconductor Inc. ZL40122 Characteristic Conditions Input Bias Current – Inverting Data Sheet Typ 25C Min/ Max 25C Min/ Max –40 to Units Test Type1 +85C 7.4 ±25 ±28 µA A - - 15 nA/deg. C C Average Drift Power Supply Rejection Ratio (+ve) DC 61 58 57 dB A Power Supply Rejection Ratio (-ve) DC 58 56 55 dB A Common Mode Rejection Ratio DC 54 50 49 dB A Supply Current (per Channel) Quiescent 5.2 6.5 6.7 mA A Input Resistance (Non-inverting) 8 - - MΩ C Input Capacitance (Non-inverting) 1 - - pF C ±2.4 ±2.2 ±2.0 V A ±2.8 ±2.7 ±2.6 V A 65 - - mA C 90 - - mΩ C Miscellaneous Performance Common Mode Input Range Output Voltage Range Rload=100 Ω Output Current (max) Output Resistance, Closed Loop DC Note: Test Types: (A) 100% tested at 25°C. Over temperature limits are set by characterization and simulation. (B) Limits set by characterization or simulation. (C) Typical value only for information. 7 Zarlink Semiconductor Inc. ZL40122 Typical Performance Characteristics - Data Sheet Tamb=25degC, Vsupply=± 5 V, Rload=100 Ω, Av=+2V/V, Rf=510 Ω, unless otherwise specified. Non-Inverting Frequency Response 2 200 Gain 0 Av =+1 Rf = 1k 100 Av =+8 Rf = 150 -4 50 Phase -6 0 -8 -50 Av =+4 Rf = 150 -10 Vo=0.5Vp-p -12 -100 Av =+2 Rf = 510 -14 1 10 100 Frequency (MHz) 8 Zarlink Semiconductor Inc. -150 -200 1000 Phase (deg.) Normalised Gain (dB) -2 150 ZL40122 Data Sheet Non-Inverting Frequency Response varying Rf 2 Rf=390 0 Rf=250 Normalised Gain (dB) -2 Rf=700 -4 -6 Rf=510 -8 -10 -12 -14 Vo=0.5Vp-p -16 -18 10 100 1000 Frequency (MHz) Open Loop Transimpedance Gain and Phase 120 0 -30 Transimpedance Gain 100 -60 Transimpedance Phase 90 -90 80 -120 70 -150 60 -180 50 -210 40 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07 Frequency (Hz) 9 Zarlink Semiconductor Inc. 1.0E+08 -240 1.0E+09 Transimpedance Phase Transimpedance Gain 110 ZL40122 Data Sheet Large Signal Gain 0 Vo = 1V p-p -2 Vo = 5V p-p -6 Vo = 4V p-p -8 -10 -12 -14 -16 10 100 1000 Frequency (MHz) Harmonic Distortion vs Frequency -40 Vo = 2V p-p 2nd & 3rd Harmonic Distortion (dBc) Gain (dB) -4 -50 2nd Harmonic -60 -70 -80 3rd Harmonic -90 -100 1 10 Frequency (MHz) 10 Zarlink Semiconductor Inc. 100 ZL40122 Data Sheet CMRR 70 T = - 40 degC Rejection Ration (dB) 60 50 T = + 25 degC T = + 85 degC 40 30 20 10 0 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07 1.0E+08 1.0E+07 1.0E+08 Frequency (Hz) PSRR +ve 80 T = - 40 degC Rejection Ration (dB) 70 60 T = + 25 degC 50 T = + 85 degC 40 30 20 10 0 1.0E+03 1.0E+04 1.0E+05 1.0E+06 Frequency (Hz) 11 Zarlink Semiconductor Inc. ZL40122 Data Sheet PSRR -ve 70 T = - 40 degC Rejection Ration (dB) 60 50 T = + 25 degC T = + 85 degC 40 30 20 10 0 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07 1.0E+08 Frequency (Hz) T Input Voltage and Current Noise Current Noise (pA/SQRT(Hz) Voltage Noise (nV/SQRT(Hz) 100 Inverting Input Current Noise 10 Input Voltage Noise Non-Inverting Input Current 1 1.0E+01 1.0E+02 1.0E+03 1.0E+04 1.0E+05 Frequency (Hz) 12 Zarlink Semiconductor Inc. 1.0E+06 1.0E+07 ZL40122 Data Sheet Supply Current vs Temperature 5.60 5.50 Supply Current (mA) 5.40 5.30 5.20 5.10 5.00 4.90 4.80 4.70 -40 -20 0 20 40 60 80 100 120 140 120 140 Die Temp (deg. C) DC Drift Over Temperature 9.00 Input Offset Voltage (mV) Input Bias Current (uA) 8.00 Input Bias Inv 7.00 6.00 5.00 Input Offset Voltage 4.00 3.00 2.00 Input Bias Non-Inv 1.00 0.00 -40 -20 0 20 40 60 Die Temp (deg. C) 13 Zarlink Semiconductor Inc. 80 100 ZL40122 Data Sheet Large and Small Signal Pulse Response 3 0.6 Vout = 5V Step Large Signal Vout (V) 1 0.2 Vout = 0.5V Step 0 0 -1 -0.2 -2 -0.4 -3 -0.6 0 10 20 30 40 50 60 70 Small Signal Vout (V) 0.4 2 80 Time (ns) Closed Loop Output Impedance Closed Loop Output Impedance (Ohms) 10 1 0.1 0.01 0.01 0.1 1 Frequency (MHz) 14 Zarlink Semiconductor Inc. 10 100 ZL40122 Data Sheet Differential Gain & Phase ZL40122 / ZL40123 NTSC RL=150? Best fit Gain Best fit Phase 0.07 0.06 0.05 Differential Gain & Phase (?% & ?°) 0.04 0.03 0.02 0.01 0 -0.01 -0.02 -0.03 -0.04 -0.05 -0.06 -0.07 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 Bias Voltage 15 Zarlink Semiconductor Inc. 0.2 0.3 0.4 0.5 0.6 0.7 Package Code c Zarlink Semiconductor 2003 All rights reserved. ISSUE ACN DATE APPRD. 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It is the user’s responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink’s conditions of sale which are available on request. Purchase of Zarlink’s I2C components conveys a licence under the Philips I2C Patent rights to use these components in and I2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright Zarlink Semiconductor Inc. All Rights Reserved. TECHNICAL DOCUMENTATION - NOT FOR RESALE