PHILIPS BLF369

BLF369
Multi-use VHF power LDMOS transistor
Rev. 03 — 29 January 2008
Preliminary data sheet
1. Product profile
1.1 General description
A general purpose 500 W LDMOS RF power transistor for pulsed and continuous wave
applications in the HF/VHF band up to 500 MHz.
Table 1.
Typical performance
Typical RF performance at VDS = 32 V and Th = 25 °C in a common-source 225 MHz test circuit.[1]
Mode of operation
CW, class AB
2-tone, class AB
pulsed, class AB
[2]
f
PL
PL(PEP)
Gp
ηD
IMD3
(MHz)
(W)
(W)
(dB)
(%)
(dBc)
225
500
-
18
60
-
f1 = 225; f2 = 225.1
-
500
19
47
−28
225
500
-
19
55
-
[1]
Th is the heatsink temperature.
[2]
tp = 2 ms; δ = 10 %.
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
1.2 Features
n Typical pulsed performance at 225 MHz, a drain-source voltage VDS of 32 V and a
quiescent drain current IDq = 2 × 1.0 A:
u Load power PL = 500 W
u Power gain Gp = 19 dB
u Drain efficiency ηD = 55 %
n Advanced flange material for optimum thermal behavior and reliability
n Excellent ruggedness
n High power gain
n Designed for broadband operation (HF/VHF band)
n Source on underside eliminates DC isolators, reducing common-mode inductance
n Easy power control
n Integrated ESD protection
n Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS), using exemption No. 7 of the annex
BLF369
NXP Semiconductors
Multi-use VHF power LDMOS transistor
1.3 Applications
n Pulsed applications up to 500 MHz
n Communication transmitter applications in the HF/VHF/UHF band under specific
conditions
n Industrial applications up to 500 MHz under special conditions
2. Pinning information
Table 2.
Pinning
Pin
Description
1
drain1
2
drain2
3
gate1
4
gate2
5
Simplified outline
1
Symbol
1
2
5
3
5
[1]
source
3
4
4
2
sym117
[1]
Connected to flange.
3. Ordering information
Table 3.
Ordering information
Type number
BLF369
Package
Name
Description
Version
-
flanged LDMOST ceramic package; 2 mounting holes; SOT800-2
4 leads
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
VDS
Conditions
Min
Max
Unit
drain-source voltage
-
65
V
VGS
gate-source voltage
−0.5
+13
V
Tstg
storage temperature
−65
+150
°C
Tj
junction temperature
-
200
°C
BLF369_3
Preliminary data sheet
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Rev. 03 — 29 January 2008
2 of 17
BLF369
NXP Semiconductors
Multi-use VHF power LDMOS transistor
5. Thermal characteristics
Table 5.
Thermal characteristics
Symbol
Parameter
Conditions
Typ
Unit
Tj = 200 °C
[1][2]
Rth(j-case)
thermal resistance from
junction to case
0.26
K/W
Rth(j-h)
thermal resistance from
junction to heatsink
Tj = 200 °C
[1][2][3]
0.35
K/W
Zth(j-h)
transient thermal impedance
from junction to heatsink
Tj = 200 °C
tp = 100 µs; δ = 10 %
[4]
0.063 K/W
tp = 1 ms; δ = 10 %
[4]
0.117 K/W
tp = 2 ms; δ = 10 %
[4]
0.133 K/W
tp = 3 ms; δ = 10 %
[4]
0.142 K/W
tp = 1 ms; δ = 20 %
[4]
0.140 K/W
[1]
Tj is the junction temperature.
[2]
Rth(j-case) and Rth(j-h) are measured under RF conditions.
[3]
Rth(j-h) is dependent on the applied thermal compound and clamping/mounting of the device.
[4]
See Figure 1.
001aah494
0.4
Zth(j-h)
(K/W)
(7)
0.3
0.2
(6)
(3)
(2)
(1)
0.1
(5)
(4)
0
10−7
10−6
10−5
10−4
10−3
10−2
10−1
1
10
tp (s)
(1) δ = 1 %
(2) δ = 2 %
(3) δ = 5 %
(4) δ = 10 %
(5) δ = 20 %
(6) δ = 50 %
(7) δ = 100 % (DC)
Fig 1. Transient thermal impedance from junction to heatsink as function of pulse duration
BLF369_3
Preliminary data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 29 January 2008
3 of 17
BLF369
NXP Semiconductors
Multi-use VHF power LDMOS transistor
6. Characteristics
Table 6.
Characteristics
Tj = 25 °C unless otherwise specified.
Symbol
V(BR)DSS
Parameter
Conditions
drain-source breakdown voltage
VGS = 0 V; ID = 6 mA
[1]
[1]
Min
Typ
Max
Unit
65
-
-
V
VGS(th)
gate-source threshold voltage
VDS = 20 V; ID = 600 mA
4
-
5.5
V
IDSS
drain leakage current
VGS = 0 V; VDS = 32 V
-
-
4.2
µA
IDSX
drain cut-off current
VGS = VGS(th) + 9 V; VDS = 10 V
-
100
-
A
IGSS
gate leakage current
VGS = 20 V; VDS = 0 V
-
-
60
nA
gfs
forward transconductance
VGS = 20 V; ID = 13 A
[1]
-
15
-
S
RDS(on)
drain-source on-state resistance
VGS = VGS(th) + 9 V; ID = 13 A
[1]
-
40
-
mΩ
VGS = 0 V; VDS = 32 V; f = 1 MHz
[2]
-
400
-
pF
[2]
-
230
-
pF
-
15
-
pF
input capacitance
Ciss
Coss
output capacitance
VGS = 0 V; VDS = 32 V; f = 1 MHz
Crss
reverse transfer capacitance
VGS = 0 V; VDS = 32 V; f = 1 MHz
[1]
ID is the drain current.
[2]
Ciss and Coss include reverse transfer capacitance (Crss).
001aae484
600
Coss
(pF)
400
200
0
0
10
20
30
40
50
VDS (V)
VGS = 0 V; f = 1 MHz.
Fig 2. Output capacitance as a function of drain-source voltage; typical values per
section
BLF369_3
Preliminary data sheet
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Rev. 03 — 29 January 2008
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BLF369
NXP Semiconductors
Multi-use VHF power LDMOS transistor
7. Application information
Table 7.
RF performance in a common-source 225 MHz test circuit
Th = 25 °C unless otherwise specified.
Mode of operation
f
VDS
IDq
PL
PL(PEP) Gp
ηD
IMD3
∆Gp
(MHz)
(V)
(A)
(W)
(W)
(dB)
(%)
(dBc)
(dB)
CW, class AB
225
32
2 × 1.0 500
-
> 17
> 55
-
-
2-tone, class AB
f1 = 225; f2 = 225.1
32
2 × 1.0 -
500
> 18
> 43
< −24
1
225
-
-
-
> 18
> 50
-
-
pulsed, class AB
[1]
[1]
500
tp = 2 ms; δ = 10 %.
7.1 CW
001aae501
22
70
ηD
(%)
GP
(dB)
ηD
20
50
GP
18
30
16
0
100
200
300
10
400
500
PL (W)
Fig 3. CW power gain and drain efficiency as a function of output power; typical values
BLF369_3
Preliminary data sheet
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Rev. 03 — 29 January 2008
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BLF369
NXP Semiconductors
Multi-use VHF power LDMOS transistor
7.2 2-Tone
001aae502
22
ηD
(%)
GP
(dB)
ηD
20
001aae503
0
60
IMD3
(dBc)
40
−20
20
−40
GP
18
16
0
200
0
600
400
−60
0
200
400
PL(PEP) (W)
600
PL(PEP) (W)
VDS = 32 V; f1 = 225 MHz; f2 = 225.1 MHz;
IDq = 2 × 1.0 A; Th = 25 °C.
VDS = 32 V; f1 = 225 MHz; f2 = 225.1 MHz;
IDq = 2 × 1.0 A; Th = 25 °C.
Fig 4. 2-Tone power gain and drain efficiency as a
function of peak envelope power; typical values
Fig 5. 2-Tone third order intermodulation distortion as
a function of peak envelope power; typical
values
7.3 Pulsed
001aah498
20
Gp
(dB)
001aah499
70
ηD
(%)
19
50
18
17
30
16
15
10
0
200
400
600
800
0
PL (W)
400
600
800
PL (W)
f = 225 MHz; VDS = 32 V; IDq = 2 × 1 A; tp = 2 ms;
δ = 10 %.
Fig 6. Pulsed power gain as function of load power;
typical values
f = 225 MHz; VDS = 32 V; IDq = 2 × 1 A; tp = 2 ms;
δ = 10 %.
Fig 7. Pulsed drain efficiency as function of
load power; typical values
BLF369_3
Preliminary data sheet
200
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 29 January 2008
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BLF369
NXP Semiconductors
Multi-use VHF power LDMOS transistor
001aah500
21
001aah501
70
ηD
(%)
Gp
(dB)
19
50
17
30
15
10
0
200
400
600
800
0
PL (W)
200
400
600
800
PL (W)
f = 225 MHz; VDS = 32 V; IDq = 2 × 1 A; tp = 100 µs;
δ = 10 %.
Fig 8. Pulsed power gain as function of load power;
typical values
f = 225 MHz; VDS = 32 V; IDq = 2 × 1 A; tp = 100 µs;
δ = 10 %.
Fig 9. Pulsed drain efficiency as function of
load power; typical values
7.4 Maximum heatsink temperature
The heatsink temperature is defined 1 mm below the surface of the heatsink at the center
of the flange.
The maximum allowable heatsink temperature is given in the following graphs at several
pulsed conditions as well as for CW.
BLF369_3
Preliminary data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 29 January 2008
7 of 17
BLF369
NXP Semiconductors
Multi-use VHF power LDMOS transistor
001aah502
100
Th
(°C)
Th
(°C)
(1)
80
001aah503
100
(1)
(2)
(3)
80
(2)
(3)
60
60
(4)
(4)
40
40
(5)
(5)
20
20
0
0
0
200
400
600
800
1000
P (W)
0
200
δ = 10 %.
δ = 20 %.
(1) tp ≤ 2 ms
(1) tp ≤ 2 ms
(2) tp = 10 ms
(2) tp = 10 ms
(3) tp = 20 ms
(3) tp = 20 ms
(4) tp = 50 ms
(4) tp = 50 ms
(5) tp = 100 ms
(5) tp = 100 ms
Fig 10. Heatsink temperature as function of power
dissipation at a duty cycle of 10 %
400
600
800
1000
P (W)
Fig 11. Heatsink temperature as function of power
dissipation at a duty cycle of 20 %
001aah504
100
Th
(°C)
80
60
40
20
0
100
300
500
700
P (W)
Fig 12. CW heatsink temperature as function of power dissipation
7.5 Ruggedness in class-AB operation
The BLF369 is capable of withstanding a load mismatch corresponding to VSWR = 10 : 1
through all phases under the following conditions: 2-tone signal; VDS = 32 V; f = 225 MHz
at rated load power (PL(PEP) = 500 W).
BLF369_3
Preliminary data sheet
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Rev. 03 — 29 January 2008
8 of 17
BLF369
NXP Semiconductors
Multi-use VHF power LDMOS transistor
7.6 Reliability
001aae504
106
Years
105
(1)
(2)
(3)
(4)
(5)
(6)
104
103
102
(7)
10
(8)
(9)
(10)
(11)
1
0
6
12
18
24
30
Idc (A)
TTF (0.1 % failure fraction); best estimate values.
The reliability at pulsed conditions can be calculated as follows: TTF (0.1 %) × 1 / δ.
(1) Tj = 100 °C
(2) Tj = 110 °C
(3) Tj = 120 °C
(4) Tj = 130 °C
(5) Tj = 140 °C
(6) Tj = 150 °C
(7) Tj = 160 °C
(8) Tj = 170 °C
(9) Tj = 180 °C
(10) Tj = 190 °C
(11) Tj = 200 °C
Fig 13. BLF369 electromigration (ID, total device)
8. Test information
Table 8.
List of components
For test circuit, see Figure 14, Figure 15 and Figure 16.
Component
Description
Value
Remarks
B1
semi rigid coax
25 Ω; 120 mm
EZ90-25-TP
B2
semi rigid coax
25 Ω; 56 mm
EZ90-25-TP
C1
multilayer ceramic chip capacitor
91 pF
[1]
C2, C3
multilayer ceramic chip capacitor
56 pF
[1]
C4, C7
multilayer ceramic chip capacitor
100 pF
[1]
C5, C8
ceramic capacitor
15 nF
C6, C9
electrolytic capacitor
220 µF
C10, C11, C13, C14
multilayer ceramic chip capacitor
220 pF
[1]
C12, C15
ceramic capacitor
15 nF
[1]
BLF369_3
Preliminary data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 29 January 2008
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BLF369
NXP Semiconductors
Multi-use VHF power LDMOS transistor
Table 8.
List of components …continued
For test circuit, see Figure 14, Figure 15 and Figure 16.
Component
Description
Value
Remarks
C20
multilayer ceramic chip capacitor
100 pF
[1]
C21
multilayer ceramic chip capacitor
20 pF
[1]
C22, C25
multilayer ceramic chip capacitor
100 pF
[1]
C23, C26
ceramic capacitor
15 nF
C24, C27
electrolytic capacitor
10 µF
C28, C31
multilayer ceramic chip capacitor
100 pF
C29, C32
multilayer ceramic chip capacitor
220 pF
C30, C33
ceramic capacitor
15 nF
L1, L3
stripline
-
L2, L4
air coil
-
[1]
[2]
(W × L) 12 mm × 15 mm
4 windings; D = 8 mm; d = 1 mm
[2]
(W × L) 14 mm × 15 mm
L5, L6
stripline
-
R1, R2, R3, R4
resistor
0.25 W; 4 Ω
R5, R6, R8, R9
resistor
0.25 W; 10 Ω
R7, R10
potentiometer
10 kΩ
R11, R12
resistor
0.25 W; 1 Ω
T1, T2
semi rigid coax
25 Ω; 68 mm
EZ90-25-TP
T3, T4
semi rigid coax
25 Ω; 60 mm
EZ90-25-TP
[1]
American technical ceramics type 100B or capacitor of same quality.
[2]
Printed-Circuit Board (PCB): Rogers 5880; εr = 2.2 F/m; height = 0.79 mm; Cu (top/bottom metallization);
thickness copper plating = 35 µm.
BLF369_3
Preliminary data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 29 January 2008
10 of 17
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NXP Semiconductors
BLF369_3
Preliminary data sheet
+ VG1(test)
+ VD1(test)
C24
R7
C23
C5
C22
C4
R5
C30
Rev. 03 — 29 January 2008
R11
R6
C12
L2
L5
C29
L1
T3
C28
50 Ω
C6
C10
T1
C11
R1
R2
C2
B2
B1
T4
C31
R12
C33
C32
C21
C20
C1
L3
L6
T2
50 Ω
C3
C13
C14
R3
R4
C15
L4
R9
C25
C7
C26
C8
C9
R10
C27
+ VG2(test)
+ VD2(test)
BLF369
11 of 17
© NXP B.V. 2008. All rights reserved.
Fig 14. Class-AB common-source 225 MHz test circuit; VD1(test), VD2(test), VG1(test) and VG2(test) are drain and gate test voltages
001aae535
Multi-use VHF power LDMOS transistor
R8
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NXP Semiconductors
BLF369_3
Preliminary data sheet
Rev. 03 — 29 January 2008
80 mm
001aae536
BLF369
12 of 17
© NXP B.V. 2008. All rights reserved.
Fig 15. Printed-Circuit Board (PCB) for class-AB 225 MHz test circuit
95 mm
Multi-use VHF power LDMOS transistor
95 mm
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NXP Semiconductors
BLF369_3
Preliminary data sheet
R7
C24
C4
C23
C6
C5
C22
+
+
+ VG1(test)
R5
L2
R6
C12
+ VD1(test)
R1
B1
C30
T3
L5
R2
C10
Rev. 03 — 29 January 2008
T1
R11
C28
C2
C14
C3
C21
C20
C1
BLF 369
C31
C11
L1
C29
C32
L3
R12
B2
T2
L6
T4
R3
C33
R8
R9
L4
C13
R4
+ VD2(test)
C15
+ VG2(test)
C25
+
C26
C7
C27
C8
R10
C9
001aae537
Fig 16. Component layout for class-AB 225 MHz test circuit
BLF369
13 of 17
© NXP B.V. 2008. All rights reserved.
C1 mounted on top of transformers T1 and T2; C20 mounted on top of transformers T3 and T4.
Multi-use VHF power LDMOS transistor
+
BLF369
NXP Semiconductors
Multi-use VHF power LDMOS transistor
9. Package outline
Flanged LDMOST ceramic package; 2 mounting holes; 4 leads
SOT800-2
D
A
F
y
D1
U1
B
q
C
1
c
w1 M A
2
H U2
M
B
M
E
P
E1
5
L
3
4
A
b
w2 M C
Q
M
e
0
5
10 mm
scale
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
UNIT
A
b
c
D
D1
E
E1
e
F
H
L
p
Q
q
U1
U2
w1
w2
y
mm
6.3
5.9
10.55
10.45
0.15
0.10
30.5
29.9
31.1
30.9
14.6
14.4
15.3
15.1
12.7
2.26
2.00
22.8
21.8
3.7
3.3
3.56
3.49
3.1
2.8
38.5
44.5
44.2
15.4
15.0
0.25
0.25
0.05
0.248 0.415 0.006 1.201 1.224 0.575 0.602
0.232 0.411 0.004 1.177 1.216 0.567 0.594
0.5
0.089 0.898 0.146 0.140 0.122
1.752 0.606
1.516
0.079 0.858 0.130 0.137 0.110
1.740 0.591
0.01
0.01
0.002
inches
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
05-06-02
05-06-07
SOT800-2
Fig 17. Package outline SOT800-2
BLF369_3
Preliminary data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 29 January 2008
14 of 17
BLF369
NXP Semiconductors
Multi-use VHF power LDMOS transistor
10. Abbreviations
Table 9.
Abbreviations
Acronym
Description
CW
Continuous Wave
DC
Direct Current
GSM
Global System for Mobile communications
HF
High Frequency
LDMOS
Laterally Diffused Metal Oxide Semiconductor
LDMOST
Laterally Diffused Metal-Oxide Semiconductor Transistor
PEP
Peak Envelope Power
RF
Radio Frequency
TTF
Time To Failure
UHF
Ultra High Frequency
VHF
Very High Frequency
VSWR
Voltage Standing Wave Ratio
11. Revision history
Table 10.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
BLF369_3
20080129
Preliminary data sheet
-
BLF369_2
Modifications:
•
Information for pulsed conditions has been added.
BLF369_2
20061208
Objective data sheet
-
BLF369_1
BLF369_1
20060413
Objective data sheet
-
-
BLF369_3
Preliminary data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 29 January 2008
15 of 17
BLF369
NXP Semiconductors
Multi-use VHF power LDMOS transistor
12. Legal information
12.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: [email protected]
BLF369_3
Preliminary data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 29 January 2008
16 of 17
BLF369
NXP Semiconductors
Multi-use VHF power LDMOS transistor
14. Contents
1
1.1
1.2
1.3
2
3
4
5
6
7
7.1
7.2
7.3
7.4
7.5
7.6
8
9
10
11
12
12.1
12.2
12.3
12.4
13
14
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 3
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Application information. . . . . . . . . . . . . . . . . . . 5
CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2-Tone. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pulsed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Maximum heatsink temperature . . . . . . . . . . . . 7
Ruggedness in class-AB operation. . . . . . . . . . 8
Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Test information . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15
Legal information. . . . . . . . . . . . . . . . . . . . . . . 16
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Contact information. . . . . . . . . . . . . . . . . . . . . 16
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 29 January 2008
Document identifier: BLF369_3