TRIQUINT CMH192

GaAs MMIC
CMH192
Datasheet
• High-Linearity, PCS LNA/Mixer IC for use in
US and Korean band CDMA Mobile Phones
• Integrated bypass switch for LNA
• G aAs PHEMT Process
IF Out
• Leadless 3.5 x 3.5 m m . SMT package
• LO Input power range: -7.0 to 0 dBm
LNA
• O perating voltage range: 2.7 to 4 V
• Total current consum ption: 22 m A
LO
• Adjustable Mixer G ain and IP3
ESD: Electrostatic discharge sensitive device
O bserve handling Precautions!
Type
Marking
Ordering code
(tape and reel)
Package
CMH192
H192
Q62705-K608
VQFN-20
Maximum Ratings
Supply Voltage
DC-Voltage at RF Ports
DC-Voltage at GND Ports
DC-Voltage at CNTL Ports
Power into LO Input
Symbol
VDD
VRF
VGND
VCNTL
Power into RF-IF Ports
Pin,LO
Pin, RF
Operating Temperature
Ta
Channel Temperature
TCh
Storage Temperature
Tstg
Thermal Resistance
Channel to Soldering Point (GND)
CMH192 – Datasheet (October 1st, 2002)
RthChS
Value
Unit
min
max
0
6
V
- 0.3
0.3
V
- 0.3
0.3
V
0
0.3 + VDD
V
10
dBm
10
dBm
85
°C
150
°C
150
°C
-40
-55
102
°C /W
pg. 1/11
Electrical Characteristics
Parameter
GaAs MMIC
CMH192
min
typ
max
Unit
1930
-
1990
MHz
1780
-
1940
MHz
1840
-
1870
MHz
1590
-
1820
MHz
50
-
250
MHz
LO Power Input
-7.0
-
0.0
dBm
Supply Voltage (Vdd)
2.7
-
4.0
V
High Logic Level (H)
VDD – 0.2
-
VDD
V
0.0
-
0.2
V
RF – Frequency / US
LO – Frequency / US
(1)
RF – Frequency / Korean
LO – Frequency / Korean
(1)
IF Frequency range
Low Logic Level (L)
1) High-side LO is also supported
LNA – Performance of LNA
Test conditions: Ta = 25°C, VDD= 2.7 V, PRF= -22 dBm, fRF = 1960 MHz, LOW=GND, HIGH=Vdd
Mode – High Gain, High Linearity
min
Operating Current
typ
max
Unit
7
mA
Noise Figure
1.1
dB
Gain
12.5
dB
Input / Output return loss
10
dB
3rd Order Input Intercept Point
8.5
dBm
Mode – High Gain, Reduced Current
min
Operating Current
Typ
max
Unit
5
mA
Noise Figure
1.2
dB
Gain
12.3
dB
Input / Output return loss
10
dB
3rd Order Input Intercept Point
7.5
dBm
Mode – Low Gain, By-Pass Mode
Operating Current
min
Typ
max
Unit
0
mA
4.5
dB
Gain
5
dB
Input / Output return loss
10
dB
3rd Order Input Intercept Point
25
dBm
Noise Figure
CMH192 – Datasheet (October 1st, 2002)
pg. 2/11
GaAs MMIC
CMH192
MIXER - Electrical Characteristics of Mixer section
Test conditions: Ta = 25°C; VDD= 2.7V, PLO = -7 dBm,PRF=-22 dBm, fRF = 1960 MHz,
fLO = fRF - f IF, fIF = 210MHz, LOW=GND, HIGH=Vdd
Mode – High Linearity
min
typ
max
Unit
Operating Current
15
mA
Conversion Gain
15.0
dB
Noise Figure
3.5
dB
3rd Order Input Intercept Point
5.5
dBm
RF Input return loss
10
dB
10
dB
350 - j*515
Ω
LO Input return loss
IF Output Impedance
(1)
Mode – Reduced Current
min
typ
max
Unit
Operating Current
12
mA
Conversion Gain
14.5
dB
Noise Figure
3.8
dB
3rd Order Input Intercept Point
4
dBm
RF Input return loss
10
dB
10
dB
350 - j*515
Ω
LO Input return loss
IF Output Impedance
(1)
1) IF Output externally tuned to desired impedance
FULL CHAIN – LNA/Downconverter Characteristics
Test conditions: Ta = 25°C; VDD= 2.7V, PLO = -7 dBm, PRF=-22 dBm, fRF = 1960 MHz,
fLO = fRF - f IF, fIF = 210MHz, LOW=GND, HIGH=Vdd
Mode – High Gain, High Linearity
Total operating Current
min
typ
max
Unit
22.0
mA
24.5
dB
Noise Figure
1.7
dB
Input IP3
-4.5
dBm
Conversion Gain
(1)
LNA Input IP3
10.0
dBm
1) Assumes 3 dB loss for image filter, value is calculated based on gain measurement of LNA and
downconverter
CMH192 – Datasheet (October 1st, 2002)
pg. 3/11
GaAs MMIC
CMH192
FULL CHAIN – LNA/Downconverter Characteristics (continued)
Test conditions: Ta = 25°C; VDD= 2.7V, PLO = -7 dBm, PRF=-22 dBm, fRF = 1960 MHz,
fLO = fRF - f IF, fIF = 210MHz, LOS=GND, HIGH=Vdd
min
typ
max
Mode – High Gain, Reduced Current
Unit
Total operating Current
17
mA
23.5
dB
Noise Figure
1.8
dB
Input IP3
-5.5
dBm
LNA Input IP3
7.5
dBm
Conversion Gain
(1)
Mode – Low Gain (LNA bypass)
min
Typ
Total operating Current
Conversion Gain
(1)
Noise Figure
max
Unit
12
mA
7.2
dB
11.5
dB
Input IP3
11.5
1) Assumes 3.0 dB loss for image filter, value is calculated based on gain measurement
of LNA and downconverter
dBm
Truth Table
Control Voltage
Operating Mode
Gain Ctl
Rcv Only
High Gain & Linearity
H
H
High Gain, Low Current
H
L
Low Gain
L
L
CMH192 – Datasheet (October 1st, 2002)
pg. 4/11
GaAs MMIC
CMH192
PIN Assignments & Functional Block Diagram
MIXE
IF
LN
RF
LO
Pin Assignments:
PIN
Symbol
1
LO in
2
GND
3
LOA Vdd
4
Mix Out
Truth5Table: IF Mtch
6
IF In
7
GND
8
IFA src
9
IFA out
10
GND
11
RFA Vdd
12
RFA in
13
Rcv
14
Vdd
15
LNA out
16
LNA Vdd
17
GND
18
LNA in
19
GND
20
Gctl
Description
LO Input
Ground
Supply voltage for LO Buffer Amp
Mixer IF Output
IF input match connection
IF amplifier input
Ground
IF Amplifier FET source ground
IF Amplifier output
Ground
Supply voltage for RFA
Mixer input from image filter
Current mode control
Supply voltage
RF output of LNA
Supply voltage for LNA
Ground
RF Input to LNA
Ground
Gain mode control for LNA
CMH192 – Datasheet (October 1st, 2002)
pg. 5/11
GaAs MMIC
CMH192
Applications Circuit:
Component
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
Description
CAP, 1 pF
CAP, 22 pF
CAP, 10K pF
CAP, 100 pF
CAP, 22 pF
CAP, 1000 pF
CAP, 10K pF
CAP, 3.3 pF
CAP, 100 pF
CAP, 2 pF
CAP, 4 pF
Package Type
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
CMH192 – Datasheet (October 1st, 2002)
Component
C12
L1
L2
L3
L4
L5
L6
L7
L8
R1
R2
Description
CAP, 100 pF
IND, 5.6 nH
IND, 120 nH
IND, 100 nH
IND, 82 nH
IND, 2.7 nH
IND, 5.6 nH
IND, 5.6 nH
IND, 12 nH
RES, 100 KOHM
RES,100 KOHM
Package Type
0402
0402
0603
0603
0603
0402
0402
0402
0402
0402
0402
pg. 6/11
GaAs MMIC
CMH192
Package Outline – VQFN 20
Recommended PCB Layout:
100pF 0402 SMT capacitor, 3 places
(Murata GRP1555C7H100JZ01 or equivalent )
CMH192 – Datasheet (October 1st, 2002)
pg. 7/11
GaAs MMIC
CMH192
Evaluation Board:
CMH192 – Datasheet (October 1st, 2002)
pg. 8/11
GaAs MMIC
CMH192
CMH192 – Application Information
DC Biasing:
Supply Voltage
One regulated voltage source is needed for CMH192. On the evaluation board it
is labeled VDD.
Minimum LO Power for Proper Biasing
For proper biasing of the CMH192, a minimum LO input power is required. If the
part is turned ON without any LO drive applied all currents will be extremely high.
The minimum LO required is approximately –9 dBm. Operation with LO input
powers below the minimum value causes the current to increase in all amplifier
stages. For higher LO input power levels the current stays relatively constant over a
wide range of LO powers. Proper matching of the LO amplifier is also important to
achieve the lowest current consumption and to minimize the required LO input
power.
Adjustable Current Level
The CMH192 can operate in two different current/linearity modes: High Linearity
(with higher current) and Reduced Current (lower linearity). To operate with reduced
current the voltage on pin 13 (RCV) should be set LOW. Some additional current
reduction can be achieved by reducing the voltage at pin 14 by placing a resistor
between VDD and pin 14. The current pulled by pin 14 is approximately 1 mA.
Higher currents can be realized by using a higher VDD voltage.
Tuning LO and IF Amplifiers:
The CMH192 can be tuned to utilize either high or low side LO frequencies and
allows a wide range of IF frequencies. Depending on the chosen frequency plan the
off chip components for the LO and IF amplifiers will need to be optimized. An
application circuit with all component values is provided for low side LO injection with
IF frequency of 210 MHz (RF freq 1930 – 1960 MHz)
Two external components (L6 and L7) are required for tuning the LO. L6 is
critical for setting the minimum current and to achieve the constant DC current over
the operating band. L7 sets the LO input match.
Components L4, C9 and C11 form the input match for the IF amplifiers and will
vary depending on the chosen IF frequency. The inductor on pin 8 allows
adjustment to the gain of the IF amplifier.
Output matching components shown in the application circuit provide a
transformation for a 50 Ohm load impedance. The output impedance for the IFA
(looking into pin 9) at 210 MHz is approximately (350 - j*515) Ohms.
CMH192 – Datasheet (October 1st, 2002)
pg. 9/11
GaAs MMIC
CMH192
Downconverter Gain Adjustment:
The Downconverter gain can be adjusted by changing the source feedback
inductor L3 for the IFA. Higher inductance will give lower downconverter gain and
typically improve the IIP3.
Gain/Current Control Pins:
LOW = 0 to 0.2 V
HIGH = Vdd to (Vdd – 0.2) V
VGAIN – select between high and low gain states in the LNA.
VGAIN = HIGH: LNA ON (~12 dB Gain, ~ 6.5 mA current)
VGAIN = LOW: LNA bypassed (~ 4 dB Loss, no current)
VRCV - selects Current/Linearity mode (changes current in LNA/RFA/IFA)
VRCV = LOW selects Reduced Current Mode
VRCV = HIGH selects High Linearity Mode.
Other Notes:
Inductor L1 is critical for setting the Noise Figure of the LNA. A high Q wire wound
inductor (e.g. Coilcraft) is recommended to achieve minimum NF.
Inductor L5 and Capacitor C10 form a “tank circuit” to terminate the RF in the mixer.
These components should be placed in parallel close to pin 4. These elements may
require tuning depending on component vendor and board parasitics to achieve flat
conversion gain vs. frequency.
Inductor L8 is necessary for proper operation of the circuit for ESD protection.
Lower RF frequencies (i.e. Korean PCS or GPS) may be accommodated by adding
inductance between the LNA and RFA VDD pins and their bypass capacitors.
LNA current can be determined by subtracting the current in Low Gain mode from
the current in High Gain mode (keeping VRCV and VMODE constant).
Control lines (G_CNTL, VRCV and VMODE) have an input impedance of greater
than 1 MΩ when Vdd is ON. When VDD is off, they have approximately 20 KΩ input
impedance.
CMH192 – Datasheet (October 1st, 2002)
pg. 10/11
GaAs MMIC
CMH192
Published by TriQuint Semiconductor GmbH, Marketing, Konrad-Zuse-Platz 1, D-81829
Munich.
Copyright TriQuint Semiconductor GmbH 2002. All Rights Reserved.
As far as patents or other rights of third parties are concerned, liability is only assumed for
components per se, not for applications, processes and circuits implemented within
components or assemblies.
The information describes the type of component and shall not be considered as assured
characteristics.
Terms of delivery and rights to change design reserved.
For questions on technology, delivery, and prices please contact the Offices of TriQuint
Semiconductor in Germany or the TriQuint Semiconductor Companies and Representatives
worldwide.
Due to technical requirements components may contain dangerous substances. For information
on the type in question please contact your nearest TriQuint Semiconductors Office.
pg. 11/11