LT5526 High Linearity, Low Power Downconverting Mixer U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LT®5526 is a low power broadband mixer optimized for high linearity applications such as point-to-point data transmission, cable infrastructure and wireless infrastructure systems. The device includes an internally matched high speed LO amplifier driving a double-balanced active mixer core. An integrated RF buffer amplifier provides excellent LO-RF isolation. The RF and IF ports can be easily matched across a broad range of frequencies for use in a wide variety of applications. Operation up to 2GHz Broadband RF, LO and IF Operation High Input IP3: +16.5dBm at 900MHz Typical Conversion Gain: 0.6dB at 900MHz SSB Noise Figure: 11dB at 900MHz On-Chip 50Ω LO Match Integrated LO Buffer: –5dBm Drive Level High LO-RF and LO-IF Isolation Low Supply Current: 28mA Typ Enable Function Single 5V Supply 16-Lead QFN (4mm × 4mm) Package The LT5526 offers a high performance alternative to passive mixers. Unlike passive mixers which have conversion loss and require high LO drive levels, the LT5526 delivers conversion gain at significantly lower LO input levels and is much less sensitive to LO power level variations. U APPLICATIO S ■ ■ ■ Point-to-Point Data Communication Systems Wireless Infrastructure Cable Downlink Infrastructure High Linearity Receiver Applications , LTC and LT are registered trademarks of Linear Technology Corporation. U ■ TYPICAL APPLICATIO High Signal Level Frequency Downconversion IF Output Power and IM3 vs RF Input Power (Two Input Tones) VCC 5V DC EN VCC2 0 VCC1 –10 900MHz 140MHz 900MHz LNA RF + IF RF – + IF – GND VGA ADC OUTPUT POWER (dBm/TONE) BIAS –20 –30 POUT –40 –50 –60 –70 –80 IM3 –90 LT5526 LO+ LO – LO INPUT –5dBm –100 –20 5526 TA01 TA = 25°C fIF = 140MHz fRF = 900MHz fLO = 760MHz PLO = –5dBm –10 –15 –5 RF INPUT POWER (dBm/TONE) 0 5526 TA02 5526f 1 LT5526 W U U U W W W ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION (Note 1) Supply Voltage ...................................................... 5.5V Enable Voltage ............................... –0.3V to VCC + 0.3V LO Input Power ............................................... +10dBm LO+ to LO– Differential DC Voltage ......................... ±1V RF Input Power ................................................ +10dBm RF+ to RF– Differential DC Voltage ....................... ±0.7V Operating Temperature Range ................ – 40°C to 85°C Storage Temperature Range ................. – 65°C to 125°C Junction Temperature (TJ)................................... 125°C ORDER PART NUMBER NC LO– LO+ NC TOP VIEW 16 15 14 13 NC 1 LT5526EUF 12 GND RF + 2 11 IF+ 17 RF – 3 10 IF– 6 7 8 EN VCC2 NC 9 GND 5 VCC1 NC 4 UF PART MARKING UF PACKAGE 16-LEAD (4mm × 4mm) PLASTIC QFN 5526 TJMAX = 125°C, θJA = 37°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB. NC PINS SHOULD BE GROUNDED Consult LTC Marketing for parts specified with wider operating temperature ranges. DC ELECTRICAL CHARACTERISTICS VCC = 5V, EN = 3V, TA = 25°C (Note 3), unless otherwise noted. Test circuit shown in Figure 1. PARAMETER CONDITIONS MIN TYP MAX UNITS 3.6 5 5.3 V 33 mA 100 µA Power Supply Requirements (VCC) Supply Voltage Supply Current VCC = 5V Shutdown Current EN = Low 28 Enable (EN) Low = Off, High = On EN Input High Voltage (On) 3 V EN Input Low Voltage (Off) Enable Pin Input Current 0.3 EN = 5V EN = 0V V 55 0.01 µA µA Turn-On Time (Note 5) 3 µs Turn-Off Time (Note 5) 6 µs AC ELECTRICAL CHARACTERISTICS (Notes 2, 3) PARAMETER CONDITIONS RF Input Frequency Range (Note 4) Requires RF Matching MIN 0.1 to 2000 TYP MAX UNITS MHz LO Input Frequency Range (Note 4) Requires DC Blocks 0.1 to 2500 MHz IF Output Frequency Range (Note 4) Requires IF Matching 0.1 to 1000 MHz VCC = 5V, EN = 3V, TA = 25°C. Test circuits shown in Figures 1 and 2. (Notes 2, 3) PARAMETER CONDITIONS RF Input Return Loss ZO = 50Ω, External Match 15 dB LO Input Return Loss ZO = 50Ω, External DC Blocks 15 dB IF Output Return Loss ZO = 50Ω, External Match 15 dB LO Input Power MIN TYP –10 to 0 MAX UNITS dBm 5526f 2 LT5526 AC ELECTRICAL CHARACTERISTICS VCC = 5V, EN = 3V, TA = 25°C, PRF = –15dBm (–15dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz), PLO = –5dBm, unless otherwise noted. Test circuits shown in Figures 1 and 2. (Notes 2, 3) PARAMETER CONDITIONS MIN TYP MAX UNITS RF to LO Isolation fRF = 350MHz, fIF = 70MHz, fLO = 420MHz fRF = 900MHz, fIF = 140MHz, fLO = 760MHz fRF = 1900MHz, fIF = 140MHz, fLO = 1760MHz 69 55 50 dB dB dB Conversion Gain fRF = 350MHz, fIF = 70MHz, fLO = 420MHz fRF = 900MHz, fIF = 140MHz, fLO = 760MHz fRF = 1900MHz, fIF = 140MHz, fLO = 1760MHz 0.6 0.6 0.4 dB dB dB Conversion Gain vs Temperature TA = –40°C to 85°C Input 3rd Order Intercept –0.013 dB/°C fRF = 350MHz, fIF = 70MHz, fLO = 420MHz fRF = 900MHz, fIF = 140MHz, fLO = 760MHz fRF = 1900MHz, fIF = 140MHz, fLO = 1760MHz 15.2 16.5 14.1 dBm dBm dBm Single Sideband Noise Figure fRF = 350MHz, fIF = 70MHz, fLO = 420MHz fRF = 900MHz, fIF = 140MHz, fLO = 760MHz fRF = 1900MHz, fIF = 140MHz, fLO = 1760MHz 12.7 11.0 13.7 dB dB dB LO to RF Leakage fRF = 350MHz, fIF = 70MHz, fLO = 420MHz fRF = 900MHz, fIF = 140MHz, fLO = 760MHz fRF = 1900MHz, fIF = 140MHz, fLO = 1760MHz –65 –65 –55 dBm dBm dBm LO to IF Leakage fRF = 350MHz, fIF = 70MHz, fLO = 420MHz fRF = 900MHz, fIF = 140MHz, fLO = 760MHz fRF = 1900MHz, fIF = 140MHz, fLO = 1760MHz –56 –74 –37 dBm dBm dBm 2RF-2LO Output Spurious Product (fRF = fLO ± fIF/2) 350MHz: fRF = 385MHz at –15dBm, fLO = 420MHz 900MHZ: fRF = 830MHz at –15dBm, fLO = 760MHz 1900MHz: fRF = 1830MHz at –15dBm, fLO = 1760MHz –75 –72 –48 dBc dBc dBc 3RF-3LO Output Spurious Product (fRF = fLO ± fIF/3) 350MHz: fRF = 396.67MHz at –15dBm, fLO = 420MHz 900MHZ: fRF = 806.67MHz at –15dBm, fLO = 760MHz 1900MHz: fRF = 1806.67MHz at –15dBm, fLO = 1760MHz –65 –68 –56 dBc dBc dBc Input 1dB Compression fRF = 350MHz, fIF = 70MHz, fLO = 420MHz fRF = 900MHz, fIF = 140MHz, fLO = 760MHz fRF = 1900MHz, fIF = 140MHz, fLO = 1760MHz 5 5 1 dBm dBm dBm Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The 900MHz and 1900MHz performance is measured with the test circuit shown in Figure 1. The 350MHz performance is measured using the test circuit in Figure 2. Note 3: Specifications over the –40°C to 85°C temperature range are assured by design, characterization and correlation with statistical process controls. Note 4: Operation over a wider frequency range is possible with reduced performance. Consult the factory for information and assistance. Note 5: Turn-on and turn-off times correspond to a change in the output level by 40dB. 5526f 3 LT5526 U W TYPICAL AC PERFOR A CE CHARACTERISTICS 900MHz Application. VCC = 5V, EN = 3V, TA = 25°C, PRF = –15dB (–15dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz), fLO = fRF – 140MHz, PLO = –5dBm, IF output measured at 140MHz, unless otherwise noted. Test circuit shown in Figure 1. Conversion Gain, IIP3 and SSB NF vs RF Frequency (Low Side LO) 20 TA = 25°C fIF = 140MHz IIP3 14 12 SSB NF 10 8 6 4 2 0 GAIN –2 600 IIP3 16 SSB NF 12 10 8 6 4 2 800 1000 1200 RF FREQUENCY (MHz) 16 fLO = 760MHz 15 fIF = 140MHz fLO = 760MHz fIF = 140MHz 10 GAIN 5 GAIN –5 –50 –30 70 90 LO-IF and LO-RF Leakage vs LO Input Frequency 0 TA = 25°C –10 fIF = 140MHz 25°C 85°C –40°C –20 13 –30 12 11 –40 LO-IF –50 –60 LO-RF –70 –80 9 –6 –4 –2 –8 LO INPUT POWER (dBm) 0 –90 8 –12 2 –10 –8 –4 –2 –6 LO INPUT POWER (dBm) 2 Conversion Gain and IIP3 vs Supply Voltage 0 RF PORT –10 –5 RETURN LOSS (dB) 20 5 –10 IF PORT –15 –20 GAIN LO PORT –25 0 –20 –30 POUT –40 –50 –60 –70 –80 –90 –5 2.8 –30 3.2 4.8 3.6 4.0 4.4 SUPPLY VOLTAGE (V) 5.2 5.6 5526 G07 1500 IF Output Power and IM3 vs RF Input Power (Two Input Tones) 0 fLO = 760MHz fIF = 140MHz 25°C 85°C –40°C 1100 1300 900 LO FREQUENCY (MHz) 5526 G06 RF, LO and IF Port Return Loss vs Frequency 15 700 5526 G05 5526 G04 IIP3 0 –100 500 OUTPUT POWER (dBm/TONE) –5 –12 –10 10 30 50 –10 10 TEMPERATURE (°C) 5526 G03 10 0 25 LOW AND HIGH SIDE LO 0 LEAKAGE (dBm) 25°C 85°C –40°C 10 LOW SIDE LO 5 14 NOISE FIGURE (dB) GAIN (dB), IIP3 (dBm) 20 IIP3 HIGH SIDE LO SSB NF SSB Noise Figure vs LO Input Power 15 HIGH SIDE LO 5526 G02 Conversion Gain and IIP3 vs LO Input Power GAIN (dB), IIP3 (dBm) IIP3 15 1400 5526 G01 25 20 GAIN –2 600 1400 fIF = 140MHz LOW SIDE LO 14 0 800 1000 1200 RF FREQUENCY (MHz) 25 TA = 25°C fIF = 140MHz 18 GAIN AND NF (dB), IIP3 (dBm) GAIN AND NF (dB), IIP3 (dBm) 18 Conversion Gain, IIP3 and SSB NF vs Temperature GAIN AND NF (dB), IIP3 (dBm) 20 16 Conversion Gain, IIP3 and SSB NF vs RF Frequency (High Side LO) 0 500 1000 1500 FREQUENCY (MHz) 2000 5526 G08 –100 –20 IM3 fLO = 760MHz fIF = 140MHz 25°C 85°C –40°C –10 –15 –5 RF INPUT POWER (dBm/TONE) 0 5526 G09 5526f 4 LT5526 U W TYPICAL AC PERFOR A CE CHARACTERISTICS 900MHz Application. VCC = 5V, EN = 3V, TA = 25°C, PRF = –15dB (–15dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz), fLO = fRF – 140MHz, PLO = –5dBm, IF output measured at 140MHz, unless otherwise noted. Test circuit shown in Figure 1. IFOUT, 2 × 2 and 3 × 3 Spurs vs RF Input Power 10 0 –30 OUTPUT POWER (dBm) –20 –30 3RF-3LO fRF = 806.67MHz –40 –50 –60 –70 –80 TA = 25°C –40 fLO = 760MHz fIF = 140MHz –50 PRF = –15dBm IF OUT fRF = 900MHz –10 OUTPUT POWER (dBm) 2 × 2 and 3 × 3 Spurs vs LO Input Power 2RF-2LO fRF = 830MHz TA = 25°C fLO = 760MHz fIF = 140MHz –90 –100 –110 –20 –10 –15 –5 RF INPUT POWER (dBm) –60 –70 2RF-2LO fRF = 830MHz –80 –90 3RF-3LO fRF = 806.67MHz –100 –110 –16 0 –12 –8 0 –4 LO INPUT POWER (dBm) 5526 G10 4 5526 G11 1900MHz Application. VCC = 5V, EN = 3V, TA = 25°C, PRF = –15dB (–15dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz), fLO = fRF – 140MHz, PLO = –5dBm, IF output measured at 140MHz, unless otherwise noted. Test circuit shown in Figure 1. Conversion Gain and IIP3 vs RF Frequency 20 fLO = fRF – fIF 17 fIF = 140MHz 12 10 8 25°C 85°C –40°C 6 4 15 14 13 12 GAIN 1600 1800 2000 RF FREQUENCY (MHz) 5526 G12 1800 1600 2000 RF FREQUENCY (MHz) 18 fLO = 1760MHz 18 fIF = 140MHz fLO = 1760MHz 17 fIF = 140MHz 16 25°C 85°C –40°C 8 6 4 –50 2RF-2LO –60 fRF = 1830MHz –70 –6 –4 –8 –2 LO INPUT POWER (dBm) 0 2 5526 G15 –15 –10 –5 RF INPUT POWER (dBm) 0 5526 G14 0 TA = 25°C –10 fIF = 140MHz –20 15 14 13 –30 LO-IF –40 –50 LO-RF –60 –70 –80 11 0 TA = 25°C fLO = 1760MHz fIF = 140MHz LO-IF and LO-RF Leakage vs LO Frequency 25°C 85°C –40°C 12 GAIN –10 –40 5526 G13 LEAKAGE (dBm) IIP3 –2 –12 3RF-3LO fRF = 1806.67MHz –30 –100 –20 16 14 NOISE FIGURE (dB) GAIN (dB), IIP3 (dBm) 2200 SSB Noise Figure vs LO Input Power 20 2 –20 –90 10 1400 2200 Conversion Gain and IIP3 vs LO Input Power 10 –10 11 –2 1400 IF OUT fRF = 1900MHz 0 –80 0 12 25°C 85°C –40°C 16 NOISE FIGURE (dB) GAIN (dB), IIP3 (dBm) 16 14 2 10 18 fLO = fRF – fIF fIF = 140MHz IIP3 OUTPUT POWER (dBm) 18 IFOUT, 2 × 2 and 3 × 3 Spurs vs RF Input Power SSB Noise Figure vs RF Frequency 10 –12 –10 –90 –8 –4 –2 –6 LO INPUT POWER (dBm) 0 2 5526 G16 –100 900 1100 1300 1500 1700 1900 2100 2300 2500 LO FREQUENCY (MHz) 5526 G17 5526f 5 LT5526 U W TYPICAL AC PERFOR A CE CHARACTERISTICS 350MHz Application. VCC = 5V, EN = 3V, TA = 25°C, PRF = –15dB (–15dBm/tone for 2-tone IIP3 tests, ∆f = 1MHz), fLO = fRF + 70MHz, PLO = –5dBm, IF output measured at 70MHz, unless otherwise noted. Test circuit shown in Figure 2. Conversion Gain and IIP3 vs RF Frequency 20 SSB Noise Figure vs RF Frequency fLO = fRF + fIF 17 fIF = 70MHz IIP3 10 25°C 85°C –40°C 8 6 4 15 14 13 12 GAIN –2 200 250 300 350 400 RF FREQUENCY (MHz) 450 10 300 500 320 340 380 360 RF FREQUENCY (MHz) 20 16 18 6 4 2 GAIN 0 –2 –12 –10 –6 –4 –8 –2 LO INPUT POWER (dBm) 0 2 16 15 14 –30 –50 –60 –70 12 –80 11 –90 –10 –6 –4 –8 –2 LO INPUT POWER (dBm) LO-RF –100 150 200 250 300 350 400 450 500 550 LO FREQUENCY (MHz) 2 0 LO-IF –40 13 10 –12 0 –20 17 5526 G22 U W TYPICAL DC PERFOR A CE CHARACTERISTICS Supply Current vs Supply Voltage 5526 G23 Test circuit shown in Figure 1. Shutdown Current vs Supply Voltage 32 14 30 12 SHUTDOWN CURRENT (µA) SUPPLY CURRENT (mA) –10 –5 RF INPUT POWER (dBm) 0 TA = 25°C –10 fIF = 70MHz 25°C 85°C –40°C 5526 G21 28 26 24 22 20 18 25°C 85°C –40°C 16 14 2.8 3.2 3.6 4.0 4.4 4.8 SUPPLY VOLTAGE (V) 5.2 5.6 5526 G24 6 –15 5526 G20 LEAKAGE (dBm) NOISE FIGURE (dB) GAIN (dB), IIP3 (dBm) 25°C 85°C –40°C 8 TA = 25°C fLO = 420MHz fIF = 70MHz LO-IF and LO-RF Leakage vs LO Frequency fLO = 420MHz 19 fIF = 70MHz 10 2RF-2LO fRF = 385MHz –80 5526 G19 fLO = 420MHz 18 fIF = 70MHz IIP3 3RF-3LO fRF = 396.67MHz –60 SSB Noise Figure vs LO Input Power 20 12 –40 –120 –20 400 5526 G18 Conversion Gain and IIP3 vs LO Input Power 14 –20 –100 11 0 IF OUT fRF = 350MHz 0 OUTPUT POWER (dBm) 12 2 25°C 85°C –40°C 16 NOISE FIGURE (dB) GAIN (dB), IIP3 (dBm) 16 14 20 18 fLO = fRF + fIF fIF = 70MHz 18 IFOUT, 2 × 2 and 3 × 3 Spurs vs RF Input Power 25°C 85°C –40°C 10 8 6 4 2 0 2.8 3.2 3.6 4.0 4.4 4.8 SUPPLY VOLTAGE (V) 5.2 5.6 5526 G25 5526f LT5526 U U U PI FU CTIO S NC (Pins 1, 4, 8, 13, 16): Not Connected Internally. These pins should be grounded on the circuit board for improved LO-to-RF and LO-to-IF isolation. GND (Pins 9, 12): Ground. These pins are internally connected to the Exposed Pad for better isolation. They should be connected to ground on the circuit board, though they are not intended to replace the primary grounding through the Exposed Pad of the package. RF+, RF– (Pins 2, 3): Differential Inputs for the RF Signal. These pins must be driven with a differential signal. Each pin must also be connected to a DC ground capable of sinking 7.5mA (15mA total). This DC bias return can be accomplished through the center-tap of a balun or with shunt inductors. An impedance transformation is required to match the RF input to 50Ω (or 75Ω). IF– and IF+ (Pins 10, 11): Differential Outputs for the IF Signal. An impedance transformation may be required to match the outputs. These pins must be connected to VCC through impedance matching inductors, RF chokes or a transformer center-tap. LO–, LO+ (Pins 14, 15): Differential Inputs for the Local Oscillator Signal. The LO input is internally matched to 50Ω; however, external DC blocking capacitors are required because these pins are internally biased to approximately 1.7V DC. Either LO input can be driven with a single-ended source while connecting the unused input to ground through a DC blocking capacitor. EN (Pin 5): Enable Pin. When the input voltage is higher than 3V, the mixer circuits supplied through Pins 6, 7, 10 and 11 are enabled. When the input voltage is less than 0.3V, all circuits are disabled. Typical enable pin input current is 55µA for EN = 5V and 0.01µA when EN = 0V. VCC1 (Pin 6): Power Supply Pin for the LO Buffer Circuits. Typical current consumption is 11mA. This pin should be externally connected to the other VCC pins and decoupled with 100pF and 0.01µF capacitors. Exposed Pad (Pin 17): Circuit Ground Return for the Entire IC. This must be soldered to the printed circuit board ground plane. VCC2 (Pin 7): Power Supply Pin for the Bias Circuits. Typical current consumption is 2.5mA. This pin should be externally connected to the other VCC pins and decoupled with 100pF and 0.01µF capacitors. W BLOCK DIAGRA 17 15 14 LO+ EXPOSED PAD LO– HIGH SPEED LO BUFFER 2 3 GND LINEAR AMPLIFIER RF+ IF+ IF– RF– DOUBLEBALANCED MIXER GND 12 11 10 9 BIAS EN 5 VCC2 7 VCC1 6 5526 BD 5526f 7 LT5526 TEST CIRCUITS C6 C5 RF GND ER = 4.4 0.018" LOIN 760MHz 0.062" DC 16 T1 RFIN 900MHz 2 TL1 6 3 C1 4 1 TL2 1 17 NC NC 2 + 14 LO– LO 13 NC GND RF IF LT5526 3 4 GND NC L3 T2 C4 1 5 2 C3 L2 10 3 IFOUT 140MHz 4 9 6 7 8 VCC 5526 F01 C8 C2 REF DES GND VCC1 VCC2 NC 5 EN 12 + 11 IF – RF – EN 1900MHz INPUT MATCHING: C1: 1.5pF T1: LDB311G9010C-440 15 + 0.018" VALUE SIZE PART NUMBER REF DES VALUE SIZE PART NUMBER C1 2.7pF 0402 AVX 04025A2R7CAT L2, L3 150nH 1608 Toko LL1608-FSR15J C2 0.01µF 0402 AVX 04023C103JAT T1 1:1 1206 Murata LDB31900M05C-417 C3 1.2pF 0402 AVX 04025A1R2BAT T2 4:1 SM-22 C4, C5, C6 100pF 0402 AVX 04025A101JAT TL1, TL2 ZO = 80 L = 1.25mm 1µF 0603 Taiyo Yuden LMK107BJ105MA C8 M/A-COM ETC4-1-2 Figure 1. Test Schematic for 900MHz Application. For 1900MHz or Other Applications, Component Values Are as Indicated in Figure 1 and in Applications Section C6 C5 RF GND ER = 4.4 0.018" LOIN 420MHz 0.062" DC 16 C7 L1 RFIN 350MHz L5 1 17 NC NC 2 + RF 15 LO + 14 LO– NC GND IF LT5526 L4 3 C9 4 GND NC 12 GND L3 + 11 IF – RF – EN EN 0.018" 13 T2 C4 5 2 C3 L2 10 1 3 4 9 IFOUT 70MHz VCC1 VCC2 NC 5 6 7 8 C2 VALUE SIZE PART NUMBER C2 0.01pF 0402 AVX 04023C103JAT L1, L4 15nH 1005 Toko LL1005-FH15NJ C3 3.9pF 0402 AVX 04025A3R9BAT L2, L3 270nH 1608 Toko LL1608-FSR27J C4, C5, C6 100pF 0402 AVX 04025A101JAT L5 100nH 1005 Toko LL1005-FHR10J T2 4:1 SM-22 1µF 0603 Taiyo Yuden LMK107BJ105MA C7, C9 10pF 0402 AVX 04025A100JAT VALUE SIZE VCC REF DES C8 REF DES 5526 F02 C8 PART NUMBER M/A-COM ETC4-1-2 Figure 2. Test Schematic for 350MHz Applications 5526f 8 LT5526 U W U U APPLICATIO S I FOR ATIO The LT5526 consists of a double-balanced mixer, RF buffer amplifier, high speed limiting LO buffer and bias/enable circuits. The IC has been optimized for downconverter applications with RF input signals to 2GHz and LO signals to 2.5GHz. With proper matching, the IF output can be tuned for operation at frequencies from 0.1MHz to 1GHz. Operation over a wider input frequency range is possible, though with reduced performance. A lowpass impedance matching network is used to transform the differential input impedance at Pins 2 and 3 to the optimum value for the balun output, as illustrated in Figures 3 and 4. To assist in matching, Table 1 lists the differential input impedance and reflection coefficient at Pins 2 and 3 for several RF frequencies. The following example demonstrates how to design a lowpass impedance transformation network for the RF input. The RF, LO and IF ports are all differential, though the LO port is internally matched for single-ended drive (with external DC blocking capacitors). The LT5526 is characterized and production tested using single-ended LO drive. Low side or high side LO injection can be used. From Table 1, the differential input impedance at 900MHz is: RRF + jXRF = 31.3 + j8.41Ω. The 8.41Ω reactance is divided into two halves, with one half on each side of the 31.3Ω internal load resistor, as shown in Figure 4. The matching network consists of additional external series inductance and a capacitor (C1) in parallel with the desired source impedance (50Ω in this example). The external capacitance and inductance are calculated as follows: RF Input Port Figure 3 shows a simplified schematic of the internal RF input circuit and example external impedance matching components for a 900MHz application. Each RF input pin requires a low resistance DC return to ground capable of handling 7.5mA. The DC ground can be realized using the center-tap of an input transformer (T1), as shown, or through matching inductors or bias chokes connected from Pins 2 and 3 to ground. n = RS/RRF = 50/31.3 = 1.597 Q = √(n – 1) = 0.773 XC = RS/Q = 64.7Ω C1 = 1/(ω • XC) = 2.74pF XL = RRF • Q = 24.2Ω XEXT = XL – XRF = 15.8Ω LEXT = XEXT/ω = 2.79nH TL1 Z0 = 80Ω LNG = 1.25mm RFIN 900MHz 7.5mA 2 T1 2 1:1 6 3 1 4 LT5526 RF+ C1 2.7pF TL2 Z0 = 80Ω LNG = 1.25mm 3 T1: LDB31900M05C-417 RF– 7.5mA VBIAS 5526 F03 Figure 3. RF Input with External Matching for 900MHz Application 5526f 9 LT5526 U W U U APPLICATIO S I FOR ATIO The external inductance is split in half (1.4nH), with each half connected between the pin and C1 as shown in Figure 4. The inductance may be realized with short, high impedance printed transmission lines, as in Figure 3, which provides a compact board layout and reduced component count. A 1:1 transformer (T1 in Figure 3) converts the 50Ω differential impedance to a 50Ω singleended input. RFIN 50Ω C7 LT5526 L1 2 L5 L4 3 RF+ 1/2 XRF RF– 1/2 XRF RRF C9 5526 F05 Figure 5. Schematic of Lumped Element Input Balun LT5526 1/2 XEXT 2 RS 50Ω C1 1/2 XEXT 3 RF+ RF– 1/2 XRF 1/2 XRF RRF L1 = L 4 = RS • RRF ω C7 = C9 = 1 ω RS • RRF 5526 F04 Table 1. RF Input Differential Impedance FREQUENCY (MHz) INPUT IMPEDANCE REFLECTION COEFFICIENT MAG ANGLE 70 28.0 + j1.34 140 28.2 + j2.46 0.280 172 240 28.4 + j3.30 0.278 169 360 28.4 + j4.75 0.282 164 450 28.6 + j5.42 0.280 162 750 29.9 + j7.39 0.268 155 900 31.3 + j8.41 0.251 150 0.282 176 1500 38.3 + j17.9 0.237 112 1900 42.5 + j24.6 0.269 92.2 An alternative method of driving the RF input is to use a lumped-element balun configuration, as shown in Figure 5. This type of network may provide a more costeffective solution for narrow band applications (fractional bandwidths < 30%). The actual balun is composed of components C7, C9, L1 and L4, and their values may be estimated as follows: Where RS is the source resistance (50Ω) and RRF is the mixer input resistance from Table 1. The computed values are only approximate, as they don’t factor in the effects of XRF or the parasitics of the external components. Actual component values for several frequencies are listed in Table 2, and measured return loss vs. frequency is plotted for each example in Figure 6. 0 –5 RETURN LOSS (dB) Figure 4. RF Input Impedance Matching Topology –10 –15 –20 –25 100 300 500 700 900 FREQUENCY (MHz) 1100 1300 5526 F06 Figure 6. Input Return Loss with Lumped Element Baluns Using Values from Table 2 5526f 10 LT5526 U W U U APPLICATIO S I FOR ATIO The impact of L5 on input matching can be reduced by adding a capacitor in parallel with it. In this case, the capacitor value should be the same as C7 and C9, while L5 should have the same value as L1 and L4. Table 2. Component Values for Lumped Balun on RF Input FREQUENCY (MHz) L (nH) C (pF) L5 (nH) BANDWIDTH (MHz) 240 27 18 100 100 380 15 10 100 130 680 6.8 4.7 47 215 900 6.8 3.9 18 230 1100 3.9 2.7 15 230 LO Input Port External 100pF DC blocking capacitors provide a broadband match from about 110MHz to 2.7GHz, as shown in the plot of return loss vs frequency in Figure 8. The LO input match can be improved at lower frequencies by increasing the values of C5 and C6. 0 –5 RETURN LOSS (dB) The purpose of L5 is to provide a DC return path for Pin 3. (Another possible placement for L5 would be across Pins 2 and 3, thus using L1 as part of the DC return path.) The inductance and resonant frequency of L5 should be large enough that they don’t significantly affect the input impedance and performance of the balun. Either multilayer or wire-wound inductors may be used. –10 –15 –20 –25 –30 0 500 1000 1500 2000 FREQUENCY (MHz) 2500 5526 F08 Figure 8. Typical LO Input Return Loss with 100pF DC Blocking Capacitors Table 3. Single-Ended LO Input Impedance The LO buffer amplifier consists of high speed limiting differential amplifiers designed to drive the mixer core for high linearity. The LO+ and LO– pins are designed for singleended drive, though differential drive can be used if desired. The LO input is internally matched to 50Ω; however, external DC blocking capacitors are required because the LO pins are internally biased to approximately 1.7V DC. A simplified schematic for the LO input is shown in Figure 7. C5 100pF 14 FREQUENCY (MHz) INPUT IMPEDANCE REFLECTION COEFFICIENT MAG ANGLE 400 63.4 – j12.0 0.158 –35.8 600 61.6 – j8.38 0.128 –31.5 800 61.8 – j6.86 0.122 –26.6 1000 62.4 – j7.09 0.127 –26.1 1200 62.8 – j8.32 0.135 –28.8 1400 62.6 – j10.3 0.144 –34.0 1600 61.9 – j12.6 0.154 –40.3 1800 60.5 – j14.4 0.160 –46.2 LT5526 LO– IF Output Port VCC C6 100pF LOIN 50Ω 15 LO 50Ω + 5526 F07 Figure 7. LO Input Schematic A simplified schematic of the IF output circuit is shown in Figure 9. The output pins, IF+ and IF–, are internally connected to the collectors of the mixer switching transistors. Both pins must be biased at the supply voltage, which can be applied through the center-tap of a transformer or 5526f 11 LT5526 U W U U APPLICATIO S I FOR ATIO through impedance-matching inductors. Each IF pin draws about 7.5mA of supply current (15mA total). For optimum single-ended performance, these differential outputs must be combined externally through an IF transformer or balun. LT5526 IF+ L3 11 T2 4:1 IFOUT 575Ω 0.7pF IF– C3 VCC L2 10 VCC Figure 9. IF Output with External Matching An equivalent small-signal model for the output is shown in Figure 10. The output impedance can be modeled as a 575Ω resistor in parallel with a 0.7pF capacitor. For most applications, the bond-wire inductance (0.7nH per side) can be ignored. LT5526 RIF 574Ω IF+ L3 C3 IF– FREQUENCY (MHz) OUTPUT IMPEDANCE REFLECTION COEFFICIENT MAG ANGLE 70 575|| – j3.39k 0.840 –1.8 140 574|| – j1.67k 0.840 –3.5 240 572|| – j977 0.840 –5.9 450 561|| – j519 0.838 –11.1 750 537|| – j309 0.834 –18.6 860 525|| – j267 0.831 –21.3 1000 509|| – j229 0.829 –24.8 1250 474|| – j181 0.822 –31.3 1500 435|| – j147 0.814 –38.0 11 CIF 0.7pF 0.7nH n = RIF/RL = 574/200 = 2.87 Q = √(n – 1) = 1.368 XC = RIF/Q = 420Ω C = 1/(ω • XC) = 2.71pF C3 = C – CIF = 2.01pF XL = RL • Q = 274Ω L2 = L3 = XL/2ω = 156nH Table 4. IF Differential Impedance (Parallel Equivalent) 5526 F09 0.7nH network, along with the impedance values listed in Table 4. As an example, at an IF frequency of 140MHz and RL = 200Ω (using a 4:1 transformer for T2), L2 RL 200Ω 10 5526 F10 Figure 10. IF Output Small-Signal Model The external components, C3, L2 and L3 form an impedance transformation network to match the mixer output impedance to the input impedance of transformer T2. The values for these components can be estimated using the same equations that were used for the input matching Low Cost Output Match For low cost applications in which the required fractional bandwidth of the IF output is less than 25%, it may be possible to replace the output transformer with a lumpedelement network similar to that discussed earlier for the RF input. This circuit is shown in Figure 11, where L11, L12, C11 and C12 form a narrowband bridge balun. These element values are selected to realize a 180° phase shift at the desired IF frequency and can be estimated by using the equations below. In this case, RIF is the mixer output resistance and RL is the load resistance (50Ω). 5526f 12 LT5526 U W U U APPLICATIO S I FOR ATIO 0 R •R L11 = L12 = IF L ω 1 C11 = C12 = ω RIF • RL Inductors L13 and L14 provide a DC path between V CC and the IF+ pin. Only one of these inductors is required. Low cost multilayer chip inductors are adequate for L11, L12 and L13. If L14 is used instead of L13, a larger value is usually required, which may require the use of a wirewound inductor. Capacitor C13 is a DC block which can also be used to adjust the impedance match. Capacitor C14 is a bypass capacitor. IF+ RETURN LOSS (dB) –5 –25 100 150 IF– L13 OPT C14 VCC 5526 F11 400 TA = 25°C fRF = 1900MHz fLO = fRF – fIF PLO = –5dBm 15 GAIN (dB), IIP3 (dBm) IFOUT 50Ω 350 Figure 12. Typical Return Loss Performance with a 240MHz Narrowband Bridge IF Balun (Swept IF) 20 C11 200 250 300 FREQUENCY (MHz) 5526 F12 C13 L12 –15 –20 C12 L11 L14 OPT –10 IIP3 10 5 GAIN 0 Figure 11. Narrowband Bridge IF Balun Typical return loss of the IF output port is plotted versus frequency in Figure 12 for a 240MHz balun design. For this example, L11 = L12 = 100nH, C11 = C12 = 3.9pF, L14 = 560nH and C13 = 100pF. Performance versus IF output frequency is shown in Figure 13 in the case of a 1900MHz RF input. These results show that the usable IF bandwidth is greater than 60MHz, assuming tight tolerance matching components. Contact the factory for applications assistance with this circuit. –5 190 210 250 270 230 IF FREQUENCY (MHz) 290 5526 F13 Figure 13. Typical Gain and IIP3 Performance with a 240MHz Narrowband Bridge IF Balun (Swept IF) 5526f 13 LT5526 U TYPICAL APPLICATIO S Evaluation Board Layouts Top Layer Silkscreen Top Layer Metal 5526f 14 LT5526 U PACKAGE DESCRIPTIO UF Package 16-Lead Plastic QFN (4mm × 4mm) (Reference LTC DWG # 05-08-1692) 0.72 ±0.05 4.35 ± 0.05 2.15 ± 0.05 2.90 ± 0.05 (4 SIDES) PACKAGE OUTLINE 0.30 ±0.05 0.65 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS BOTTOM VIEW—EXPOSED PAD 4.00 ± 0.10 (4 SIDES) R = 0.115 TYP 0.75 ± 0.05 PIN 1 TOP MARK (NOTE 6) 0.55 ± 0.20 15 16 1 2.15 ± 0.10 (4-SIDES) 2 (UF) QFN 1103 0.200 REF 0.00 – 0.05 0.30 ± 0.05 0.65 BSC NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 5526f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LT5526 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS Infrastructure LT5511 High Linearity Upconverting Mixer RF Output to 3GHz, 17dBm IIP3, Integrated LO Buffer LT5512 DC-3GHz High Signal Level Downconverting Mixer DC to 3GHz, 21dBm IIP3, Integrated LO Buffer LT5514 Ultralow Distortion, IF Amplifier/ADC Driver with Digitally Controlled Gain 850MHz Bandwidth, 47dBm OIP3 at 100MHz, 10.5dB to 33dB Gain Control Range LT5515 1.5GHz to 2.5GHz Direct Conversion Quadrature Demodulator 20dBm IIP3, Integrated LO Quadrature Generator LT5516 0.8GHz to 1.5GHz Direct Conversion Quadrature Demodulator 21.5dBm IIP3, Integrated LO Quadrature Generator LT5517 40MHz to 900MHz Quadrature Demodulator 21dBm IIP3, Integrated LO Quadrature Generator LT5519 0.7GHz to 1.4GHz High Linearity Upconverting Mixer 17.1dBm IIP3 at 1GHz, Integrated RF Output Transformer with 50Ω Matching, Single-Ended LO and RF Ports Operation LT5520 1.3GHz to 2.3GHz High Linearity Upconverting Mixer 15.9dBm IIP3 at 1.9GHz, Integrated RF Output Transformer with 50Ω Matching, Single-Ended LO and RF Ports Operation LT5521 3.7GHz Very High Linearity Mixer 24.2dBm IIP3 at 1.95GHz, 12.5dB SSBNF, –42dBm LO Leakage, Supply Voltage = 3.15V to 5.25V LT5522 600MHz to 2.7GHz High Signal Level Downconverting Mixer 4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz, NF = 12.5dB, 50Ω Single-Ended RF and LO Ports RF Power Detectors LT5504 800MHz to 2.7GHz RF Measuring Receiver 80dB Dynamic Range, Temperature Compensated, 2.7V to 5.25V Supply LTC®5505 RF Power Detectors with >40dB Dynamic Range 300MHz to 3GHz, Temperature Compensated, 2.7V to 6V Supply LTC5507 100kHz to 1000MHz RF Power Detector 100kHz to 1GHz, Temperature Compensated, 2.7V to 6V Supply LTC5508 300MHz to 7GHz RF Power Detector 44dB Dynamic Range, Temperature Compensated, SC70 Package LTC5509 300MHz to 3GHz RF Power Detector 36dB Dynamic Range, Low Power Consumption, SC70 Package LTC5530 300MHz to 7GHz Precision RF Power Detector Precision VOUT Offset Control, Shutdown, Adjustable Gain LTC5531 300MHz to 7GHz Precision RF Power Detector Precision VOUT Offset Control, Shutdown, Adjustable Offset LTC5532 300MHz to 7GHz Precision RF Power Detector Precision VOUT Offset Control, Adjustable Gain and Offset LT5534 50MHz to 3GHz RF Power Detector with 60dB Dynamic Range ±1dB Output Variation over Temperature, 38ns Response Time Low Voltage RF Building Blocks LT5500 1.8GHz to 2.7GHz Receiver Front End 1.8V to 5.25V Supply, Dual-Gain LNA, Mixer, LO Buffer LT5502 400MHz Quadrature IF Demodulator with RSSI 1.8V to 5.25V Supply, 70MHz to 400MHz IF, 84dB Limiting Gain, 90dB RSSI Range LT5503 1.2GHz to 2.7GHz Direct IQ Modulator and Upconverting Mixer 1.8V to 5.25V Supply, Four-Step RF Power Control, 120MHz Modulation Bandwidth LT5506 500MHz Quadrature IF Demodulator with VGA 1.8V to 5.25V Supply, 40MHz to 500MHz IF, –4dB to 57dB Linear Power Gain, 8.8MHz Baseband Bandwidth LT5546 500MHz Ouadrature IF Demodulator with VGA and 17MHz Baseband Bandwidth 17MHz Baseband Bandwidth, 40MHz to 500MHz IF, 1.8V to 5.25V Supply, –7dB to 56dB Linear Power Gain Wide Bandwidth ADCs LT1749 12-Bit, 80Msps 500MHz BW S/H, 71.8dB SNR, 87dB SFDR LT1750 14-Bit, 80Msps 500MHz BW S/H, 75.5dB SNR, 90dB SFDR, 2.25VP-P or 1.35VP-P Input Ranges 5526f 16 Linear Technology Corporation LT/TP 0704 1K • PRINTED IN THE USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2004