SII S-25C040A01

Rev.1.0_00
S-25C010A/020A/040A
CMOS SPI SERIAL E2PROM
The S-25C010A/020A/040A is SPI serial E2PROM which operate
at high speed, with low current consumption and the wide range
operation. The S-25C010A/020A/040A respectively has the
capacity of 1K-bit, 2K-bit, 4K-bit and the organization of 128
words × 8-bit, 256 words × 8-bit, 512 words × 8-bit. These ICs are
able to Page Write and sequential read.
„ Features
• Wide range operation Read
：1.6 to 5.5 V (at −40 to +85°C)
Write
：1.7 to 5.5 V (at −40 to +85°C)
• Operation frequency 5.0 MHz (2.5 to 5.5 V), 2.0 MHz (1.6 to 5.5 V)
• SPI mode (0, 0) and (1, 1)
• Page Write:
16 bytes / page
• Sequential read
• Write protect:
Software, Hardware
Protect area:
25%, 50%, 100%
• Monitors Write to the memory by a status register
• Write protect function during the low power supply
• CMOS schmitt input（ CS , SCK, SI, WP , HOLD ）
• Endurance:
106cycles/word*1 (at +25°C),
*1. For each address (Word: 8-bit)
• Data retention:
100 years (at +25°C)
• Memory capacitance: S-25C010A 1K-bit
S-25C020A 2K-bit
S-25C040A 4K-bit
• Data before shipment: Memory array FFh, BP1 = 0, BP0 = 0
• Lead-free product
„ Packages
Package name
8-Pin SOP (JEDEC)
8-Pin TSSOP
SNT-8A
Drawing code
Package
Tape
Reel
Land
FJ008-A
FT008-A
PH008-A
FJ008-D
FT008-E
PH008-A
FJ008-D
FT008-E
PH008-A
−
−
PH008-A
Caution This product is intended to use in general electronic devices such as consumer electronics, office
equipment, and communications devices. Before using the product in medical equipment or
automobile equipment including car audio, keyless entry and engine control unit, contact to SII is
indispensable.
Seiko Instruments Inc.
1
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
„ Pin Configurations
8-Pin SOP (JEDEC)
Top view
Table 1
Pin No.
Symbol
CS
1
8
VCC
1
CS *1
Chip select input
SO
2
7
HOLD
2
SO
Serial data output
3
WP
3
6
SCK
GND
4
5
SI
Figure 1
*1
4
5
6
WP
GND
SI*1
SCK*1
7
HOLD *1
Description
Write protect input
Ground
Serial data input
Serial clock input
Hold input
8
VCC
Power supply
*1. All input pins have the CMOS structure. Do not set the input pins in
high impedance during operation.
S-25C010A0I-J8T1G
S-25C020A0I-J8T1G
S-25C040A0I-J8T1G
Remark See Dimensions for details of the package drawings.
8-Pin TSSOP
Top view
Table 2
Pin No.
1
2
3
4
CS
SO
WP
GND
8
7
6
5
Symbol
VCC
1
HOLD
SCK
SI
2
SO
3
4
5
6
WP
GND
SI*1
SCK*1
7
HOLD *1
Figure 2
S-25C010A0I-T8T1G
S-25C020A0I-T8T1G
S-25C040A0I-T8T1G
CS
*1
Description
Chip select input
Serial data output
*1
Write protect input
Ground
Serial data input
Serial clock input
Hold input
8
VCC
Power supply
*1. All input pins have the CMOS structure. Do not set the input pins in
high impedance during operation.
Remark See Dimensions for details of the package drawings.
SNT-8A
Top view
Table 3
Pin No.
CS
SO
WP
GND
1
2
8
7
3
4
6
5
Figure 3
S-25C010A0I-I8T1G
S-25C020A0I-I8T1G
S-25C040A0I-I8T1G
Symbol
VCC
1
HOLD
SCK
2
SO
3
SI
4
5
6
WP
GND
SI*1
SCK*1
7
HOLD *1
8
VCC
CS
*1
Description
Chip select input
Serial data output
*1
Write protect input
Ground
Serial data input
Serial clock input
Hold input
Power supply
*1. All input pins have the CMOS structure. Do not set the input pins in
high impedance during operation.
Remark See Dimensions for details of the package drawings.
2
Seiko Instruments Inc.
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
„ Block Diagram
Step-up Circuit
Voltage Detector
SI
HOLD
WP
Clock Counter
Mode
Decoder
Data Register
Address Register
Output
Control
Circuit
SO
Status Register
X Decoder
Input Control Circuit
CS
SCK
Page Latch
Memory
Cell
Array
Status
Memory Cell Array
Y Decoder
Read Circuit
VCC
GND
Figure 4
Seiko Instruments Inc.
3
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
„ Absolute Maximum Ratings
Table 4
Item
Power supply voltage
Input voltage
Output voltage
Operation ambient temperature
Storage temperature
Absolute Maximum Rating
−0.3 to +7.0
−0.3 to +7.0
−0.3 to VCC + 0.3
−40 to +85
−65 to +150
Symbol
VCC
VIN
VOUT
Topr
Tstg
Unit
V
V
V
°C
°C
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
„ Recommended Operating Conditions
Table 5
Item
Symbol
Power supply voltage
VCC
High level input voltage
Low level input voltage
VIH
VIL
Condition
Read Operation
Write Operation
VCC = 1.6 to 5.5 V
VCC = 1.6 to 5.5 V
Min.
1.6
1.7
0.7 × VCC
−0.3
Max.
5.5
5.5
VCC + 1.0
0.3 × VCC
Unit
V
V
V
V
„ Pin Capacitance
Table 6
Item
Input capacitance
Output capacitance
Symbol
(Ta = 25 °C, f = 1.0 MHz, VCC = 5 V)
Min.
Max.
Unit
Condition
CIN
VIN = 0 V ( CS , SCK, SI, WP , HOLD )
−
8
pF
COUT
VOUT = 0 V (SO)
−
10
pF
„ Endurance
Table 7
Item
Symbol
Operation Ambient Temperature
Endurance
NW
+25°C
*1. For each address (Word: 8 bits)
Min.
106
Max.
−
Unit
cycles / word*1
Min.
100
Max.
−
Unit
year
„ Data Retention
Table 8
Item
Data retention
4
Symbol
−
Operation Ambient Temperature
+25°C
Seiko Instruments Inc.
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
„ DC Electrical Characteristics
Table 9
Item
Current consumption (READ)
Symbol
Condition
ICC1
No load at
SO pin
VCC = 1.6 to 2.5 V
fSCK = 2.0 MHz
Min.
Max.
−
1.5
VCC = 2.5 to 4.5 V
fSCK = 5.0 MHz
Min.
Max.
−
2.0
VCC = 4.5 to 5.5 V
fSCK = 5.0 MHz
Min.
Max.
−
2.5
Unit
mA
Table 10
Item
Current consumption (WRITE)
Symbol
Condition
ICC2
No load at
SO pin
VCC = 1.7 to 2.5 V
fSCK = 2.0 MHz
Min.
Max.
−
2.0
VCC = 2.5 to 4.5 V
fSCK = 5.0 MHz
Min.
Max.
−
2.5
VCC = 4.5 to 5.5 V
fSCK = 5.0 MHz
Min.
Max.
−
3.0
Unit
mA
Table 11
Item
Standby current
consumption
Input leakage current
Output leakage current
Low level
output voltage
High level
output voltage
Symbol
ISB
ILI
ILO
VOL1
VOL2
VOH1
VOL2
Condition
VCC=1.6 to 2.5 V
VCC=2.5 to 4.5 V
Min.
Max.
Min.
Max.
Min.
Max.
1.5
−
1.5
−
1.5
µA
1.0
1.0
−
0.4
−
−
−
−
−
−
0.8 × VCC
0.8 × VCC
1.0
1.0
0.4
0.4
−
−
−
−
−
−
0.8 × VCC
0.8 × VCC
1.0
1.0
0.4
0.4
−
−
µA
µA
V
V
V
V
CS = Vcc,
SO = Open
−
Other inputs are
VCC or GND
VIN = GND to VCC
−
VOUT = GND to VCC
−
IOL = 2.0 mA
−
IOL = 1.5 mA
−
IOH = −2.0 mA
−
IOH = −0.4 mA
0.8 × VCC
Seiko Instruments Inc.
VCC=4.5 to 5.5 V
Unit
5
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
„ AC Electrical Characteristics
Table 12 Measurement Conditions
0.2 × VCC to 0.8 × VCC
0.5 × VCC
100 pF
Input pulse voltage
Output reference voltage
Output load
Item
SCK clock frequency
CS setup time during CS falling
CS setup time during CS rising
CS deselect time
CS hold time during CS falling
CS hold time during CS rising
SCK clock time “H” *1
SCK clock time “L” *1
Rising time of SCK clock *2
Falling time of SCK clock *2
SI data input setup time
SI data input hold time
SCK “L” hold time
during HOLD rising
SCL “L” hold time
during HOLD falling
SCK “H” setup time
during HOLD falling
SCK “H” setup time
during HOLD rising
Disable time of SO output *2
Delay time of SO output
Hold time of SO output
Rising time of SO output *2
Falling time of SO output *2
Disable time of SO output
during HOLD falling *2
Delay time of SO output
during HOLD rising *2
WP setup time
WP hold time
WP release / setup time
WP release / hold time
Symbol
Table 13
VCC = 1.6 to 2.5 V
VCC = 2.5 to 4.5 V
VCC = 4.5 to 5.5 V
Unit
Min.
Max.
Min.
Max.
Min.
Max.
fSCK
tCSS.CL
tCSS.CH
tCDS
tCSH.CL
tCSH.CH
tHIGH
tLOW
tRSK
tFSK
tDS
tDH
−
150
150
200
200
150
200
200
−
−
50
60
2.0
−
−
−
−
−
−
−
1
1
−
−
−
90
90
90
90
90
90
90
−
−
20
30
5.0
−
−
−
−
−
−
−
1
1
−
−
−
90
90
90
90
90
90
90
−
−
20
30
5.0
−
−
−
−
−
−
−
1
1
−
−
MHz
ns
ns
ns
ns
ns
ns
ns
µs
µs
ns
ns
tSKH.HH
150
−
70
−
70
−
ns
tSKH.HL
100
−
40
−
40
−
ns
tSKS.HL
150
−
60
−
60
−
ns
tSKS.HH
150
−
60
−
60
−
ns
tOZ
tOD
tOH
tRO
tFO
−
−
0
−
−
200
150
−
100
100
−
−
0
−
−
100
70
−
40
40
−
−
0
−
−
100
70
−
40
40
ns
ns
ns
ns
ns
tOZ.HL
−
200
−
100
−
100
ns
tOD.HH
−
150
−
50
−
50
ns
tWS1
tWH1
tWS2
tWH2
0
0
0
60
−
−
−
−
0
0
0
30
−
−
−
−
0
0
0
30
−
−
−
−
ns
ns
ns
ns
*1. The clock cycle of the SCK clock (frequency fSCK) is 1/fSCK µs. This clock cycle is determined by a combination of several
AC characteristics. Note that the clock cycle cannot be set as (1/fSCK) = tLOW (Min.) + tHIGH (Min.) by minimizing the SCK
clock cycle time.
*2. These are values of sample and not 100% tested.
6
Seiko Instruments Inc.
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
Table 14
Item
Write time
Symbol
tPR
VCC = 1.7 to 5.5 V
Min.
Max.
−
4.0
Unit
ms
tCDS
CS
tCSH.CL
tCSS.CH
tCSH.CH
tCSS.CL
SCK
tDS
SI
SO
tDH
tRSK
MSB IN
tFSK
LSB IN
High-Z
Figure 5 Serial input timing
CS
tSKS.HL
tSKH.HL
tSKH.HH
SCK
tSKS.HH
SI
tOZ.HL
tOD.HH
SO
HOLD
Figure 6 Hold timing
Seiko Instruments Inc.
7
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
tSCK
CS
tOZ
tHIGH
SCK
tLOW
ADDR
SI LSB IN
tOD
tOH
tOD
tOH
SO
LSB OUT
tRO
tFO
Figure 7 Serial output timing
tWS1
tWH1
CS
WP
Figure 8 Valid timing in Write protect
tWS2
tWH2
CS
WP
Figure 9 Invalid timing in Write protect
8
Seiko Instruments Inc.
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
„ Pin Functions
1. CS (Chip select input ) Pin
This is an input pin to set a chip in the select status. In the “H” input level, the device is in the non-select status and its
output is high impedance. The device is in standby as long as it is not in Write inside. The device goes in active by
setting the chip select to “L”. Input any instruction code after power-on and a falling of chip select.
2. SI (Serial data input ) pin
This pin is to input serial data. This pin receives an instruction code, an address and Write data. This pin latches data at
rising edge of serial clock.
3. SO (Serial data output ) pin
This pin is to output serial data. The data output changes at falling edge of serial clock.
4. SCK (Serial clock input ) pin
This is a clock input pin to set the timing of serial data. An instruction code, an address and Write data are received at a
rising edge of clock. Data is output at falling edge of clock.
5. WP (Write protect input ) pin
This is an input pin to protect memory data when Write instruction (WRITE, WRSR) is being input. By setting this pin to
“L”, the WEL bit in the status register is set to “L”. Therefore S-25C010A/020A/040A does not Write to the E2PROM,
however, it accepts other instructions. Fix this pin “H” or “L” not to set it in the floating state.
Refer to “„ Protect Operation” for details.
6. HOLD (HOLD input ) pin
This pin is used to pause serial communications without setting the device in the non-select status.
In the hold status, the serial output goes in high impedance, the serial input and the serial clock go in “Don’t care”.
During the hold operation, be sure to set the device in active by setting the chip select ( CS pin) to “L”.
Refer to “„ Hold Operation” for details.
Seiko Instruments Inc.
9
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
„ Instruction Setting
Table 15 and 16 are the lists of instruction for the S-25C010A/020A/040A. The instruction is able to be input by changing
the CS pin “H” to “L”. Input the instruction in the MSB first. Each instruction code is organized with 1-byte as shown
below.
If the S-25C010A/020A/040A receives any invalid instruction code, the device goes in the non-select status.
1. S-25C010A020A
Table 15
Instruction
Operation
Instruction code
Address
Data
SCK input clock
1 to 8
0000 X110
0000 X100
0000 X101
0000 X001
0000 X011
0000 X010
SCK input clock
9 to 16
−
−
b7 to b0 output *1
b7 to b0 input
A7*2 to A0
A7*2 to A0
SCK input clock
17 to 24
−
−
−
−
D7 to D0 output *3
D7 to D0 input
Address
SCK input clock
9 to 16
−
−
b7 to b0 output *1
b7 to b0 input
A7 to A0
A7 to A0
Data
SCK input clock
17 to 24
−
−
−
−
D7 to D0 output *3
D7 to D0 input
WREN
Write enable
WRDI
Write disable
RDSR
Read the status register
WRSR
Write in the status register
READ
Read memory data
WRITE
Write memory data
*1. Sequential data reading is possible.
*2. In the S-25C010A, A7 = Don’t care because the address range is A6 to A0.
*3. After outputting data in the specified address, data in the following address is output.
Remark X = Don’t care.
2. S-25C040A
Table 16
Instruction
Operation
Instruction code
SCK input clock
1 to 8
0000 X110
0000 X100
0000 X101
0000 X001
0000 [A8*2] 011
0000 [A8*2] 010
WREN
Write enable
WRDI
Write disable
RDSR
Read the status register
WRSR
Write in the status register
READ
Read memory data
WRITE
Write memory data
*1. Sequential data reading is possible.
*2. In the S-25C040A, assign bit A8 in the address into the fifth bit in an instruction code.
*3. After outputting data in the specified address, data in the following address is output.
Remark X = Don’t care.
10
Seiko Instruments Inc.
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
„ Operation
1. Status register
The status register’s organization is below. The status register can Write and Read by a specific instruction.
b7
b6
b5
b4
b3
b2
b1
b0
1
1
1
1
BP1
BP0
WEL
WIP
Block Protect Bits
Write Enable Latch
Write In Progress
Figure 10 Organization of status register
The status/control bits of the status register are as follows.
1. 1 BP1, BP0 (b3, b2) : Block Protect
Bit BP1 and BP0 are composed of the nonvolatile bit. The area size of Software Protect against WRITE instruction is
defined by them. Rewriting these bits is possible by the WRSR instruction. To protect the memory area against the
WRITE instruction, set either or both of bit BP1 and BP0 to “1”. Rewriting bit BP1 and BP0 is possible unless they are
in Hardware Protect mode ( WP pin is “L”). Refer to “„ Protect Operation” for details of “Block Protect”.
1. 2 WEL (b1) : Write Enable Latch
Bit WEL shows the status of internal Write Enable Latch. Bit WEL is set by the WREN instruction only. If bit WEL is
“1”, this is the status that Write Enable Latch is set. If bit WEL is “0”, Write Enable Latch is in reset, so that the S25C010A/020A/040A does not receive the WRITE or WRSR instruction. Bit WEL is reset after these operations;
•
•
•
•
•
the power supply voltage is dropping
power-on
after performing WRDI
after the Write operation by the WRSR instruction has completed
after the Write operation by the WRITE instruction has completed
•
after setting the WP pin to “L”
1. 3 WIP (b0) : Write In Progress
Bit WIP is Read Only and shows whether the internal memory is in the Write operation or not by the WRITE or WRSR
instruction. Bit WIP is “1” during the Write operation but “0” during any other status.
Seiko Instruments Inc.
11
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
2. Write enable (WREN)
Before writing data (WRITE and WRSR), be sure to set bit Write Enable Latch (WEL). This instruction is to set bit WEL.
Its operation is below.
After selecting the device by the chip select ( CS ), input the instruction code from serial data input (SI). To set bit WEL,
set the device in the non-select status by CS at the 8th clock of the serial clock (SCK). To cancel the WREN instruction,
input the clock different from a specified value (n = 8 clock) while CS is in “L”.
CS
WP
SCK
High / Low
1
2
3
4
5
Instruction
SI
SO
X
High-Z
Remark X = Don’t care.
Figure 11 WREN operation
12
Seiko Instruments Inc.
6
7
8
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
3. Write disable (WRDI)
The WRDI instruction is one of ways to reset bit Write Enable Latch (WEL). After selecting the device by the chip select
( CS ), input the instruction code from serial data input (SI).
To reset bit WEL, set the device in the non-select status by CS at the 8th clock of the serial clock. To cancel the WRDI
instruction, input the clock different from a specified value (n = 8 clock) while CS is in “L”.
Bit WEL is reset after the operations shown below.
•
•
•
•
•
The power supply voltage is dropping
Power on
After performing WRDI
After the completion of Write operation by the WRSR instruction
After the completion of Write operation by the WRITE instruction
• After setting the WP pin to “L”
CS
WP
SCK
High / Low
1
2
3
4
5
6
7
8
Instruction
SI
SO
X
High-Z
Remark X = Don’t care.
Figure 12 WRDI operation
Seiko Instruments Inc.
13
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
4. Read the status register (RDSR)
Reading data in the status register is possible by the RDSR instruction. During the Write operation, it is possible to
confirm the progress by checking bit WIP.
Set the chip select ( CS ) “L” first. After that, input the instruction code from serial data input (SI). The status of bit in the
status register is output from serial data output (SO). Sequential Read is available for the status register. To stop the
Read cycle, set CS to “H”.
It is possible to read the status register always. The bits in it are valid and can be read by RDSR even in the Write cycle.
However, during the Write cycle in progress, the nonvolatile bits BP1, BP0 are fixed in a certain value. These updated
values of bit can be obtained by inputting another new RDSR instruction after the Write cycle has completed. Contrarily,
two of Read Only bits WEL and WIP are being updated while the Write cycle is in progress.
b7, b6, b5, b4 are “1” when they are read by the RDSR instruction.
CS
WP
SCK
High / Low
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Instruction
SI
X
Outputs Data in the Status Register
SO
High-Z
b7
b6
Remark X = Don’t care.
Figure 13 RDSR operation
14
Seiko Instruments Inc.
b5
b4
b3
b2
b1
b0
b7
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
5. Write in the status register (WRSR)
The values of status register (BP1, BP0) can be rewritten by inputting the WRSR instruction. But b7, b6, b5, b4, b1, b0 of
status register cannot be rewritten. b7 to b4 are always “1” when reading the status register.
Before inputting the WRSR instruction, set bit WEL by the WREN instruction. The operation of WRSR is shown below.
Set the chip select ( CS ) “L” first. After that, input the instruction code and data from serial data input (SI). To start
WRSR Write (tPR), set the chip select ( CS ) to “H” after inputting data or before inputting a rising of the next serial clock.
It is possible to confirm the operation status by reading the value of bit WIP during WRSR Write. Bit WIP is “1” during
Write, “0” during any other status. Bit WEL is reset when Write is completed.
With the WRSR instruction, the values of BP1 and BP0; which determine the area size the users can handle as the Read
Only memory; can be changed. But if the signal WP is in “L”, S-25C010A/020A/040A does not send the WRSR
instruction (Refer to “„ Protect Operation”).
Bit BP1, BP0 keep the value which is the one prior to the WRSR instruction during the WRSR instruction. The newly
updated value is changed when the WRSR instruction has completed.
To cancel the WRSR instruction, input the clock different from a specified value (n = 16clock) while CS is in “L”.
CS
WP
SCK
High / Low
1
2
3
4
5
6
7
8
9
Instruction
SI
SO
X
10
11
12
13
14
15
16
Inputs Data in the Status Register
b7
b6
b5
b4
b3
b2
b1
b0
High-Z
Remark X = Don’t care.
Figure 14 WRSR operation
Seiko Instruments Inc.
15
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
6. Read memory data (READ)
The Read operation is shown below. Input the instruction code and the address from serial data input (SI) after inputting
“L” to the chip select ( CS ). The input address is loaded to the internal address counter, and data in the address is output
from the serial data output (SO).
Next, by inputting the serial clock (SCK) keeping the chip select ( CS ) in “L”, the address is automatically incremented so
that data in the following address is sequentially output. The address counter rolls over to the first address by increment
in the last address.
To finish the Read cycle, set CS to “H”. It is possible to raise the chip select always during the cycle. During Write, the
read instruction code is not be accepted or operated.
CS
WP
SCK
High / Low
1
2
3
4
5
6
7
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
8-bit Address
Instruction
SI
8
A7*1 A6 A5 A4 A3 A2 A1 A0
X
Outputs the First Byte
SO
High-Z
D7
*1 In the S-25C010A, A7 = Don’t care because the address range is A6 to A0.
Remark X = Don’t care.
Figure 15 READ operation (S-25C010A/020A)
16
Seiko Instruments Inc.
D6 D5 D4 D3 D2 D1 D0
Outputs
the Second
D7
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
CS
WP
SCK
High / Low
1
2
3
4
5
6
Instruction
SI
A8*1
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
8-bit Address
A7 A6 A5 A4 A3 A2 A1 A0
Outputs the First Byte
SO
High-Z
D7
D6 D5 D4 D3 D2 D1 D0
Outputs
the Second
D7
*1 In the S-25C040A, assign bit A8 in the address into the fifth bit in an instruction code.
Figure 16 READ operation (S-25C040A)
Seiko Instruments Inc.
17
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
7. Write memory data (WRITE)
Figure 17 and 18 show the timing chart when inputting 1-byte data. Input the instruction code, the address and data
from serial data input (SI) after inputting “L” to the chip select ( CS ). To start Write (tPR), set the chip select ( CS ) to “H”
after inputting data or before inputting a rising of the next serial clock. Bit WIP is reset to “0” when Write has completed.
The S-25C010A/020A/040A can Page Write of 16 bytes. Its function to transmit data is as same as Byte Write basically,
but it operates Page Write by receiving sequential 8-bit Write data as much data as page size has. Input the instruction
code, the address and data from serial data input (SI) after inputting “L” in CS , as the WRITE operation (page) shown in
Figure 19 and 20. Input the next data while keeping CS in “L”. After that, repeat inputting data of 8-bit sequentially. At
the end, by setting CS to “H”, the WRITE operation starts (tPR).
5 of the lower bits in the address are automatically incremented every time when receiving Write data of 8-bit. Thus,
even if Write data exceeds 16 bytes, the higher bits in the address do not change. And 4 of lower bits in the address roll
over so that Write data which is previously input is overwritten.
These are cases when the WRITE instruction is not accepted or operated.
• Bit WEL is not set to “1” (not set to “1” beforehand immediately before the WRITE instruction)
• During Write
• The address to be written is in the protect area by BP1 and BP0.
• The signal WP is in “L”.
To cancel the WRITE instruction, input the clock different from a specified value (n = 16+m × 8clock) while CS is in “L”.
18
Seiko Instruments Inc.
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
CS
WP
SCK
High
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
21
22
23
24
Data Byte 1
8-bit Address
Instruction
A7*1 A6 A5 A4 A3 A2 A1 A0 A7 A6 A5 A4 A3 A2 A1 A0
X
SI
11
High-Z
SO
*1 In the S-25C010A, A7 = Don’t care because the address range is A6 to A0.
Remark X = Don’t care.
Figure 17 WRITE operation (1-byte) (S-25C010A/020A)
CS
WP
SCK
High
1
2
3
4
5
6
SO
8
9
10
11
12
13
14
15
16
17
18
8-bit Address
Instruction
SI
7
A8*1
19
20
21
22
23
24
Data Byte 1
A7 A6 A5 A4 A3 A2 A1 A0 A7 A6 A5 A4 A3 A2 A1 A0
High-Z
*1 In the S-25C040A, assign bit A8 in the address into the fifth bit in an instruction code.
Figure 18 WRITE operation (1-byte ) (S-25C040A)
Seiko Instruments Inc.
19
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
CS
WP
High
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
SCK
A7*1 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
X
SI
Data Byte (n)
8-bit Address
Instruction
Data Byte (n + x)
D4 D3 D2 D1 D0
High-Z
SO
*1 In the S-25C010A, A7 = Don’t care because the address range is A6 to A0.
Remark X = Don’t care.
Figure19
WRITE operation (page) (S-25C010A/020A)
CS
WP
High
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
SCK
SI
A8*1
Data Byte (n)
8-bit Address
Instruction
A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
High-Z
SO
*1 In the S-25C040A, assign bit A8 in the address into the fifth bit in an instruction code.
Figure20
20
WRITE operation (page) (S-25C040A)
Seiko Instruments Inc.
Data Byte (n + x)
D4 D3 D2 D1 D0
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
„ Protect Operation
Table 17 shows the block settings of Write protect. Setting value in Protect Bit (BP1, BP0) in the status register protects
data in the area of all/50%/25% of the memory address.
Setting signal WP to “L” provides the following settings.
• Write protect for the WRITE, WRSR instructions
• Reset bit WEL
Figure 8 and 9 show the Valid timing in Write protect and Invalid timing in Write protect.
Table 17 The block settings of Write protect
Status register
BP1
BP0
0
0
0
1
1
0
1
1
The area of Write protect
0%
25 %
50 %
100 %
Address of Write protect block
S-25C040A
S-25C020A
S-25C010A
None
None
None
180h to 1FFh
100h to 1FFh
000h to 1FFh
Seiko Instruments Inc.
C0h to FFh
80h to FFh
00h to FFh
60h to 7Fh
40h to 7Fh
00h to 7Fh
21
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
„ Hold Operation
The hold operation is used to pause serial communications without setting the device in the non-select status. In the hold
status, the serial data output goes in high impedance, and both of the serial data input and the serial clock go in “Don’t
care”. Be sure to set the chip select ( CS ) to “L” to set the device in the select status during the hold status.
Generally, during the hold status, the device holds the select status. But if setting the device in the non-select status, the
users can finish the operation even in progress.
Figure 21 shows the hold operation. Set Hold ( HOLD ) to “L” when the serial clock (SCK) is in “L”, Hold ( HOLD ) is
switched at the same time the hold status starts. If setting Hold ( HOLD ) to “H”, Hold ( HOLD ) is switched at the same
time the hold status ends.
Set Hold ( HOLD ) to “L” when the serial clock (SCK) is in “H”; the hold status starts when the serial clock goes in “L” after
Hold ( HOLD ) is switched. If setting Hold ( HOLD ) to “H”, the hold status ends when the serial clock goes in “L” after
Hold ( HOLD ) is switched.
Hold status
Hold status
SCK
HOLD
Figure 21 Hold operation
22
Seiko Instruments Inc.
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
„ Write Protect Function during the Low Power Supply Voltage
The S-25C010A/020A/040A has a built-in detection circuit which operates with the low power supply voltage. The S25C010A/020A/040A cancels the Write operation (WRITE, WRSR) when the power supply voltage drops and power-on,
at the same time, goes in the Write protect status (WRDI) automatically to reset bit WEL. Its detection and release
voltages are 1.20 V Typ. (Refer to Figure 22).
To operate Write, after the power supply voltage dropped once but rose to the voltage level which allows Write again, be
sure to set the Write Enable Latch bit (WEL) before operating Write (WRITE, WRSR).
In the Write operation, data in the address written during the low power supply voltage is not assured.
Power supply voltage
Detection voltage (−VDET)
1.20 V Typ.
Release voltage (+VDET)
1.20 V Typ.
Cancel the Write instruction
Set in Write protect (WRDI) automatically
Figure 22 Operation during low power supply voltage
„ I/O Pin
1. Connection of input pin
All input pins in S-25C010A/020A/040A have the CMOS structure. Do not set these pins in high impedance during
operation when you design. Especially, set the CS input in the non-select status “H” during power-on/off and standby.
The error Write does not occur as long as the CS pin is in the non-select status “H”. Set the CS pin to VCC via a resistor
(the pull-up resistor of 10 to 100 kΩ).
To prevent the error for sure, it is recommended to set other input pins than the CS pin via a pull-up resistor.
2. Equivalent circuit of I/O pin
Figure 23 and 24 show the equivalent circuits of input pins in S-25C010A/020A/040A. A pull-up and pull-down elements
are not included in each input pin, pay attention not to set it in the floating state when you design.
Figure 25 shows the equivalent circuit of the output pin. This pin has the tri-state output of “H” level/“L” level/High-Z.
Seiko Instruments Inc.
23
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
2. 1 Input pin
CS, SCK
Figure 23 CS , SCK Pin
SI, WP, HOLD
Figure 24 SI, WP , HOLD Pin
2. 2 Output pin
VCC
SO
Figure 25 SO Pin
3. Precaution for use
Absolute maximum ratings: Do not operate these ICs in excess of the absolute maximum ratings (as listed on the data
sheet). Exceeding the supply voltage rating can cause latch-up.
Operations with moisture on the E2PROM pins may occur malfunction by short-circuit between pins. Especially, in
occasions like picking the E2PROM up from low temperature tank during the evaluation. Be sure that not remain frost on
the E2PROM pin to prevent malfunction by short-circuit.
Also attention should be paid in using on environment, which is easy to dew for the same reason.
24
Seiko Instruments Inc.
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
„ Precautions
● Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
● SII claims no responsibility for any and all disputes arising out of or in connection with any infringement of the products
including this IC upon patents owned by a third party.
Seiko Instruments Inc.
25
CMOS SPI SERIAL E2PROM
S-25C010A/020A/040A
Rev.1.0_00
„ Product Name Structure
S-25Cxxxx
0I
−
xxxx
G
Package name (abbreviation) and IC packing specification
I8T1: SNT-8A, Tape
J8T1: 8-Pin SOP (JEDEC) , Tape
T8T1: 8-Pin TSSOP, Tape
Fixed
Product name
S-25C010A : 1K-bit
S-25C020A : 2K-bit
S-25C040A : 4K-bit
26
Seiko Instruments Inc.
5.02±0.2
8
5
1
4
1.27
0.20±0.05
0.4±0.05
No. FJ008-A-P-SD-2.1
TITLE
No.
SOP8J-D-PKG Dimensions
FJ008-A-P-SD-2.1
SCALE
UNIT
mm
Seiko Instruments Inc.
4.0±0.1(10 pitches:40.0±0.2)
2.0±0.05
ø1.55±0.05
0.3±0.05
ø2.0±0.05
8.0±0.1
2.1±0.1
5°max.
6.7±0.1
1
8
4
5
Feed direction
No. FJ008-D-C-SD-1.1
TITLE
SOP8J-D-Carrier Tape
No.
FJ008-D-C-SD-1.1
SCALE
UNIT
mm
Seiko Instruments Inc.
60°
2±0.5
13.5±0.5
Enlarged drawing in the central part
ø21±0.8
2±0.5
ø13±0.2
No. FJ008-D-R-SD-1.1
TITLE
SOP8J-D-Reel
No.
FJ008-D-R-SD-1.1
SCALE
UNIT
QTY.
mm
Seiko Instruments Inc.
2,000
+0.3
3.00 -0.2
8
5
1
4
0.17±0.05
0.2±0.1
0.65
No. FT008-A-P-SD-1.1
TITLE
TSSOP8-E-PKG Dimensions
FT008-A-P-SD-1.1
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
4.0±0.1
2.0±0.05
ø1.55±0.05
0.3±0.05
+0.1
8.0±0.1
ø1.55 -0.05
(4.4)
+0.4
6.6 -0.2
1
8
4
5
Feed direction
No. FT008-E-C-SD-1.0
TITLE
TSSOP8-E-Carrier Tape
FT008-E-C-SD-1.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
13.4±1.0
17.5±1.0
Enlarged drawing in the central part
ø21±0.8
2±0.5
ø13±0.5
No. FT008-E-R-SD-1.0
TSSOP8-E-Reel
TITLE
No.
FT008-E-R-SD-1.0
SCALE
QTY.
UNIT
mm
Seiko Instruments Inc.
3,000
1.97±0.03
8
7
6
5
3
4
+0.05
1
0.5
2
0.08 -0.02
0.48±0.02
0.2±0.05
No. PH008-A-P-SD-2.0
TITLE
SNT-8A-A-PKG Dimensions
PH008-A-P-SD-2.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
+0.1
ø1.5 -0
5°
2.25±0.05
4.0±0.1
2.0±0.05
ø0.5±0.1
0.25±0.05
0.65±0.05
4.0±0.1
4 321
5 6 78
Feed direction
No. PH008-A-C-SD-1.0
TITLE
SNT-8A-A-Carrier Tape
PH008-A-C-SD-1.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
12.5max.
9.0±0.3
Enlarged drawing in the central part
ø13±0.2
(60°)
(60°)
No. PH008-A-R-SD-1.0
TITLE
SNT-8A-A-Reel
No.
PH008-A-R-SD-1.0
SCALE
UNIT
QTY.
mm
Seiko Instruments Inc.
5,000
0.52
2.01
0.52
0.3
0.2
0.3
0.2
0.3
0.2
0.3
Caution Making the wire pattern under the package is possible. However, note that the package
may be upraised due to the thickness made by the silk screen printing and of a solder
resist on the pattern because this package does not have the standoff.
No. PH008-A-L-SD-3.0
TITLE
SNT-8A-A-Land Recommendation
PH008-A-L-SD-3.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
•
•
•
•
•
•
The information described herein is subject to change without notice.
Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein
whose related industrial properties, patents, or other rights belong to third parties. The application circuit
examples explain typical applications of the products, and do not guarantee the success of any specific
mass-production design.
When the products described herein are regulated products subject to the Wassenaar Arrangement or other
agreements, they may not be exported without authorization from the appropriate governmental authority.
Use of the information described herein for other purposes and/or reproduction or copying without the
express permission of Seiko Instruments Inc. is strictly prohibited.
The products described herein cannot be used as part of any device or equipment affecting the human
body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus
installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc.
Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the
failure or malfunction of semiconductor products may occur. The user of these products should therefore
give thorough consideration to safety design, including redundancy, fire-prevention measures, and
malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.