PD - 94873 IRFI1310NPbF l l l l l l Advanced Process Technology Isolated Package High Voltage Isolation = 2.5KVRMS Sink to Lead Creepage Dist. = 4.8mm Fully Avalanche Rated Lead-Free HEXFET® Power MOSFET D VDSS = 100V RDS(on) = 0.036Ω G Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. ID = 24A S The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing. TO-220 FULLPAK Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR d v/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw Max. Units 24 17 140 56 0.37 ± 20 420 22 5.6 5.0 -55 to + 175 A W W/°C V mJ A mJ V/ns 300 (1.6mm from case ) 10 lbfin (1.1Nm) °C Thermal Resistance Parameter RθJC RθJA Junction-to-Case Junction-to-Ambient Typ. Max. Units 2.7 65 °C/W 12/9/03 IRFI1310NPbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) RDS(on) VGS(th) gfs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 100 2.0 14 Typ. 0.11 11 56 45 40 IDSS Drain-to-Source Leakage Current LD Internal Drain Inductance 4.5 LS Internal Source Inductance 7.5 Ciss Coss Crss C Input Capacitance Output Capacitance Reverse Transfer Capacitance Drain to Sink Capacitance 1900 450 230 12 V(BR)DSS ∆V(BR)DSS/∆TJ IGSS Max. Units Conditions V V GS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA 0.036 Ω VGS = 10V, ID = 13A 4.0 V V DS = V GS, ID = 250µA S V DS = 25V, ID = 22A 25 V DS = 100V, V GS = 0V µA 250 V DS = 80V, VGS = 0V, TJ = 150°C 100 V GS = 20V nA -100 V GS = -20V 120 I D = 22A 15 nC V DS = 80V 58 V GS = 10V, See Fig. 6 and 13 V DD = 50V I D = 22A ns R G = 3.6Ω R D = 2.9Ω, See Fig. 10 Between lead, 6mm (0.25in.) nH G from package and center of die contact V GS = 0V V DS = 25V pF = 1.0MHz, See Fig. 5 = 1.0MHz D S Source-Drain Ratings and Characteristics IS I SM VSD t rr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol 24 showing the A G integral reverse 140 p-n junction diode. S 1.3 V TJ = 25°C, IS = 13A, VGS = 0V 180 270 ns TJ = 25°C, IF = 22A 1.2 1.8 µC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by Pulse width ≤ 300µs; duty cycle ≤ 2%. Starting TJ = 25°C, L = 1.0mH t=60s, =60Hz ISD ≤ 22A, di/dt ≤ 180A/µs, VDD ≤ V(BR)DSS, Uses IRF1310N data and test conditions max. junction temperature. ( See fig. 11 ) RG = 25Ω, IAS = 22A. (See Figure 12) T J ≤ 175°C IRFI1310NPbF 1000 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 100 100 10 4.5V 20us PULSE WIDTH TJ = 25 oC 1 0.1 1 10 100 RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) TJ = 25 o C TJ = 175 o C 10 6.0 7.0 8.0 9.0 Fig 3. Typical Transfer Characteristics 10 100 Fig 2. Typical Output Characteristics 3.0 VGS , Gate-to-Source Voltage (V) 1 VDS , Drain-to-Source Voltage (V) 1000 5.0 20us PULSE WIDTH TJ = 175 oC 1 0.1 Fig 1. Typical Output Characteristics 1 4.0 4.5V 10 VDS , Drain-to-Source Voltage (V) 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP 10.0 ID = 36A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0 VGS = 10V 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature ( oC) Fig 4. Normalized On-Resistance Vs. Temperature IRFI1310NPbF 3500 2500 VGS , Gate-to-Source Voltage (V) 3000 C, Capacitance (pF) 20 VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd Ciss 2000 1500 Coss 1000 Crss 500 0 1 10 16 8 4 FOR TEST CIRCUIT SEE FIGURE 13 0 20 40 60 80 100 120 QG , Total Gate Charge (nC) VDS , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 1000 ISD , Reverse Drain Current (A) VDS = 80V VDS = 50V VDS = 20V 12 0 100 ID = 22A OPERATION IN THIS AREA LIMITED BY RDS(on) ID , Drain Current (A) 100 10us 100 10 1 0.1 0.2 V GS = 0 V 0.4 0.6 0.8 1.0 1.2 1.4 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 1.6 100us 10 1 1ms 10ms TC = 25 o C TJ = 175 o C Single Pulse 1 10 100 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area 1000 IRFI1310NPbF 25 RD V DS VGS ID , Drain Current (A) 20 RG 15 D.U.T. + -VDD 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 10 Fig 10a. Switching Time Test Circuit 5 VDS 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( °C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC) 10 D = 0.50 1 0.20 0.10 0.05 0.1 PDM 0.02 t1 0.01 t2 SINGLE PULSE (THERMAL RESPONSE) 0.01 0.00001 0.0001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 10 IRFI1310NPbF 15V L VDS DRIVER D.U.T RG + V - DD IAS 20V 0.01Ω tp Fig 12a. Unclamped Inductive Test Circuit A EAS , Single Pulse Avalanche Energy (mJ) 1000 TOP 800 BOTTOM 600 400 200 0 25 50 75 100 125 150 Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Current Regulator Same Type as D.U.T. Fig 12b. Unclamped Inductive Waveforms 50KΩ QG 12V .2µF .3µF 10 V QGS D.U.T. QGD + V - DS VGS VG 3mA Charge Fig 13a. Basic Gate Charge Waveform 175 Starting TJ , Junction Temperature (o C) V(BR)DSS tp ID 9.0A 16A 22A IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit IRFI1310NPbF Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + RG • • • • Driver Gate Drive P.W. + dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Period D= - VDD P.W. Period VGS=10V D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS ISD * IRFI1310NPbF TO-220 Full-Pak Package Outline TO-220 Full-Pak Part Marking Information E XAMP L E : T H IS IS AN IR F I840G WIT H AS S E MB L Y L OT CODE 3432 AS S E MB L E D ON WW 24 1999 IN T H E AS S E MB L Y L IN E "K " Note: "P" in assembly line position indicates "Lead-Free" IN T E R N AT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT COD E P AR T N U MB E R IR F I840G 924K 34 32 D AT E CODE YE AR 9 = 1999 WE E K 24 L IN E K Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.12/03 Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/