PD - 9.1673A
IRFIZ24E
HEXFET® Power MOSFET
Advanced Process Technology
Isolated Package
l High Voltage Isolation = 2.5KVRMS
l Sink to Lead Creepage Dist. = 4.8mm
l Fully Avalanche Rated
Description
l
D
l
VDSS = 60V
RDS(on) = 0.071Ω
G
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use
in a wide variety of applications.
ID = 14A
S
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial
applications. The moulding compound used provides
a high isolation capability and a low thermal resistance
between the tab and external heatsink. This isolation
is equivalent to using a 100 micron mica barrier with
standard TO-220 product. The Fullpak is mounted to
a heatsink using a single clip or by a single screw
fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
Max.
Units
14
9.6
68
29
0.19
± 20
71
10
2.9
5.0
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient
Typ.
Max.
Units
–––
–––
5.2
65
°C/W
9/22/97
IRFIZ24E
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
60
–––
–––
2.0
4.5
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.052
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
4.9
34
19
27
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
4.5
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
C
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Drain to Sink Capacitance
–––
–––
–––
–––
370
140
65
12
V(BR)DSS
∆V(BR)DSS/∆TJ
I GSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.071
Ω
VGS = 10V, ID = 7.8A
4.0
V
VDS = VGS , ID = 250µA
–––
S
VDS = 25V, I D = 10A
25
VDS = 60V, VGS = 0V
µA
250
VDS = 48V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
20
ID = 10A
5.3
nC
VDS = 44V
7.6
VGS = 10V, See Fig. 6 and 13
–––
VDD = 28V
–––
ID = 10A
ns
–––
RG = 24Ω
–––
RD = 2.6Ω, See Fig. 10
Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
–––
VGS = 0V
–––
V
DS = 25V
pF
–––
ƒ = 1.0MHz, See Fig. 5
–––
ƒ = 1.0MHz
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
14
––– –––
showing the
A
G
integral reverse
––– –––
68
p-n junction diode.
S
––– ––– 1.3
V
TJ = 25°C, IS = 7.8A, VGS = 0V
––– 56
83
ns
TJ = 25°C, IF = 10A
––– 120 180
µC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
VDD = 25V, starting TJ = 25°C, L = 1.0mH
t=60s, ƒ=60Hz
RG = 25Ω, IAS = 10A. (See Figure 12)
ISD ≤ 10A, di/dt ≤ 280A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Uses IRFZ24N data and test conditions
IRFIZ24E
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTT OM 4.5V
10
4 .5V
2 0µ s PU LSE W ID TH
TC = 2 5°C
1
0.1
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTT OM 4.5V
TOP
I , D ra in -to -S o u rc e C u rre n t (A )
D
I , D ra in -to -S o u rce C u rre n t (A )
D
TOP
1
10
A
10
4 .5V
20 µs P UL SE W IDTH
TC = 17 5°C
1
100
0.1
V D S , D rain-to-S ource V oltage (V )
3.0
R D S (o n ) , D ra in -to -S o u rc e O n R e si sta n ce
(N o rm a li ze d )
I D , D r ain- to-S ourc e C urre nt (A )
TJ = 2 5 ° C
T J = 1 7 5 °C
10
V DS = 2 5 V
2 0 µ s P U L SE W ID TH
5
6
7
8
9
V G S , Ga te-to-S o urce V oltage (V )
Fig 3. Typical Transfer Characteristics
A
100
Fig 2. Typical Output Characteristics
100
4
10
V D S , Drain-to-Source V oltage (V)
Fig 1. Typical Output Characteristics
1
1
10
A
I D = 1 7A
2.5
2.0
1.5
1.0
0.5
V G S = 10 V
0.0
-60
-40 -20
0
20
40
60
80
A
100 120 140 160 180
T J , Junction T em perature (°C )
Fig 4. Normalized On-Resistance
Vs. Temperature
IRFIZ24E
V GS
C is s
C rs s
C os s
C , C a p a c ita n c e (p F )
600
500
C iss
400
C os s
=
=
=
=
20
0V ,
f = 1MH z
C gs + C g d , Cds SH OR TED
Cgd
C ds + C gd
V G S , G a te -to -S o u rc e V o lta g e (V )
700
V DS = 4 4V
V DS = 2 8V
16
12
300
200
I D = 1 0A
C rss
100
0
10
4
FO R TES T C IR CU IT
SEE FIG U R E 13
0
A
1
8
0
100
4
V D S , Drain-to-Source V oltage (V)
12
16
A
20
Q G , Total Gate Charge (nC )
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
I D , Drain Current (A)
I S D , R e v e rse D ra in C u rre n t (A )
8
TJ = 175 °C
TJ = 25°C
10
VG S = 0 V
1
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
V S D , Source-to-D rain V oltage (V )
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
2.0
100
10us
100us
10
1ms
TC = 25 °C
TJ = 175 ° C
Single Pulse
1
1
10ms
10
100
V DS, Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
1000
IRFIZ24E
15
RD
VDS
VGS
12
D.U.T.
I D , Drain Current (A)
RG
+
- VDD
9
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
6
Fig 10a. Switching Time Test Circuit
3
VDS
90%
0
25
50
75
100
125
T C , Case Temperature
150
175
( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response
(Z thJC)
10
D = 0.50
0.20
1
0.10
0.05
0.02
0.01
0.1
PDM
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D = t1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1
IRFIZ24E
D.U.T.
RG
+
V
- DD
IAS
5.0 V
tp
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
E A S , S in g le P u ls e A va la n c h e E n e rg y (m J)
140
L
VDS
TO P
120
BOT TO M
100
80
60
40
20
V D D = 2 5V
0
25
tp
50
A
75
100
125
150
175
Starting TJ , Junction T emperature (°C)
VDD
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
VDS
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
10 V
QGS
ID
4.2A
7 .2A
10A
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
IRFIZ24E
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
•
•
•
•
RG
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
ISD
*
IRFIZ24E
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
10.60 (.41 7)
10.40 (.40 9)
ø
3.40 (.133 )
3.10 (.123 )
4.8 0 (.189)
4.6 0 (.181)
-A 3.70 (.145)
3.20 (.126)
16 .0 0 (.630)
15 .8 0 (.622)
2 .80 (.110)
2 .60 (.102)
LE AD A S SIGN M E N T S
1 - GA TE
2 - D R AIN
3 - SO U R C E
7 .10 (.280)
6 .70 (.263)
1.15 (.04 5)
M IN .
N O T ES :
1 D IM EN SION IN G & T O LER A N C IN G
PE R AN S I Y14.5 M , 1982
1
2
3
2 C O N TR OLLIN G D IM EN S ION : IN C H .
3.30 (.130 )
3.10 (.122 )
-B-
13 .7 0 (.540)
13 .5 0 (.530)
C
A
3X
1.40 (.05 5)
1.05 (.04 2)
3X
0.9 0 (.035)
3X 0.7 0 (.028)
0.25 (.010 )
M
A M
0.48 (.019)
0.44 (.017)
2.85 (.112 )
2.65 (.104 )
B
2 .54 (.100)
2X
D
B
M IN IM U M C R E EP AG E
D IST A NC E B ET W E EN
A-B -C -D = 4.80 (.189 )
Part Marking Information
TO-220 Fullpak
E XAM PLE : T HIS IS A N IRF I840G
W ITH AS SE MBLY
LOT CODE E401
A
INT ER NAT IONA L
RE CTIF IER
PA RT NU MBE R
IRF I840G
LOGO
E 401 9 24 5
AS SE MBLY
LOT COD E
D ATE CODE
(YYW W )
YY = YE AR
W W = W E EK
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http://www.irf.com/
Data and specifications subject to change without notice.
9/97