FXL2SD106 Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing Features General Description ■ Bi-directional interface between two levels from 1.1V The FXL2SD106 is a configurable dual-voltage-supply translator designed for both uni-directional and bidirectional voltage translation between two logic levels. The device allows translation between voltages as high as 3.6V to as low as 1.1V. The A port tracks the VCCA level, and the B port tracks the VCCB level. This allows for bi-directional voltage translation over a variety of voltage levels: 1.2V, 1.5V, 1.8V, 2.5V and 3.3V. ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ to 3.6V Fully configurable: Inputs and outputs track VCC level Non-preferential power-up; either VCC may be powered-up first Outputs remain in 3-state until active VCC level is reached Outputs switch to 3-state if either VCC is at GND. Power off protection Bushold on data inputs eliminates the need for SDIO pull-up resistors Control input (OE and CLK IN) are referenced to VCCA voltage Packaged in 16-terminal DQFN (2.5mm x 3.5mm) Direction control not needed 80 Mbps throughput when translating between 1.8V and 2.5V ESD protection exceeds: – 12kV HBM (B port I/O to GND) (per JESD22-A114 & Mil Std 883e 3015.7) – 8kV HBM (A port I/O to GND) (per JESD22-A114 & Mil Std 883e 3015.7) – 1kV CDM (per ESD STM 5.3) The FXL2SD106 is specifically designed as a translator to interface with the SDIO standard. I/O capacitance is managed to meet the SD maximum capacitance specification. The B side ESD performance allows interface as an external card and the part can handle 80 Mbps throughput when translating between 1.8V and 2.5V. The device remains in 3-state until both VCCs reach active levels allowing either VCC to be powered-up first. Internal power down control circuits place the device in 3-state if either VCC is removed. The OE input, when low, disables both the A and B ports by placing them in a 3-state condition. The FXL2SD106 is designed so that both control pins (OE and CLK IN) are supplied by VCCA. The device senses an input signal on A or B port automatically. The input signal is transferred to the other port. Ordering Information Order Number Package Number FXL2SD106BQX MLP16E Package Description 16-Terminal Depopulated Quad Very-Thin Flat Pack, No Leads (DQFN), JEDEC MO-241, 2.5mm x 3.5mm All packages are lead free per JEDEC: J-STD-020B standard. ©2008 Fairchild Semiconductor Corporation FXL2SD106 Rev. 1.8.0 www.fairchildsemi.com FXL2SD106 — Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing June 2008 Functional Diagram VCCA VCCB 1 VCCA CLK IN 2 15 CLK OUT CMD A 3 14 CMD B A0 4 13 B0 A1 5 12 B1 A2 6 11 B2 A3 7 10 B3 8 VCCB 16 OE CMD A CMD B A0–A3 B0–B3 9 OE GND CLK IN CLK OUT Pin Description Number Name Function Table Description 1 VCCA A Side Power Supply 2 CLK IN A Side Input 3 CMD A 4–7 A0–A3 A Side Inputs or 3-State Outputs 8 OE 9 GND 10–13 B3–B0 14 CMD B B Side Inputs or 3-State Outputs 15 CLK OUT 3-State Output 16 VCCB B Side Power Supply Control OE Output Enable Input Outputs L 3-State H Normal Operation H = HIGH Logic Level L = LOW Logic Level Power-Up/Power-Down Sequencing FXL translators offer an advantage in that either Vcc may be powered up first. This benefit derives from the chip design. When either VCC is at 0 volts, outputs are in a high-impedance state. The control input (OE) is designed to track the VccA supply. A pull-down resistor tying OE to GND should be used to ensure that bus contention, excessive currents, or oscillations do not occur during power-up/power-down. The size of the pull-down resistor is based upon the current-sinking capability of the device driving the OE pin. The recommended power-up sequence is the following: 1. Apply power to the first VCC. 2. Apply power to the second VCC. 3. Drive the OE input high to enable the device. The recommended power-down sequence is the following: 1. Drive OE input low to disable the device. 2. Remove power from either VCC. 3. Remove power from other VCC. ©2008 Fairchild Semiconductor Corporation FXL2SD106 Rev. 1.8.0 www.fairchildsemi.com 2 FXL2SD106 — Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing Connection Diagram Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCCA, VCCB VI VO Parameter Rating Supply Voltage –0.5V to +4.6V DC Input Voltage I/O Port A I/O Port B Control Inputs (OE, CLK IN) –0.5V to +4.6V –0.5V to +4.6V –0.5V to +4.6V Output Voltage(1) Outputs 3-STATE Outputs Active (An, CMD A) Outputs Active (Bn, CMD B, CLK OUT) –0.5V to +4.6V –0.5V to VCCA + 0.5V –0.5V to VCCB + 0.5V IIK DC Input Diode Current @ VI < 0V –50mA IOK DC Output Diode Current @ VO < 0V VO > VCC –50mA +50mA IOH / IOL ICC TSTG DC Output Source/Sink Current –50mA / +50mA DC VCC or Ground Current per Supply Pin Storage Temperature Range ±100mA –65°C to +150°C Note: 1. IO Absolute Maximum Rating must be observed. Recommended Operating Conditions(2) The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VCCA or VCCB Parameter 1.1V to 3.6V Input Voltage Port A Port B Control Inputs (OE, CLK IN) 0.0V to 3.6V 0.0V to 3.6V 0.0V to VCCA Dynamic Output Current in IOH/IOL with VCC @ 3.0V to 3.6V 2.3V to 2.7V 1.65V to 1.95V 1.4V to 1.65V 1.1V to 1.4V Static Output Current IOH/IOL with VCC @ 1.1V to 3.6V TA ∆t / ∆V Rating Power Supply Operating Free Air Operating Temperature ±18.0mA ±11.8mA ±7.4mA ±5.0mA ±2.6mA ±20.0µA –40°C to +85°C Maximum Input Edge Rate VCCA/B = 1.1V to 3.6V 10ns/V Note: 2. All unused inputs and I/O pins must be held at VCCI or GND. ©2008 Fairchild Semiconductor Corporation FXL2SD106 Rev. 1.8.0 www.fairchildsemi.com 3 FXL2SD106 — Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing Absolute Maximum Ratings Symbol VIH VIL VOH Low Level Input Voltage (3) VOL(3) II(ODH)(4) II(ODL) Parameter VCCA (V) VCCB (V) Conditions Min. 1.4–3.6 1.1–3.6 Data inputs An, CMD A, Control inputs CLK IN, OE 0.6 x VCCA High Level Input Voltage (5) II IOFF IOZ(6) ICCA/B(7)(8) ICCZ(7) High Level Output Voltage Low Level Output Voltage 1.1–1.4 1.1–3.6 1.1–3.6 1.4–3.6 1.1–3.6 1.1–1.4 1.4–3.6 1.1–3.6 1.1 –1.4 1.1–3.6 1.1–3.6 1.4–3.6 1.1–3.6 1.1–1.4 1.65–3.6 1.1–3.6 1.1–1.4 1.1–3.6 1.1–3.6 1.65–3.6 Data inputs Bn, CMD B Units V 0.6 x VCCB 0.9 x VCCB Data inputs An, CMD A, Control inputs CLK IN, OE 0.35 x VCCA Data inputs Bn, CMD B 0.35 x VCCB V 0.1 x VCCA 0.1 x VCCB Data outputs An, CMD A, IHOLD = –20µA 0.75 x VCCA Data outputs Bn, CMD B, IHOLD = –20µA 0.75 x VCCB V 0.8 1.1–3.6 1.1–1.4 1.1–3.6 1.1–1.4 1.1–3.6 1.1–3.6 1.65–3.6 1.1–3.6 1.1–1.4 3.6 3.6 2.7 2.7 1.95 1.95 200 1.6 1.6 120 1.4 1.4 80 Bushold Input Overdrive Low Current Max. 0.9 x VCCA 1.65–3.6 Bushold Input Overdrive High Current Typ. 0.8 Data outputs An, CMD A, IHOLD = 20µA 0.3 Data outputs Bn, CMD B, IHOLD = 20µA 0.3 Data inputs An, CMD A, Bn, CMD B V 0.2 x VCCB 450 µA 300 3.6 3.6 2.7 2.7 1.95 1.95 -200 1.6 1.6 -120 1.4 1.4 -80 1.1–3.6 3.6 Control inputs OE, CLK IN, VI = VCCA or GND ±1.0 µA 0 3.6 An, CMD A, VO = 0V to 3.6V ±2.0 µA 3.6 0 Bn, CMD B, CLK OUT, VO = 0V to 3.6V ±2.0 3.6 3.6 An, CMD A, Bn, CMD B, CLK OUT, VO = 0V or 3.6V, OE = VIL ±2.0 3.6 0 An, CMD A, VO = 0V or 3.6V, OE = Don’t Care ±2.0 0 3.6 Bn, CMD B, CLK OUT, VO = 0V or 3.6V, OE = Don’t Care ±2.0 Quiescent Supply Current 1.1–3.6 1.1–3.6 VI = VCCI or GND, IO = 0 5.0 µA Quiescent Supply Current 1.1–3.6 1.1–3.6 VI = VCCI or GND, IO = 0, OE = VIL 5.0 µA Input Leakage Current Power Off Leakage Current 3-State Output Leakage ©2008 Fairchild Semiconductor Corporation FXL2SD106 Rev. 1.8.0 Data inputs An, CMD A, Bn, CMD B 0.2 x VCCA -450 µA -300 µA www.fairchildsemi.com 4 FXL2SD106 — Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing DC Electrical Characteristics (TA = –40°C to +85°C) Symbol Parameter VCCA (V) VCCB (V) ICCA(7) Quiescent Supply Current 0 1.1–3.6 ICCB(7) Quiescent Supply Current Conditions Min. Typ. VI = VCCB or GND; IO = 0 Max. Units -2.0 µA 1.1–3.6 0 VI = VCCA or GND; IO = 0 2.0 1.1–3.6 0 VI = VCCB or GND; IO = 0 -2.0 0 1.1–3.6 VI = VCCA or GND; IO = 0 2.0 µA Notes: 3. This is the output voltage for static conditions. Dynamic drive specifications are given in “Dynamic Output Electrical Characteristics.” 4. An external driver must source at least the specified current to switch LOW-to-HIGH. 5. An external driver must source at least the specified current to switch HIGH-to-LOW. 6. “Don’t Care” indicates any valid logic level. 7. VCCI is the VCC associated with the input side. 8. Reflects current per supply, VCCA or VCCB. Dynamic Output Electrical Characteristics(9) A Port (An, CMD A) Output Load: CL = 15pF, RL ≥ 1MΩ (CI/O = 5pF) TA = -40°C to +85°C, VCCA = Symbol trise (10) Parameter 3.0V to 3.6V 2.3V to 2.7V Typ. Typ. Max. Max. 1.65V to 1.95V Typ. Max. 1.4V to 1.6V Typ. 1.1V to 1.3V Max. Typ. Units Output Rise Time A port 3.0 3.5 4.0 5.0 7.5 ns tfall(11) Output Fall Time A port 3.0 3.5 4.0 5.0 7.5 ns IOHD(10) Dynamic Output Current High -18.0 -11.8 -7.4 -5.0 -2.6 mA IOLD(11) Dynamic Output Current Low +18.0 +11.8 +7.4 +5.0 +2.6 mA B Port (Bn, CMD B, CLK OUT) Output Load: CL = 15pF, RL ≥ 1MΩ (CI/O = 15pF) TA = -40°C to +85°C, VCCB = Symbol trise (10) Parameter 3.0V to 3.6V 2.3V to 2.7V Typ. Typ. Max. Max. 1.65V to 1.95V Typ. Max. 1.4V to 1.6V Typ. 1.1V to 1.3V Max. Typ. Units Output Rise Time A port 3.0 3.5 4.0 5.0 7.5 ns tfall(11) Output Fall Time A port 3.0 3.5 4.0 5.0 7.5 ns IOHD(10) Dynamic Output Current High -18.0 -11.8 -7.4 -5.0 -2.6 mA IOLD(11) Dynamic Output Current Low +18.0 +11.8 +7.4 +5.0 +2.6 mA Notes: 9. Dynamic Output Characteristics are guaranteed but not tested. 10. See Figure 5. 11. See Figure 6. ©2008 Fairchild Semiconductor Corporation FXL2SD106 Rev. 1.8.0 www.fairchildsemi.com 5 FXL2SD106 — Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing DC Electrical Characteristics (TA = –40°C to +85°C) (Continued) VCCA = 3.0V to 3.6V TA = -40°C to +85°C, VCCB = Symbol tPLH, tPHL 3.0V–3.6V 2.3V–2.7V 1.65V–1.95V 1.4V–1.6V Min. Max. Min. Max. Min. Max. Min. Max. Typ. Units A to B 0.2 3.5 0.3 3.9 0.5 5.4 0.6 6.8 22.0 ns B to A 0.2 3.5 0.2 3.8 0.3 5.0 0.5 Parameter 1.1V–1.3V 6.0 15.0 ns tPLH, tPHL CLK IN to CLK OUT 3.0 3.5 4.5 6.0 15.0 ns tPZL, tPZH OE to A, OE to B 1.7 1.7 1.7 1.7 1.7 µs A Port, B Port 0.5 0.5 0.5 1.0 1.0 ns tskew (12) VCCA = 2.3V to 2.7V TA = -40°C to +85°C, VCCB = Symbol tPLH, tPHL 3.0V–3.6V 2.3V–2.7V 1.65V–1.95V 1.4V–1.6V Min. Max. Min. Max. Min. Max. Min. Max. Typ. Units A to B 0.2 3.8 0.4 4.2 0.5 5.6 0.8 6.9 22.0 ns B to A 0.3 3.9 0.4 4.2 0.5 5.5 0.5 6.5 15.0 ns Parameter 1.1V–1.3V tPLH, tPHL CLK IN to CLK OUT 3.5 4.0 4.5 6.5 15.0 ns tPZL, tPZH OE to A, OE to B 1.7 1.7 1.7 1.7 1.7 µs A Port, B Port 0.5 0.5 0.5 1.0 1.0 ns 3.0V–3.6V 2.3V–2.7V 1.65V–1.95V 1.4V–1.6V Min. Max. Min. Max. Min. Max. Min. Max. Typ. Units A to B 0.3 5.0 0.5 5.5 0.8 6.7 0.9 7.5 22.0 ns B to A 0.5 5.4 0.5 5.6 0.8 6.7 1.0 tskew (12) VCCA = 1.65V to 1.95V TA = -40°C to +85°C, VCCB = Symbol tPLH, tPHL Parameter 1.1V–1.3V 7.0 15.0 ns tPLH, tPHL CLK IN to CLK OUT 4.5 4.5 6.3 6.7 15.0 ns tPZL, tPZH OE to A, OE to B 1.7 1.7 1.7 1.7 1.7 µs A Port, B Port 0.5 0.5 0.5 1.0 1.0 ns tskew(12) VCCA = 1.4V to 1.6V TA = -40°C to +85°C, VCCB = Symbol tPLH, tPHL 3.0V–3.6V 2.3V–2.7V 1.65V–1.95V 1.4V–1.6V 1.1V–1.3V Min. Max. Min. Max. Min. Max. Min. Max. Typ. Units A to B 0.5 6.0 0.5 6.5 1.0 7.0 1.0 8.5 22.0 ns B to A 0.6 6.8 0.8 6.9 0.9 7.5 1.0 8.5 15.0 ns Parameter tPLH, tPHL CLK IN to CLK OUT 6.0 6.5 6.7 8.5 15.0 ns tPZL, tPZH OE to A, OE to B 1.7 1.7 1.7 1.7 1.7 µs A Port, B Port 1.0 1.0 1.0 1.0 1.0 ns tskew (12) Note: 12. Skew is the variation of propagation delay between output signals and applies only to output signals on the same port (An, CMD A or Bn, CMD B) and switching with the same polarity (Low-to-High or High-to-Low). See Figure 8. ©2008 Fairchild Semiconductor Corporation FXL2SD106 Rev. 1.8.0 www.fairchildsemi.com 6 FXL2SD106 — Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing AC Characteristics TA = -40°C to +85°C, VCCB = 3.0V to 3.6V 2.3V to 2.7V 1.65V to 1.95V 1.4V to 1.6V 1.1V to 1.3V VCCA Min. Min. Min. Min. Typ. Units VCCA = 3.0V to 3.6V 100 100 80 60 20 Mbps VCCA = 2.3V to 2.7V 100 100 80 60 20 Mbps VCCA =1.65V to 1.95V 80 80 60 40 20 Mbps VCCA = 1.4V to 1.6V 60 60 40 40 20 Mbps Typ. Typ. Typ. Typ. Typ. 20 20 20 20 20 VCCA = 1.1V to 1.3V Mbps Note: 13. Max Data Rate is guaranteed but not tested. 14. Max Data Rate is specified in megabits per second. See Figure 7. It is equivalent to two times the F-toggle frequency, specified in megahertz. For example, 100 Mbps is equivalent to 50 MHz. Capacitance TA = +25°C Symbol Parameter Conditions Typical Units Cin Input Capacitance, Control pin (OE, CLK IN) VccA = VccB = GND 4 pF Ci/o Input/Output Capacitance VccA = VccB = 3.3V, OE = VccA 5 pF VccA = VccB = 3.3V, Vi = 0V or Vcc, f = 10MHz 25 Cpd An, CMD A Bn, CMD B, CLK OUT Power Dissipation Capacitance ©2008 Fairchild Semiconductor Corporation FXL2SD106 Rev. 1.8.0 6 pF www.fairchildsemi.com 7 FXL2SD106 — Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing Max Data Rate(13)(14) FXL2SD106 — Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing VCC TEST SIGNAL DUT C1 R1 Test Input Signal Output Enable Control tPLH, tPHL Data Pulses VCCA tPZL 0V Low to High Switch tPZH VCCI Low to High Switch Figure 1. AC Test Circuit AC Load Table ©2008 Fairchild Semiconductor Corporation FXL2SD106 Rev. 1.8.0 VCCO Cl Rl 1.2V ± 0.1V 15pF 1MΩ 1.5V ± 0.1V 15pF 1MΩ 1.8V ± 0.15V 15pF 1MΩ 2.5V ± 0.2V 15pF 1MΩ 3.3 ± 0.3V 15pF 1MΩ www.fairchildsemi.com 8 Vmi VCCI OUTPUT CONTROL GND tpxx tpxx DATA OUT Vmi VCCA GND tPZL Vmo VCCO DATA OUT VY VOL Input tR = tF = 2.0ns, 10% to 90% Input tR = tF = 2.5ns, 10% to 90%, @ Vi = 3.0V to 3.6V only Input tR = tF = 2.0ns, 10% to 90% Figure 2. Waveform for Inverting and Non-inverting Functions OUTPUT CONTROL Vmi Input tR = tF = 2.5ns, 10% to 90%, @ Vi = 3.0V to 3.6V only Figure 3. 3-STATE Output Low Enable Time for Low Voltage Logic VCCA GND tPZH DATA OUT Vx VOH Symbol Vcc Vmi(15) VCCI / 2 Vmo VCCO / 2 VX 0.9 x VCCO VY 0.1 x VCCO Note: 15. VCCI = VCCA for control pin OE or Vmi = (VCCA / 2). Input tR = tF = 2.0ns, 10% to 90% Input tR = tF = 2.5ns, 10% to 90%, @ Vi = 3.0V to 3.6V only Figure 4. 3-STATE Output High Enable Time for Low Voltage Logic ©2008 Fairchild Semiconductor Corporation FXL2SD106 Rev. 1.8.0 www.fairchildsemi.com 9 FXL2SD106 — Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing DATA IN VOH VOH tfall 80% x VCCO 80% x VCCO VOUT VOUT 20% x VCCO 20% x VCCO VOL VOL Time Time IOHD ≈ (CL +CI/O) x ∆VOUT (20% – 80%) x VCCO = (CL +CI/O) x ∆t tRISE IOLD ≈ (CL +CI/O) x Figure 5. Active Output Rise Time and Dynamic Output Current High Figure 6. Active Output Fall Time and Dynamic Output Current Low Vmo Vmo GND tskew VCCI VCCI/2 VCCO DATA OUTPUT tW DATA IN ∆VOUT (80% – 20%) x VCCO = (CL +CI/O) x tFALL ∆t tskew VCCI/2 GND DATA OUTPUT Max. data rate, f = 1/tW Figure 7. Maximum Data Rate VCCO Vmo Vmo GND tskew = (tpHLmax – tpHLmin) or (tpLHmax – tpLHmin) Figure 8. Output Skew Time ©2008 Fairchild Semiconductor Corporation FXL2SD106 Rev. 1.8.0 www.fairchildsemi.com 10 FXL2SD106 — Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing trise Tape Format for DQFN 10 Package Designator Tape Section Number Cavities Cavity Status Cover Tape Status BQX Leader (Start End) 125 (typ) Empty Sealed Carrier 2500/3000 Filled Sealed Trailer (Hub End) 75 (typ) Empty Sealed Tape Dimensions millimeters ©2008 Fairchild Semiconductor Corporation FXL2SD106 Rev. 1.8.0 www.fairchildsemi.com 11 FXL2SD106 — Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing Tape and Reel Specification Tape Size A B C D N W1 W2 12mm 13.0 (330) 0.059 (1.50) 0.512 (13.00) 0.795 (20.20) 7.008 (178) 0.488 (12.4) 0.724 (18.4) ©2008 Fairchild Semiconductor Corporation FXL2SD106 Rev. 1.8.0 www.fairchildsemi.com 12 FXL2SD106 — Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing Reel Dimensions inches (millimeters) Figure 9. 6-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241 2.5mm x 3.5mm Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©2008 Fairchild Semiconductor Corporation FXL2SD106 Rev. 1.8.0 www.fairchildsemi.com 13 FXL2SD106 — Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing Physical Dimensions ® ACEx Build it Now™ CorePLUS™ CorePOWER™ CROSSVOLT™ CTL™ Current Transfer Logic™ ® EcoSPARK EfficentMax™ EZSWITCH™ * ™ PDP SPM™ Power-SPM™ ® PowerTrench Programmable Active Droop™ ® QFET QS™ Quiet Series™ RapidConfigure™ Saving our world, 1mW at a time™ SmartMax™ SMART START™ ® SPM STEALTH™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SupreMOS™ SyncFET™ FPS™ F-PFS™ ® FRFET SM Global Power Resource Green FPS™ Green FPS™ e-Series™ GTO™ IntelliMAX™ ISOPLANAR™ MegaBuck™ MICROCOUPLER™ MicroFET™ MicroPak™ MillerDrive™ MotionMax™ Motion-SPM™ ® OPTOLOGIC ® OPTOPLANAR ® ® Fairchild ® Fairchild Semiconductor FACT Quiet Series™ ® FACT ® FAST FastvCore™ ®* FlashWriter ® ® The Power Franchise TinyBoost™ TinyBuck™ ® TinyLogic TINYOPTO™ TinyPower™ TinyPWM™ TinyWire™ µSerDes™ ® UHC Ultra FRFET™ UniFET™ VCX™ VisualMax™ ® ® * EZSWITCH™ and FlashWriter are trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative / In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production This datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I34 ©2008 Fairchild Semiconductor Corporation FXL2SD106 Rev. 1.8.0 www.fairchildsemi.com 14 FXL2SD106 — Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks.