MAXIM MAX3276

19-2375; Rev 0; 4/02
Dual-Rate Fibre Channel Limiting Amplifiers
Features
♦ Dual-Rate 1.0625Gbps/2.125Gbps Operation
♦ On-Chip Selectable 4th-Order Filter
♦ Relaxation Oscillation Suppression of Legacy,
CD Laser-Based Transmitters
♦ Available in 100Ω and 150Ω Output Terminations
♦ Programmable Loss-of-Signal (LOS) Threshold
♦ Output Squelch Control
♦ Power-On Reset Minimizes Inrush Current
♦ 4mm ✕ 4mm 16-Pin QFN Packages
Ordering Information
Applications
DIFF OUTPUT PINTERMINATION PACKAGE
PART
TEMP RANGE
MAX3274UGE
0°C to +85°C
100Ω
16 QFN
MAX3276UGE*
0°C to +85°C
150Ω
16 QFN
*Future product—contact factory for availability
Fibre Channel GBIC Optical Modules
Dual-Rate Fibre Channel SFF/SFP Optical
Modules
Typical Operating Circuit
OPTICAL MODULE
RECEIVER SECTION
HOST
SERVER OR SWITCH
HOST VCC
+3.3V
+3.3V
VCC
4.7kΩ TO 10kΩ
RX LOS
LOS LOS
DESERIALIZER
0.1µF
TIA
0.1µF
IN+
OUT+
0.1µF
0.1µF
IN-
MAX3275
100Ω
OR 150Ω
OUT-
MAX3274
MAX3276*
TH SQUELCH
GND
BWSEL
RATE SELECT
*FUTURE PRODUCT
Pin Configurations appear at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX3274/MAX3276
General Description
The MAX3274/MAX3276* dual-rate Fibre Channel limiting amplifiers are optimized for use in dual-rate
2.125Gbps/1.0625Gbps Fibre Channel optical receiver
systems. An on-chip selectable fourth-order Bessel
Thompson filter offers 15dB (typ) of attenuation at 2GHz
to suppress the relaxation oscillation (RO) found in
legacy transmitters. The amplifiers accept a wide range
of input voltages and provide constant-level output voltages with controlled edge speeds. Receivers using the
MAX3275/MAX3277 transimpedance amplifiers (TIA)
and the MAX3274/MAX3276 dual-rate limiting amplifiers
can meet the Fibre Channel receiver sensitivity optical
modulation amplitude (OMA) specification of 49mWP-P
at 2.125Gbps and 31mWP-P at 1.0625Gbps. Additional
features include a programmable threshold loss-ofsignal (LOS) detector, output squelch, and bandwidth
select. The MAX3274/MAX3276 feature current-mode
logic (CML) data outputs. The MAX3274/MAX3276 are
available in 16-pin QFN packages, making them ideal
for GBIC and small form-factor receiver modules.
*Future product
MAX3274/MAX3276
Dual-Rate Fibre Channel Limiting Amplifiers
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (VCC) ............................................-0.5V to +6.0V
Continuous CML Output Current
(OUT+, OUT-) ...............................................-25mA to +25mA
CML Input Voltage (IN+, IN-) .....................-0.5V to (VCC + 0.5V)
Differential Input Voltage (IN+, IN-).....................................2VP-P
TTL Input Voltage
(BWSEL, SQUELCH, TEST) ....................-0.5V to (VCC + 0.5V)
Voltage at TH ................................................-0.5V to VCC + 0.5V
Current into TH...................................................................5.0mA
Open Collector (LOS, LOS)...................................-0.5V to +5.5V
Operating Ambient Temperature Range .............-40°C to +85°C
Storage Ambient Temperature Range...............-55°C to +100°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, TA = 0°C to +85°C. Typical values are at VCC = +3.3V and TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
Supply Current
Data Rate
UNITS
99
mA
1.0625
BWSEL = 1
2.125
0.77
0.89
-15dB, BWSEL = 0 (Note 1)
Deterministic Jitter
Random Jitter
Total Jitter
(Notes 2, 3)
1.0
GHz
1.7
(Note 2)
VIN
Gbps
2.0
-3dB, BWSEL = 1 (Note 1)
BWSEL Response Time
Input Range
MAX
78
BWSEL = 0
-3dB, BWSEL = 0 (Note 1)
Small-Signal Bandwidth
TYP
10
10
µs
1200
mVP-P
BWSEL = 0, 10mV ≤ input ≤ 20mV (Notes 2, 4)
44
BWSEL = 0, 20mV < input ≤ 1200mV (Notes 2, 4)
37
44
BWSEL = 1, 10mV ≤ input ≤ 1200mV (Notes 2, 4)
10
20
BWSEL = 0 (Notes 2, 5)
6.1
BWSEL = 1 (Notes 2, 5)
3.8
BWSEL = 0 (Note 6)
130
BWSEL = 1 (Note 6)
63
61
psP-P
psRMS
psP-P
LOS, LOS Transition Time
10% to 90% rise/fall time (Notes 2, 7)
5
350
ns
LOS, LOS Response Time
Figure 1 (Note 2)
1
20
µs
LOS, LOS Hysteresis
20 ✕ log (VDEASSERT/VASSERT), VTH = 6mVP-P
(Note 8)
2
8
VTH = 30mVP-P (Notes 2, 8)
4
8
LOS Assert (VLOS) Range
330Ω < RTH < 2.0kΩ (Notes 2, 8)
8
30
LOS Assert (VLOS) Error
330Ω < RTH < 2.0kΩ (Notes 2, 8)
-30
+30
%
100
µA
Ω
Squelch Input Current
Single-Ended Input Resistance
RIN
Data Input VSWR
ROUT
CML Output Voltage
VOUT
2
mV
40
50
60
OUT+ to OUT- (MAX3274)
80
100
120
Ω
OUT+ to OUT- (MAX3276)
120
150
180
Ω
SQUELCH = 0 (Note 4)
900
1200
1600
f < 2GHz (Note 2)
Differential Output Resistance
Data Output Levels
IN+, IN- to VCC
dB
2.5
SQUELCH = 1, VIN < VTH (Note 4)
SQUELCH = 1, VIN < VTH (Note 4)
30
VCC - 0.1
_______________________________________________________________________________________
VCC
mVP-P
V
Dual-Rate Fibre Channel Limiting Amplifiers
(VCC = +3.0V to +3.6V, TA = 0°C to +85°C. Typical values are at VCC = +3.3V and TA = +25°C, unless otherwise noted.)
PARAMETER
Data Output Edge Speed
SYMBOL
TYP
MAX
20% to 80%, BWSEL = 0 (Notes 2, 5)
CONDITIONS
170
220
20% to 80%, BWSEL = 1 (Notes 2, 5)
105
140
LOS asserted
LOS Current Sink
LOS not asserted, VCC = 0, 4.7kΩ pullup to
+5.5V
LOS not asserted
LOS Current Sink
LOS asserted, VCC = 0, 4.7kΩ pullup to +5.5V
LOS, LOS Output Low Voltage
Supply Noise Tolerance
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
MIN
1.0
UNITS
psP-P
mA
0
10
1.0
µA
mA
0
LOS, LOS sink current = 1mA
10kHz ≤ f < 1MHz (Note 9)
40
1MHz ≤ f < 50MHz (Note 9)
20
10
µA
0.5
V
mVP-P
Measured with a ≤ -50dBm input signal on a network analyzer.
Specifications are guaranteed by design and characterization.
Using 27 - 1 PRBS pattern. The input bandwidth is limited to 0.75 ✕ (selected data rate) by a 4th-order Bessel Thompson filter.
Using a K28.5 pattern at the selected bit rate. Measured differentially into a matched external load.
Using a K28.7 or equivalent pattern at the selected bit rate. Measured over the entire input voltage range.
Total jitter is estimated as TJ = DJ + 14 x RJ, where DJ is the peak-to-peak deterministic jitter, and RJ is the RMS random jitter.
LOS (open collector) is connected to a +5.5V supply through a 4.7kΩ external resistor.
Using K28.7 or equivalent pattern at selected bit rate.
Total jitter, deterministic jitter, LOS hysteresis, LOS assert performance verified.
_______________________________________________________________________________________
3
MAX3274/MAX3276
ELECTRICAL CHARACTERISTICS (continued)
Typical Operating Characteristics
(VCC = +3.3V, TA = +25°C, unless otherwise noted.)
INPUT = 1.2VP-P, 27 - 1 PRBS, BWSEL = 1
MAX3274/76 toc02
MAX3274/76 toc01
INPUT = 10mVP-P, 27 - 1 PRBS, BWSEL = 1
150mV/div
150mV/div
100ps/div
100ps/div
INPUT = 1.2VP-P, 27 - 1 PRBS, BWSEL = 0
MAX3274/76 toc04
MAX3274/76 toc03
INPUT = 10mVP-P, 27 - 1 PRBS, BWSEL = 0
150mV/div
150mV/div
200ps/div
200ps/div
MAX3274/76 toc06
140mV/div
1mV/div
200ps/div
4
BWSEL = 0
RO FULLY SUPPRESSED
BWSEL = 1
RO NOT SUPPRESSED
MAX3274/76 toc07
INPUT RELAXATION OSCILLATION
(RO) OF LEGACY
FIBRE CHANNEL TRANSMITTERS
(INPUT = K28.5, 1.0625Gbps)
MAX3274/76 toc05
MAX3274/MAX3276
Dual-Rate Fibre Channel Limiting Amplifiers
200ps/div
140mV/div
200ps/div
_______________________________________________________________________________________
Dual-Rate Fibre Channel Limiting Amplifiers
800
600
400
160
200
38
32
120
26
14
60
8
40
2
20
-4
5
10
15
0
25
20
20
40
60
80
TEMPERATURE (°C)
FREQUENCY (Hz)
INPUT DIFFERENTIAL RETURN GAIN
(SIGNAL LEVEL of -60dBm)
OUTPUT DIFFERENTIAL RETURN GAIN
(SIGNAL LEVEL of -60dBm)
ASSERT/DEASSERT LEVELS vs. RTH
(BWSEL = 1, 2.125Gbps, K28.5)
-5
-15
-10
GAIN (dB)
-20
-25
-30
-15
-20
-25
-35
-40
-30
-45
-35
-50
-40
1G
10G
RTH = 1.8kΩ
3
2
1
0
1000
40
35
30
BWSEL = 0
25
20
15
80
100
2000
2500
3000
BWSEL = 1
14
MAX3274/76 toc16
45
1500
RANDOM JITTER
12
BWSEL = 0
10
8
6
4
10
BWSEL = 1
2
0
TEMPERATURE (°C)
500
RTH (Ω)
5
60
0
10G
RANDOM JITTER (psRMS)
RTH = 680Ω
40
20
ASSERT
MAX3274/76 toc15
RTH = 330Ω
20
30
0
50
DETERMINISTIC JITTER (psP-P)
9
4
DEASSERT
40
DETERMINISTIC JITTER
MAX3274/76 toc14
10
5
50
FREQUENCY (Hz)
LOS HYSTERESIS vs. TEMPERATURE
(BWSEL = 1, 2.125Gbps, K28.5)
7
60
10
1G
FREQUENCY (Hz)
8
70
MAX3274/76 toc13
-10
0
LOS ASSERT/DEASERT (mVP-P)
5
MAX3274/76 toc11
0
0
10G
1G
DIFFERENTIAL INPUT (mVP-P)
-5
6
-10
100M
100
MAX3274/76 toc12
0
20
80
0
0
GAIN (dB)
44
140
100
MAX3274/76 toc10
180
GAIN
1000
50
MAX3274/76 toc9
1200
200
SUPPLY CURRENT (mA)
MAX3274/76 toc08
DIFFERENTIAL OUTPUT (mVP-P)
1400
HYSTERESIS (dB)
FORWARD DIFFERENTIAL GAIN
(INPUT LEVEL of -60dBm, BWSEL = 0)
SUPPLY CURRENT vs. TEMPERATURE
TRANSFER FUNCTION
0
0 100 200 300 400 500 600 700 800 900 1000
DIFFERENTIAL INPUT (mVP-P)
0
20 40 60 80 100 120 140 160 180 200
DIFFERENTIAL INPUT (mVP-P)
_______________________________________________________________________________________
5
MAX3274/MAX3276
Typical Operating Characteristics (continued)
(VCC = +3.3V, TA = +25°C, unless otherwise noted.)
Dual-Rate Fibre Channel Limiting Amplifiers
MAX3274/MAX3276
Pin Description
6
PIN
NAME
FUNCTION
1
IN+
Noninverted Data Input
2
IN-
Inverted Data Input
3, 7, 10
VCC
Supply Voltage
4
BWSEL
5
TEST
6
SQUELCH
8, 13, 16
GND
9
TH
Bandwidth Select Pin. When BWSEL is set to a TTL-low level or left open, a 4th-order Bessel
Thompson filter suppresses relaxation oscillations from legacy CD laser transmitters. Connect
BWSEL to a TTL-high for operation above 1.0625Gbps.
Test Pin Should Be Connected to Ground
Squelch Input. The squelch function is disabled when SQUELCH is set to a TTL-low. When
SQUELCH is set to a TTL-high level, and LOS is asserted, the data outputs (OUT+ and OUT-) are
forced to static levels.
Supply Ground
Loss-of-Signal Threshold. A resistor connected from this pin to ground sets the input signal level at
which the loss-of-signal (LOS) outputs are asserted. See the Typical Operating Characteristics and
Design Procedure sections for more information.
11
OUT-
Inverted Data Output
12
OUT+
Noninverted Data Output
14
LOS
Inverted Loss-of-Signal Output. LOS is high when the level of the input signal is above the preset
threshold set by the TH pin. LOS is asserted low when the input signal level drops below the
threshold.
15
LOS
Loss-of-Signal Output. LOS is low when the level of the input signal is above the preset threshold
set by the TH pin. LOS is asserted high when the input signal level drops below the threshold.
EP
Exposed
Pad
Ground. The exposed paddle must be soldered to the circuit board ground for proper thermal and
electrical performance.
_______________________________________________________________________________________
Dual-Rate Fibre Channel Limiting Amplifiers
Input Buffer
The MAX3274/MAX3276 input buffer (Figure 3) provides
a 100Ω input impedance between IN+ and IN-. DCcoupling the inputs is not recommended; doing so prevents proper functioning of DC offset correction circuitry.
Signal Detect and Loss-of-Signal
An RMS signal detector looks at the signal from the
input buffer and compares it to a threshold set by a
resistor at pin TH. The status of the signal-detect information appears at the LOS outputs. These are opencollector outputs and require external pullup resistors
connected to the host power supply. The LOS outputs
are high impedance when the power supply to the
MAX3274/MAX3276 is 0V. ESD protection on the dualrate limiting amplifiers’ LOS outputs do not forward-bias
when the power supply of the MAX3274/MAX3276 is 0V
or below the host power supply.
Offset Correction
A low-frequency feedback loop is integrated into the
limiting amplifiers to reduce input offset and thereby
minimize duty-cycle distortion. For proper operation,
the input must be externally AC-coupled. The offset
correction circuit has been optimized for the Fibre
Channel character set, disparity rules, and 8b/10b data
encoding. This dictates an average data input mark
density of 50% and a maximum run length of five consecutive identical digits (CID) or bits.
CML Output Buffer
The MAX3274/MAX3276 CML outputs (Figure 4) provide
high tolerance to impedance mismatches and inductive
connectors. The output current is approximately 24mA
for the MAX3274 and 18mA for the MAX3276. The
squelch function is enabled when SQUELCH is set to a
TTL-high level or connected to VCC. The squelch function holds OUT+ and OUT- at a static voltage when the
input signal level drops below the loss-of-signal threshold. The output buffer can be AC- or DC-coupled to the
load. For DC operation, the load must be terminated to
VCC of the MAX3274/MAX3276.
VDEASSERT
VIN
50
VASSERT
LOS RESPONSE TIME
LOS, LOS
OUTPUTS
50
Figure 1. LOS Response Time
Design Procedure
Programming the LOS Assert Threshold
External resistor R TH programs the loss-of-signal
threshold. See the LOS Threshold vs. RTH graph in the
Typical Operating Characteristics section. RTH can be
estimated by RTH = 15 / VTH, where VTH is the peak-topeak differential input assert level.
Selecting the AC-Coupling Capacitors
The input and output AC-coupling capacitors (C IN ,
COUT) should be selected to minimize the receiver’s
deterministic jitter. Lowering the low-frequency cutoff
reduces deterministic jitter. The low-frequency cutoff
can be determined by:
fC =
1
2π × C × (RL + RS )
where RL is the single-ended load impedance and RS
is the single-ended source impedance. CIN, COUT =
0.1µF is recommended.
Applications Information
Optical Hysteresis
In an optical receiver, the electrical power change at
the limiting amplifier is 2 times the optical power
change. For example, if a receiver’s optical input power
(χ) increases by a factor of 2, and the preamplifier is
linear, then the voltage input to the limiting amplifier
also increases by a factor of 2. The optical power
change is 10log (2χ/χ) = 10log(2) = 3dB. At the limiting
amplifier, the electrical power change is:
2
2VIN ) / RIN
(
10log
VIN2 / RIN
( )
= 10log 22 = 20log (2) = 6dB
The typical voltage hysteresis for the MAX3274/ MAX3276
is 6dB. This provides an optical hysteresis of 3dB.
_______________________________________________________________________________________
7
MAX3274/MAX3276
Detailed Description
Figure 2 is a functional diagram of the MAX3274/
MAX3276 limiting amplifiers. Typical gain is 46dB. A
linear input drives a bandwidth selector. An offset correction loop with lowpass filtering ensures low deterministic jitter. An integrated RMS signal detector
monitors for loss-of-signal conditions. The output buffer
provides a limited CML output signal.
MAX3274/MAX3276
Dual-Rate Fibre Channel Limiting Amplifiers
OFFSET
CORRECTION
LPF
4TH-ORDER
LP FILTER
IN+
0
OUT+
OUT-
1
INBWSEL
RMS
SIGNAL
DETECT
TH
LOS
SQUELCH
LOS
Figure 2. Functional Diagram of the MAX3274/MAX3276 Limiting Amplifier
VCC
VCC
50Ω
50Ω
50Ω/75Ω
50Ω/75Ω
IN+
OUT+
OUT-
INDATA
ESD
STRUCTURES
ESD
STRUCTURES
Figure 3. Input Circuit
8
Figure 4. CML Output Circuit
_______________________________________________________________________________________
Dual-Rate Fibre Channel Limiting Amplifiers
4
GND
LOS
LOS
GND
16
15
14
13
DEVICE COUNT: 2855
TRANSISTOR COUNT: 1310
PROCESS: BiPOLAR: SiGe, SOI
12
OUT+
11
OUT-
10
VCC
9
TH
EXPOSED PAD
8
BWSEL
GND
3
7
VCC
MAX3274
MAX3276
VCC
2
6
IN-
SQUELCH
1
5
IN+
TEST
TOP VIEW
Chip Information
TOP VIEW
16-PIN QFN
(4mm x 4mm)
_______________________________________________________________________________________
9
MAX3274/MAX3276
Pin Configuration
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
12,16,20, 24L QFN.EPS
MAX3274/MAX3276
Dual-Rate Fibre Channel Limiting Amplifiers
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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Printed USA
is a registered trademark of Maxim Integrated Products.