ST2329 2-bit dual supply level translator without direction control pin Features ■ 90 Mbps (max) data rate when driven by a totem pole driver ■ 8 Mbps (max) data rate when driven by an open drain pole driver ■ Bidirectional level translation without direction control pin ■ Wide VL voltage range of 1.65 to 3.6 V ■ Wide VCC voltage range of 1.80 to 5.5 V ■ Power down mode feature – when either supply is off, all I/Os are in high impedance ■ Low quiescent current (max 12 µA) ■ Able to be driven by totem pole and open drain drivers ■ 5.5 V tolerant enable pin ■ ESD performance on all pins: ±2 kV HBM ■ Small package and footprint QFN10L (1.8 x 1.4 mm) package Description Applications ■ Low voltage system level translation ■ Mobile phones and other mobile devices ■ I2C level translation ■ UART level translation Table 1. May 2008 QFN10L (1.8 x 1.4 mm) The ST2329 is a 2-bit dual supply level translator which provides the level shifting capability to allow data transfer in a multi-voltage system. Externally applied voltages, VCC and VL, set the logic levels on either side of the device. It utilizes transmission gate-based design that allows bidirectional level translation without a control pin. The ST2329 accepts a VL from 1.65 to 3.6 V and VCC from 1.80 to 5.5 V, making it ideal for data transfer between low-voltage ASICs/PLD and higher voltage systems. This device has a tri-state output mode which can be used to disable all I/Os. The ST2329 supports power down mode when VCC is grounded/floating and the device is disabled via the OE pin. Device summary Order code Package Packaging ST2329QTR QFN10L (1.8 x 1.4 mm) Tape and reel (3000 parts per reel) Rev 4 1/21 www.st.com 21 Contents ST2329 Contents 1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Device block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Supplementary notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 3.1 Driver requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 Load driving capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.3 Power off feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.4 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.1 5 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5.1 AC characteristics (device driven by open drain driver) . . . . . . . . . . . . . . . 9 5.2 AC characteristics (device driven by totem pole driver ) . . . . . . . . . . . . . 11 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2/21 ST2329 Pin settings 1 Pin settings 1.1 Pin connection Figure 1. Pin connection (top through view) V L V 10 CC 9 I/O VL1 1 8 I/O I/O 2 7 I/O VL2 OE 3 4 5 NC NC 6 VCC1 VCC2 GND CS00011 1.2 Pin description Table 2. Pin description Pin number Symbol Name and function 1 I/OVL1 Data input/output 2 I/OVL2 Data input/output 3 OE Output enable 4 NC No connection 5 NC No connection 6 GND Ground 7 I/OVCC2 Data input/output 8 I/OVCC1 Data input/output 9 VCC Supply voltage 10 VL Supply voltage 3/21 Device block diagrams 2 ST2329 Device block diagrams Figure 2. ST2329 block diagram VL ST2329 EN OE VCC VL I/O VL I/O VCC GND GND = one-shot circuit * ST2329 has 2 channels. For simplicity, the above diagram shows only 1 channel. * When OE is Low, all I/Os are in High-Impedance mode. Figure 3. Application block diagram VL V CC 0.1 μF 0.1 μF 1 μF VL System Controller VL VL VL I/O VL1 I/O VCC1 I/O VL2 I/O VCC2 OE 4/21 V CC VCC VCC VCC System Controller ST2329 Supplementary notes 3 Supplementary notes 3.1 Driver requirement The ST2329 may be driven by an open drain or totem pole driver and the nature of the device’s output is “open drain”. It must not be used to drive a pull-down resistor since the impedance of the output at HIGH state depends on the pull-up resistor placed at the I/Os. As the device has pull-up resistors on both the I/OVCC and I/OVL ports, the user needs to ensure that the driver is able to sink the required amount of current. For example, if the settings are VCC = 5.5 V, VL = 4.3 V and the pull-up resistor is 10 kΩ, then the driver must be able to sink at least (5.5 V/10 kΩ) + (4.3 V /10 kΩ) = 1 mA and still meet the VIL requirements of the ST2329. 3.2 Load driving capability To support the open drain system, the one-shot transistor is turned on only during state transition at the output side. When it drives a high state, after the one-shot transistor is turned off, only the pull-up resistor is able to maintain the state. In this case, the resistive load is not recommended. During the translation from VCC side to VL side, the oscillation might be triggered when the signal is reflected back as a glitch. This is caused by the architecture of the device (autodirection). When using the ST2329, care need to be taken in the PCB data-track design and output loading. It is recommended that the load is less than 25 pf. 3.3 Power off feature In some applications where it might be required to turn off one of the power supplies powering up the level translator, the user may turn off the VCC only when the OE pin is low (device is disabled). There will be no current consumption in VL due to floating gates or other causes, and the I/Os are in a high-impedance state in this mode. 3.4 Truth table Table 3. Truth table Enable OE H (1) Bidirectional Input/Output I/OVCC H H(1) L (2) L Z (3) I/OVL H(1) L Z(3) 1. High level VL power supply referred 2. High level VCC power supply referred 3. Z = high impedance 5/21 Maximum rating 4 ST2329 Maximum rating Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4. Absolute maximum ratings Symbol Parameter Value Unit VL Supply voltage -0.3 to 4.6 V VCC Supply voltage -0.3 to 6.5 V VOE DC control input voltage -0.3 to 6.5 V -0.3 to VL + 0.3 V -0.3 to VCC + 0.3 V DC input diode current -20 mA II/OVL DC output current ±25 mA II/OVCC DC output current ±258 mA 40 mA VI/OVL VI/OVCC IIK DC I/OVL input voltage (OE = GND or VL) DC I/OVCC input voltage (OE = GND or VL) ISCTOUT Short circuit duration, continuous PD Power dissipation(1) 500 mW TSTG Storage temperature -65 to 150 oC Lead temperature (10 seconds) 300 oC Electrostatic discharge protection (HBM) ±2 kV TL ESD 1. 500mW: 65 oC derated to 300 mW by 10W/oC: 65 oC to 85 oC 4.1 Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Typ Max Unit VL Supply voltage 1.65 3.6 V VCC(1) Supply voltage 1.8 5.5 V Input voltage (OE output enable pin, VL power supply referred) 0 3.6 V I/OVL voltage 0 VL V I/OVCC voltage 0 VCC V -40 85 oC 0 1 ns/V VOE VI/OVL VI/OVCC Top dt/dV Operating temperature Input rise and fall time (for 45 Mbps operation) 1. VCC must be greater than VL. 6/21 Min ST2329 Electrical characteristics 5 Electrical characteristics Table 6. DC characteristics (over recommended operating conditions unless otherwise noted. All typical values are at TA = 25 oC) Test conditions Symbol Value TA = 25 oC Parameter VL VIHL VILL VIHC VILC VIH-OE VIL-OE Low level input voltage (I/OVL) High level input voltage (I/OVCC) Low level input voltage (I/OVCC) High level input voltage (OE) Low level input voltage (OE) Typ Max Min 1.65 1.4 1.4 2.0 1.6 1.6 2.0 2.0 3.0 2.4 2.4 3.6 2.8 2.8 2.5 VL to 5.5 Max V 1.65 0.3 0.3 2.0 0.4 0.4 0.5 0.5 3.0 0.6 0.6 3.6 0.8 0.8 2.5 1.65 to VCC 1.65 2.5 Unit VCC Min High level input voltage (I/OVL) -40 to 85 oC VL to 5.5 1.8 1.6 1.6 2.5 2.3 2.3 3.0 2.7 2.7 3.6 3.3 3.3 4.3 3.5 3.5 5.5 4.2 4.2 3 - 5.5 V V 0.3 V 2.7 3.6 3.6 - 5.5 0.5 1.65 1.0 1.0 2.0 1.2 1.2 1.4 1.4 3.0 1.6 1.6 3.6 2.0 2.0 2.5 VL to 5.5 V 1.65 0.33 0.33 2.0 0.40 0.40 0.50 0.50 3.0 0.60 0.60 3.6 0.75 0.75 2.5 VL to 5.5 V 7/21 Electrical characteristics Table 6. ST2329 DC characteristics (over recommended operating conditions unless otherwise noted. All typical values are at TA = 25 oC) (continued) Test conditions Symbol Value TA = 25 oC Parameter VL -40 to 85 oC Unit VCC Min Typ Max Min Max VOLL Low level output voltage (I/OVL) IO = 1.0 mA 1.65 to VL to 5.5 3.6 I/OVCC ≤ 0.15 V 0.40 0.40 V VOLC Low level output voltage (I/OVCC) IO = 1.0 mA 1.65 to VL to 5.5 3.6 I/OVL ≤ 0.15 V 0.40 0.40 V IOE Control input leakage current (OE) V = GND or 1.65 to VL to 5.5 OE VL 3.6 ±0.1 ±0.1 µA IIO_LKG High impedance leakage current (I/OVL, I/OVCC) 1.65 to VL to 5.5 OE = GND 3.6 ±0.1 ±0.1 µA IQVCC Quiescent supply current VCC only pull-up 1.65 to VL to 5.5 resistor 3.6 connected to I/O 3 5 12 µA IQVL Quiescent supply current VL only pull-up 1.65 to VL to 5.5 resistor 3.6 connected to I/O 0.01 0.1 1 µA IZ-VCC High impedance quiescent supply current VCC OE = GND; 1.65 to VL to 5.5 only pull-up 3.6 resistor connected to I/O 3 5 12 µA IZ-VL High impedance quiescent supply current VL OE = GND; 1.65 to only pull-up VL to 5.5 3.6 resistor connected to I/O 0.01 0.1 1 µA 8/21 ST2329 Electrical characteristics 5.1 AC characteristics (device driven by open drain driver) Table 7. AC characteristics - test conditions: VL = 1.65 − 1.8 V (load CL = 15 pF; Rup = 4.7 kΩ; driver tr = tf ≤ 2 ns) over temperature range -40 °C to 85 °C VCC = 1.8 − 2.5 V Symbol VCC = 2.7 − 3.6 V Parameter Min Max Min Max VCC = 4.3 − 5.5 V Min Unit Max tRVCC Rise time I/OVCC 80 50 30 ns tFVCC Fall time I/OVCC 3 3 3 ns tRVL Rise time I/OVL 7 6 6 ns tFVL Fall time I/OVL 4 5 5 ns tPLH 5 5 5 ns tPHL 5 5 5 ns tPLH 5 5 5 ns tPHL 5 7 7 ns En 10 10 10 ns Dis 40 40 40 ns 1.6 2.5 4 MHz Propagation delay time tI/OVL-VCC I/OVL-LH to I/OVCC-LH I/OVL-HL to I/OVCC-HL Propagation delay time tI/OVCC-VL I/OVCC-LH to I/OVL-LH I/OVCC-HL to I/OVL-LH tPZL tPZH tPLZ tPHZ DR Output enable and disable time Data rate(1) 1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation not less than 30%. Table 8. AC characteristics - test conditions: VL = 2.5 −2.7 V (load CL = 15 pF; Rup = 4.7 kΩ; driver tr = tf ≤ 2 ns) over temperature range -40 °C to 85 °C VCC = 2.7 Symbol − 3.6 V VCC = 4.3 − 5.5 V Parameter Unit Min Max Min Max tRVCC Rise time I/OVCC 70 40 ns tFVCC Fall time I/OVCC 3 3 ns tRVL Rise time I/OVL 5 5 ns tFVL Fall time I/OVL 3 3 ns tPLH 2 2 ns tPHL 3 3 ns tPLH 3 3 ns tPHL 4 4 ns tI/OVL-VCC Propagation delay time I/OVL-LH to I/OVCC-LH I/OVL-HL to I/OVCC-HL tI/OVCC-VL Propagation delay time I/OVCC-LH to I/OVL-LH I/OVCC-HL to I/OVL-LH 9/21 Electrical characteristics Table 8. ST2329 AC characteristics - test conditions: VL = 2.5 −2.7 V (load CL = 15 pF; Rup = 4.7 kΩ; driver tr = tf ≤ 2 ns) over temperature range -40 °C to 85 °C VCC = 2.7 Symbol DR VCC = 4.3 − 5.5 V Unit Min tPZL tPZH tPLZ tPHZ − 3.6 V Parameter Output enable and disable time Data rate Max Min Max En 6 6 ns Dis 40 40 ns 2.5 3.2 MHz (1) 1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation not less than 30%. Table 9. AC characteristics - test conditions: VL = 2.7 − 3.6 V (load CL = 15 pF; Rup = 4.7 kΩ; driver tr = tf ≤ 2 ns) over temperature range -40 °C to 85 °C VCC = 4.3 − 5.5 V Symbol Parameter Unit Min Max tRVCC Rise time I/OVCC 55 ns tFVCC Fall time I/OVCC 3 ns tRVL Rise time I/OVL 4 ns tFVL Fall time I/OVL 3 ns Propagation delay time I/OVL-LH to I/OVCC-LH I/OVL-HL to I/OVCC-HL tPLH 2 ns tI/OVL-VCC tPHL 4 ns tPLH 4 ns tI/OVCC-VL Propagation delay time I/OVCC-LH to I/OVL-LH I/OVCC-HL to I/OVL-HL tPHL 4 ns tPZL tPZH tPLZ tPHZ En 6 ns Output enable and disable time Dis 40 ns 2.8 MHz DR Data rate(1) 1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation not less than 30%. 10/21 ST2329 Electrical characteristics 5.2 AC characteristics (device driven by totem pole driver ) Table 10. AC characteristics (test conditions: VL = 1.65 − 1.8 V (load CL = 15 pF; Rup = 10 kΩ; driver tr=tf ≤ 2 ns) over temperature range -40 °C to 85 °C) VCCB = 1.8 – 2.5 V VCCB = 2.7 – 3.6 V VCCB = 4.3 – 5.5 V Symbol Parameter Unit Min Max Min Max Min Max tRVCC Rise time I/OVCC 7 3 4 ns tFVCC Fall time I/OVCC 7 3 3 ns tRVL Rise time I/OVL 6 4 5 ns tFVL Fall time I/OVL 4 4 4 ns tPLH 6 5 4 ns tPHL 5 5 5 ns tPLH 6 5 4 ns tPHL 4.5 5.2 7 ns En 10 10 10 ns Dis 40 40 40 ns 12 32 32 MHz tI/OVLVCC tI/OVCCVL Propagation delay time I/OVL-LH to I/OVCC-LH I/OVL-HL to I/OVCC-HL Propagation delay time I/OVCC-LH to I/OVL-LH I/OVCC-HL to I/OVL-HL tPZL tPZH Output enable and tPLZ tPHZ disable time DR Data rate(1) 1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation not less than 30%. Table 11. AC characteristics (test conditions: VL = 2.5 − 2.7 V (load CL = 15 pF; Rup = 10 kΩ; driver tr = tf ≤2 ns) over temperature range -40 °C to 85 °C) VCC = 2.7 Symbol − 3.6 V VCC = 4.3 − 5.5 V Parameter Unit Min Max Min Max tRVCC Rise time I/OVCC 6 4 ns tFVCC Fall time I/OVCC 3 3 ns tRVL Rise time I/OVL 5 5 ns tFVL Fall time I/OVL 3 3 ns Propagation delay time I/OVCC-LH to I/OVL-LH I/OVCC-HL to I/OVL-HL tPLH 3.5 3 tI/OVL-VCC tPHL 4 4 tPLH 2.5 2.1 tI/OVCC-VL Propagation delay time I/OVCC-LH to I/OVL-LH I/OVCC-HL to I/OVL-HL tPHL 4 ns ns ns ns 4 ns 11/21 Electrical characteristics Table 11. ST2329 AC characteristics (test conditions: VL = 2.5 − 2.7 V (load CL = 15 pF; Rup = 10 kΩ; driver tr = tf ≤2 ns) over temperature range -40 °C to 85 °C) (continued) VCC = 2.7 Symbol − 3.6 V VCC = 4.3 − 5.5 V Parameter Unit Min tPZL tPZH tPLZ tPHZ Output enable and disable time Min Max En 6 6 ns Dis 40 40 ns 45 45 MHz (1) Data rate DR Max 1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation not less than 30%. Table 12. AC characteristics (test conditions: VL = 2.7 − 3.6 V (load CL = 15 pF; Rup = 10 kΩ; driver tr = tf ≤ 2 ns) over temperature range -40 °C to 85 °C) VCC = 4.3 − 5.5 V Symbol Parameter Unit Min Max tRVCC Rise time I/OVCC 5 ns tFVCC Fall time I/OVCC 3 ns tRVL Rise time I/OVL 4 ns tFVL Fall time I/OVL 3 ns tPLH 2.5 ns tPHL 4 ns tPLH 2 tPHL 4 tI/OVL-VCC Propagation delay time I/OVL-LH to I/OVCC-LH I/OVL-HL to I/OVCC-HL tI/OVCC-VL Propagation delay time I/OVCC-LH to I/OVL-LH I/OVCC-HL to I/OVL-HL ns tPZL tPZH tPLZ tPHZ DR ns Output enable and disable En time Dis Data rate(1) ns ns 6 ns 40 ns 45 MHz 1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation not less than 30%. 12/21 ST2329 Electrical characteristics Figure 4. Test circuit VL VCC VL VCC 10 kΩ 10 kΩ Pulse generator VL VCC OPEN GND D.U.T CL CS14021 Table 13. Test circuit switches Switch Test tPLH, tPHL Driving I/OVL Driving I/OVCC Open drain driving Open Open Open 13/21 Waveforms 6 ST2329 Waveforms Table 14. Waveform symbol value Driving I/OVCC Driving I/OVL Symbol 1.8 V ≤ VL ≤ VCC ≤ 2.5 V 3.3 V ≤ VL ≤ VCC ≤ 5.0 V 1.8 V ≤ VL ≤ VCC ≤ 2.5 V 3.3V ≤ VL ≤ VCC ≤ 5.0 V VIH VL VL VCC VCC VIM 50% VL 50% VL 50% VCC 50% VCC VOM 50% VCC 50% VCC 50% VL 50% VL VX VOL +0.15V VOL +0.3V VOL +0.15V VOL +0.3V VY VOH -0.15V VOH -0.3V VOH -0.15V VOH -0.3V Figure 5. 14/21 Waveform - propagation delay (f = 1 MHz; 50% duty cycle) ST2329 Waveforms Figure 6. Waveform - output enable and disable time (f = 1 MHz; 50% duty cycle) 15/21 Package mechanical data 7 ST2329 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 7. QFN10L (1.8 x 1.4 mm) package outline 7936408 Rev.D 16/21 ST2329 Package mechanical data Table 15. QFN10L (1.8 x 1.4 mm) mechanical data Millimeters Symbol Figure 8. Typ Min Max A 0.50 0.45 0.55 A1 0.02 0 0.05 A3 0.127 b 0.20 0.15 0.25 D 1.80 1.75 1.85 E 1.40 1.35 1.45 e 0.40 L 0.40 0.35 0.45 QFN10L (1.8 x 1.4 mm) footprint recommendation 17/21 Package mechanical data 18/21 Figure 9. QFN10L (1.8 x 1.4 mm) carrier tape Figure 10. QFN10L (1.8 x 1.4 mm) reel information - back view ST2329 ST2329 Package mechanical data Figure 11. QFN10L (1.8 x 1.4 mm) reel information - front side 19/21 Revision history 8 ST2329 Revision history Table 16. 20/21 Document revision history Date Revision Changes 15-May-2007 1 Initial release 01-Oct-2007 2 Modified title, added pin description and complete electrical characteristics 31-Oct-2007 3 Updated Figure 4: Test circuit on page 13, Figure 7: QFN10L (1.8 x 1.4 mm) package outline on page 16 and Figure 8: QFN10L (1.8 x 1.4 mm) footprint recommendation on page 17 , minor text changes. 07-May-2008 4 Updated data rate values and added paragraph on load driving capability (Section 3.2). ST2329 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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