SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
Features
Product List
z
SM8954AL25, 25MHz 16KB internal flash MCU
SM8954AC25, 25MHz 16KB internal flash MCU
SM8954AC40, 40MHz 16KB internal flash MCU
z
z
Working Voltage: 3.0V ~ 3.6V For L Version.
4.5V ~ 5.5V For C Version.
General 8052 family compatible
12 clocks per machine cycle
16K byte on chip program flash
1024 byte on-chip data RAM
Three 16 bit Timers/Counters
One Watch Dog Timer
Four 8-bit I/O ports for PDIP package
Four 8-bit I/O ports + one 4-bit I/O ports for
PLCC or QFP package
Full duplex serial channel
Bit operation instruction
Industrial Level
8-bit Unsigned Division
8-bit Unsigned Multiply
BCD arithmetic
Direct Addressing
Indirect Addressing
Nested Interrupt
Two priority level interrupt
A serial I/O port
Power save modes: Idle mode and Power
down mode
Code protection function
Low EMI (inhibit ALE)
z
5 channel SPWM function with P1.3 ~ P1.7
z
z
z
Description
z
z
The SM8954A series product is an 8 - bit single chip z
micro controller with 16KB on-chip flash and 1K byte z
RAM embedded. It is a derivative of the 8052 micro
z
controller family. It has 5-channel SPWM build-in.
With its hardware features and powerful instruction set, z
it’s straight forward to make it a versatile and cost
z
effective controller for those applications which
z
demand up to 16 I/O pins for PDIP package or up to 36 z
I/O pins for PLCC/QFP package, or applications which z
need up to 16K byte flash memory for program data. z
To program the on-chip flash memory, a commercial z
writer is available to do it in parallel programming
z
method.
z
z
z
z
Ordering Information
yymmv
SM8954AihhkL
yy: year, ww: month
v: version identifier{ , A, B,…}
i: process identifier {L=3.0V~3.6V,C=4.5V~ 5.5V}
hh: working clock in MHz {25, 40}
k: package type postfix {as below table}
L:PB Free identifier
{No text is Non-PB Free，”P”is PB Free}
Postfix
Package
P
J
Q
40L PDIP
44L PLCC
44L QFP
Pin / Pad
Configuration
Page 2
Page 2
Page 2
Taiwan
6F, No.10-2 Li- Hsin 1st Road ,
Science-based Industrial Park,
Hsinchu, Taiwan 30078
Dimension
Page 20
Page 21
Page 22
TEL: 886-3-567-1820
886-3-567-1880
FAX: 886-3-567-1891
886-3-567-1894
Specifications subject to change without notice contact your sales representatives for the most recent information.
1
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
Pin Configuration
Specifications subject to change without notice contact your sales representatives for the most recent information.
2
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
Block Diagram
Specifications subject to change without notice contact your sales representatives for the most recent information.
3
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
Pin Description
40L
PDIP
Pin#
44L
QFP
Pin#
44L
PLCC
Pin#
Symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
40
41
42
43
44
1
2
3
4
5
7
8
9
10
11
12
13
14
15
16
18
19
20
21
22
23
24
25
26
27
29
30
31
32
33
34
35
36
37
38
17
28
39
6
2
3
4
5
6
7
8
9
10
11
13
14
15
16
17
18
19
20
21
22
24
25
26
27
28
29
30
31
32
33
35
36
37
38
39
40
41
42
43
44
23
34
1
12
P1.0/T2
P1.1/T2EX
P1.2
P1.3/SPWM0
P1.4/SPWM1
P1.5/SPWM2
P1.6/SPWM3
P1.7/SPWM4
RES
P3.0/RXD
P3.1/TXD
P3.2/#INT0
P3.3/#INT1
P3.4/T0
P3.5/T1
P3.6/#WR
P3.7/#RD
XTAL2
XTAL1
VSS
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
#PSEN
ALE
#EA
P0.7/AD7
P0.6/AD6
P0.5/AD5
P0.4/AD4
P0.3/AD3
P0.2/AD2
P0.1/AD1
P0.0/AD0
VDD
P4.0
P4.1
P4.2
P4.3
Active
H
L/L/-
L
I/O
Names
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
o
i
bit 0 of port 1 & timer 2 clock out
bit 1 of port 1 & timer 2 control
bit 2 of port 1
bit 3 of port 1 & SPWM channel 0
bit 4 of port 1 & SPWM channel 1
bit 5 of port 1 & SPWM channel 2
bit 6 of port 1 & SPWM channel 3
bit 7 of port 1 & SPWM channel 4
Reset
bit 0 of port 3 & Receiver data
bit 1 of port 3 & Transmit data
bit 2 of port 3 & low true interrupt 0
bit 3 of port 3 & low true interrupt 1
bit 4 of port 3 & Timer 0
bit 5 of port 3 & Timer 1
bit 6 of port 3 & ext. memory write
bit 7 of port 3 & ext. memory Read
Crystal out
Crystal in
Sink Voltage, Ground
bit 0 of port 2 & bit 8 of ext. memory address
bit 1 of port 2 & bit 9 of ext. memory address
bit 2 of port 2 & bit 10 of ext. memory address
bit 3 of port 2 & bit 11 of ext. memory address
bit 4 of port 2 & bit 12 of ext. memory address
bit 5 of port 2 & bit 13 of ext. memory address
bit 6 of port 2 & bit 14 of ext. memory address
bit 7 of port 2 & bit 15 of ext. memory address
program storage enable
address latch enable
External access
bit 7 of port 0 & data/address bit 7 of ext. memory
bit 6 of port 0 & data/address bit 6 of ext. memory
bit 5 of port 0 & data/address bit 5 of ext. memory
bit 4 of port 0 & data/address bit 4 of ext. memory
bit 3 of port 0 & data/address bit 3 of ext. memory
bit 2 of port 0 & data/address bit 2 of ext. memory
bit 1 of port 0 & data/address bit 1 of ext. memory
bit 0 of port 0 & data/address bit 0 of ext. memory
Drive Voltage, +5 Vcc
bit 0 of Port 4
bit 1 of Port 4
bit 2 of Port 4
bit 3 of port 4
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
o
o
I
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
Specifications subject to change without notice contact your sales representatives for the most recent information.
4
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
Special Function Register (SFR)
The address $80 to $FF can be accessed by direct addressing mode only.
Address $80 to $FF is SFR area.
The following table lists the SFRs which are identical to general 8052, as well as SM8954A Extension SFRs.
Special Function Register (SFR) Memory Map
$F8
$F0
$E8
$E0
$D8
$D0
$C8
$C0
$B8
$B0
$A8
$A0
$98
$90
$88
$80
$FF
B
ACC
P4
PSW
T2CON
IP
P3
IE
P2
SCON
P1
TCON
P0
T2MOD
RCAP2L
RCAP2H
TL2
TH2
SCONF
SBUF
TMOD
SP
SPWMD4
SPWMD0
SPWMC
P1CON
TL0
DPL
TL1
DPH
TH0
SPWMD1
SPWMD2
TH1
RCON
SPWMD3
WDTC
WDTKEY
PCON
$F7
$EF
$E7
$DF
$D7
$CF
$C7
$BF
$B7
$AF
$A7
$9F
$97
$8F
$87
Note: The text of SFRs with bold type characters are Extension Special Function Registers f o r SM8954A
Addr
SFR
Reset
85H
RCON
00H
7
6
5
4
3
2
1
0
RAMS1
RAMS0
WDTKEY2
WDTKEY1
WDTKEY0
PS2
PS1
PS0
97H
WDTKEY
00H
WDTKEY7
WDTKEY6
WDTKEY5
WDTKEY4
WDTKEY3
9BH
P1CON
00000***
SPWME4
SPWME3
SPWME2
SPWME1
SPWME0
9FH
WDTC
0*0**000
WDTE
A3H
SPWMC
******00
SPFS1
SPFS0
A4H
SPWMD0
00H
SPWMD04
SPWMD03
SPWMD02
SPWMD01
SPWMD00
BRM02
BRM01
BRM00
A5H
SPWMD1
00H
SPWMD14
SPWMD13
SPWMD12
SPWMD11
SPWMD10
BRM12
BRM11
BRM10
A6H
SPWMD2
00H
SPWMD24
SPWMD23
SPWMD22
SPWMD21
SPWMD20
BRM22
BRM21
BRM20
A7H
SPWMD3
00H
SPWMD34
SPWMD33
SPWMD32
SPWMD31
SPWMD30
BRM32
BRM31
BRM30
ACH
SPWMD4
00H
SPWMD44
SPWMD43
SPWMD42
SPWMD41
SPWMD40
BRM42
BRM41
BRM40
BFH
SCONF
0*****00
WDR
OME
ALEI
C8H
T2CON
00H
TF2
C/T2
CP/RL2
C9H
T2MOD
******00
T2OE
DCEN
D8H
P4
****1111
P4.1
P4.0
CLEAR
EXF2
RCLK
TCLK
EXEN2
TR2
P4.3
P4.2
Specifications subject to change without notice contact your sales representatives for the most recent information.
5
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
Extension Function Description
1. Memory Structure
The SM8954A is the general 8052 hardware core as a single chip micro controller. Its memory structure follows
general 8052 structure.
1.1 Program Memory
The SM8954A has 16K byte on-chip flash memory which used as general program memory. The address range for the
16K byte is $0000 to $3FFF.
Note: The single flash block address structure for doing as well as program ROM flash.
1.2 Data Memory
The SM8954A has 1K bytes on-chip RAM, 256 bytes of it are the same as general 8052 internal memory structure
while the expanded 768 bytes on-chip RAM can be accessed by external memory addressing method (by instruction
MOVX),
Specifications subject to change without notice contact your sales representatives for the most recent information.
6
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
1.2.1 Data Memory - Lower 128 byte ($00 to $7F)
Data Memory $00 to $FF is the same as 8052.
The address $00 to $7F can be accessed by direct and indirect addressing modes.
Address $00 to $1F is register area.
Address $20 to $2F is memory bit area.
Address $30 to $7F is for general memory area.
1.2.2 Data Memory - Higher 128 byte ($80 to $FF)
The address $80 to $FF can be accessed by indirect addressing mode or by bank mapping direct addressing
mode. Address $80 to $FF is data area.
1.2.3 Data Memory - Expanded 768bytes ($0000 to $02FF)
From external address $0000 to $02FF is the on-chip expanded RAM area, total 768 bytes. This area can be accessed
by external direct addressing mode (by instruction MOVX):
Specifications subject to change without notice contact your sales representatives for the most recent information.
7
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
Internal RAM Control Register (RCON, $85)
bit-7
bit-0
Unused
Unused
Unused
Unused
Unused
Unused
RAMS1
RAMS0
Read / Write:
-
-
-
-
-
-
R/W
R/W
Reset value:
*
*
*
*
*
*
0
0
SM8954A has 768 byte on-chip RAM which can be accessed by external memory addressing method only. (By
instruction MOVX). The address space of instruction MOVX @Rn is determined by bit 1 and bit 0 (RAMS1, RAMS0)
of RCON. The default setting of RAMS1, RAMS0 bits is 00 (page0).
RAMS1
RAMS0
MOVX @Ri i=0,1 mapping to expended RAM address
0
0
$0000 ~ $00FF
0
1
$0100 ~ $01FF
1
0
$0200 ~ $02FF
The port 0, port2, port3.6 and port3.7 can be used as general purpose I/O pin while port0 is open-drain structure.
System Control Register (SCONF, $BF)
bit-7
bit-0
WDR
Unused
Unused
Unused
Unused
Unused
OME
ALEI
Read / Write:
R/W
-
-
-
-
-
R/W
R/W
Reset value:
0
*
*
*
*
*
0
0
WDR : Watch Dog Timer Reset. When system reset by Watch Dog Timer overflow. WDR will be set to 1, The bit 7
(WDR) of SCONF is Watch Dog Timer Reset bit. It will be set to 1 when reset signal generated by WDT
overflow. User should check WDR bit whenever un-predicted reset happened.
OME : 768 bytes on-chip RAM enable bit. The bit 1 (OME) of SCONF can enable or disable the on-chip expanded
768 byte RAM. The default setting of OME bit is 0 (disable).
ALEI : ALE output inhibit bit, to reduce EMI. Setting bit 0 (ALEI) of SCONF can inhibit the clock signal in Fosc/6Hz
output to the ALE pin.
Specifications subject to change without notice contact your sales representatives for the most recent information.
8
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
1.3 I/O Pin Configuration
The ports 1, 2 and 3 of standard 8051 have internal pull-up resistor, and port 0 has open-drain outputs. Each I/O pin
can be used independently as an input or an output. For I/O ports to be used as an input pin, the port bit latch must
contain a ‘1’ which turns off the output driver FET. Then for port 1, 2 and 3 port pin is pulled high by a weak internal
pull-up, and can be pulled low by an external source. The port 0 has open-drain outputs which means its pull-ups are
not active during normal port operation. Writing ‘1’ to the port 0 bit latch will causing bit floating so that it can be used as
a high-impedance input.
The port 4 used as GPIO will has the same function as port 1, 2 and 3.
2. Port 4 for PLCC or QFP package :
The bit addressable port 4 is available with PLCC or QFP package. The port 4 has only 4 pins and its port address is
located at 0D8H. The function of port 4 is the same as the function of port 1, port 2 and port 3.
Port4 (P4, $D8)
bit-7
bit-0
Unused
Unused
Unused
Unused
P4.3
P4.2
P4.1
P4.0
Read / Write:
-
-
-
-
R/W
R/W
R/W
R/W
Reset value:
*
*
*
*
1
1
1
1
The bit 3, bit 2, bit 1, bit 0 output the setting to pin P4.3, P4.2, P4.1, P4.0 respectively.
3.Watch Dog Timer
The Watch Dog Timer (WDT) is a 16-bit free-running counter that generate reset signal if the counter overflows. The
WDT is useful for systems which are susceptible to noise, power glitches, or electronics discharge which causing
software dead loop or runaway. The WDT function can help user software recover from abnormal software condition.
The WDT is different from Timer0, Timer1 and Timer2 of general 8052. To prevent a WDT reset can be done by
software periodically clearing the WDT counter. User should check WDR bit of SCONF register whenever un-predicted
reset happened
The purpose of the secure procedure is to prevent the WDTC value from being changed when system runaway.
Specifications subject to change without notice contact your sales representatives for the most recent information.
9
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
There is a 250KHz RC oscillator embedded in chip. Set WDTE = “1” will enable the RC oscillator and the frequency
is independent to the system frequency.
To enable the WDT is done by setting 1 to the bit 7 (WDTE) of WDTC. After WDTE set to 1, the 16-bit counter starts to
count with the RC oscillator. It will generate a reset signal when overflows. The WDTE bit will be cleared to 0
automatically when SM8958A been reset, either hardware reset or WDT reset.
To reset the WDT is done by setting 1 to the CLEAR bit of WDTC before the counter overflow. This will clear the
content of the 16-bit counter and let the counter re-start to count from the beginning.
3.1 Watch Dog Timer Registers:
Watch Dog Timer Registers - WDT Control Register (WDTC, $9F)
bit-7
bit-0
WDTE
R
Clear
Unused
Unused
PS2
PS1
PS0
Read / Write:
R/W
-
R/W
-
-
R/W
R/W
R/W
Reset value:
0
*
0
*
*
0
0
0
WDTE : Watch Dog Timer enable bit
CLEAR : Watch Dog Timer reset bit
PS[2:0] : Overflow period select bits
PS [2:0]
Overflow Period (ms)
000
2.048
001
4.096
010
8.192
011
16.384
100
32.768
101
65.536
110
131.072
111
262.144
Watch Dog Key Register - (WDTKEY, $97H)
bit-7
bit-0
Read / Write:
WDT
KEY7
R/W
WDT
KEY6
R/W
WDT
KEY5
R/W
WDT
KEY4
R/W
WDT
KEY3
R/W
WDT
KEY2
R/W
WDT
KEY1
R/W
WDT
KEY0
R/W
Reset value:
0
0
0
0
0
0
0
0
Specifications subject to change without notice contact your sales representatives for the most recent information.
10
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
By default, the WDTC is read only. User need to write values 1EH, E1H sequentially to the WDTKEY($97H) register to
enable the WDTC write attribute, That is
MOV WDTKEY, # 1EH
MOV WDTKEY, # 0E1H
When WDTC is set, user need to write another values E1H, 1EH sequentially to the WDTKEY($97H) register to
disable the WDTC write attribute, That is
MOV WDTKEY, # 0E1H
MOV WDTKEY, # 1EH
Watch Dog Timer Register - System Control Register (SCONF, $BF)
bit-7
bit-0
WDR
Unused
Unused
Unused
Unused
Unused
OME
ALEI
Read / Write:
R/W
-
-
-
-
-
R/W
R/W
Reset value:
0
*
*
*
*
*
0
0
The bit 7 (WDR) of SCONF is Watch Dog Timer Reset bit. It will be set to 1 when reset signal generated by WDT
overflow. User should check WDR bit whenever un-predicted reset happened
4. Reduce EMI Function
The SM8954A allows user to reduce the EMI emission by setting 1 to the bit 0 (ALEI) of SCONF register. This function
will inhibit the clock signal in Fosc/6Hz output to the ALE pin.
5. Specific Pulse Width Modulation (SPWM)
The Specific Pulse Width Modulation (SPWM) module contain 1 kind of PWM sub module: SPWM (Specific PWM).
SPWM has five 8-bit channels.
5.1 SPWM Function Description:
The 8-bit SPWM channel is composed of an 8-bit register which contains a 5-bit SPWM in MSB portion and a 3-bit
binary rate multiplier (BRM) in LSB portion. The value programmed in the 5-bit SPWM portion will determine the pulse
length of the output. The 3-bit BRM portion will generate and insert certain narrow pulses among an 8-SPWM-cycle
frame. The number of pulses generated is equal to the number programmed in the 3-bit BRM portion. The usage of the
BRM is to generate equivalent 8-bit resolution SPWM type DAC with reasonably high repetition rate through 5-bit
SPWM clock speed. The SPFS[1:0] settings of SPWMC ($A3) register are dividend of Fosc to be SPWM clock,
Fosc/2^(SPFS[1:0]+1). The SPWM output cycle frame repetition rate (frequency) equals (SPWM clock)/32 which is
[Fosc/2^(SPFS[1:0]+1)]/32.
Specifications subject to change without notice contact your sales representatives for the most recent information.
11
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
5.2 SPWM Registers - P1CON, SPWMC, SPWMD[4:0]
SPWM Registers - Port1 Configuration Register (P1CON, $9B)
bit-7
bit-0
SPWME4
SPWME3
SPWME2
SPWME1
SPWME0
Unused
Unused
Unused
Read / Write:
R/W
R/W
R/W
R/W
R/W
-
-
-
Reset value:
0
0
0
0
0
*
*
*
SPWME[4:0] : When the bit set to one, the corresponding SPWM pin is active as SPWM function. When the bit reset to
zero, the corresponding SPWM pin is active as I/O pin. Five bits are cleared upon reset.
SPWM Registers -SPWM Control Register (SPWMC, $A3)
bit-7
bit-0
Unused
Unused
Unused
Unused
Unused
Unused
SPFS1
SPFS0
-
-
-
-
-
-
R/W
R/W
0
0
Read / Write:
Reset value:
*
*
*
*
*
*
SPFS[1:0] : These two bits is 2’s power parameter to form a frequency divider for input clock.
SPFS1
SPFS0
Divider
SPWM clock, Fosc=20MHz
SPWM clock, Fosc=24MHz
0
0
2
10MHz
12MHz
0
1
4
5MHz
6MHz
1
0
8
2.5MHz
3MHz
1
1
16
1.25MHz
1.5MHz
SPWM Registers -SPWM Data Register (SPWMD[4:0], $AC, $A7 ~$A4)
bit-7
bit-0
Read / Write:
SPWMD
[4:0]4
R/W
SPWMD
[4:0]3
R/W
SPWMD
[4:0]2
R/W
SPWMD
[4:0]1
R/W
SPWMD
[4:0]0
R/W
BRM
[2:0]2
R/W
BRM
[2:0]1
R/W
BRM
[2:0]0
R/W
Reset value:
0
0
0
0
0
0
0
0
SPWMD[4:0] : content of SPWM Data Register. It determines duty cycle of SPWM output waveform.
BRM[2:0] : will insert certain narrow pulses among an 8-SPWM-cycle frame
Specifications subject to change without notice contact your sales representatives for the most recent information.
12
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
N = BRM[2:0]
Number of SPWM cycles inserted in an 8-cycle frame
000
0
001
1
010
2
011
3
100
4
101
5
110
6
111
7
Example of SPWM timing diagram:
MOV SPWMC , #03H
MOV SPWMD0 , #83H
MOV P1CON , #08H
; Set output frequency (Divider = 16)
; SPWMD0[4:0]=10h (=16T high, 16T low), BRM[2:0] = 3
; Enable P1.3 as SPWM output pin
(narrow pulse inserted by BRM0[2:0] setting, here BRM0[2:0]=3)
SPWM clock = 1 / T = Fosc / 2^(SPFS[1:0]+1)
The SPWM output cycle frame frequency = SPWM clock / 32 = [Fosc/2^(SPFS[1:0]+1)]/32
If user use Fosc=20MHz, SPFS[1:0] of SPWMC=#03H, then
SPWM clock = 20MHz/2^4 = 20MHz/16 = 1.25MHz
SPWM output cycle frame frequency = (20MHz/2^4)/32=39.1KHz
Specifications subject to change without notice contact your sales representatives for the most recent information.
13
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
Operating Conditions
Symbol
Description
Min.
Typ.
Max.
Unit.
Remarks
TA
Operating temperature
-40
25
85
℃
Ambient temperature under bias
VCC5
Supply voltage
4.5
5.0
5.5
V
For C Version
VCC3
Supply voltage
3
3.3
3.6
V
For L Version
Fosc 25
Oscillator Frequency
3.0
25
25
MHz
For 5V, 3.3V application
Fosc 40
Oscillator Frequency
3.0
40
40
MHz
For 5V application
DC Characteristics
(TA = -40 degree C to 85 degree C, Vcc = 3.0V to 5.5V)
Symbol
Parameter
Valid
VIL1
VIL2
Input Low Voltage
Input Low Voltage
port 0,1,2,3,4,#EA
RES, XTAL1
VIH1
Input High Voltage
port 0,1,2,3,4,#EA
VIH2
Input High Voltage
RES, XTAL1
VOL1
Output Low Voltage
VOL2
Min.
-0.5
Max.
Unit
0.8
V
0
0.8
2.0
Vcc+0.5
V
V
70%Vcc
Vcc+0.5
V
port 0, ALE, #PSEN
0.45
V
Output Low Voltage
port 1,2,3,4
0.45
VOH1
Output High Voltage
port 0
VOH2
Output High Voltage
port 1,2,3,4,ALE,#PSEN
Test Conditions
2.4
V
V
IOL=8mA (5V) / IOL=6mA
(3.3V)
IOL=6.5mA (5V) / IOL=5mA
(3.3V)
IOH=-800uA (only for VCC =5V)
90%Vcc
V
IOH=-80uA
2.4
90%Vcc
V
V
IOH=-60uA (only for VCC =5 V)
IOH=-10uA
IIL
Logical 0 Input Current
port 1,2,3,4
-75
uA
Vin=0.45V
ITL
Logical Transition Current
port 1,2,3,4
-650
uA
Vin=2.0V
ILI
Input Leakage Current
port 0, #EA
±10
uA
0.45V<Vin<Vcc
300
Kohm
10
pF
Freq=1MHz, Ta=25 ℃
20
mA
Active mode, 16MHz
6.5
mA
Idle mode, 16MHz
50
uA
Power down mode
R RES
C IO
I CC
Reset Pull-down
Resistance
Pin Capacitance
Power Supply Current
RES
50
Vdd
Note1:Under steady state (non-transient) conditions, IOL must be externally
Limited as follows : Maximum IOL per port pin : 10mA
Maximum IOL per 8-bit port : port 0 :26mA
port 1,2,3
:15mA
Maximum total IOL for all output pins : 71mA
If IOL exceeds the condition, VOL may exceed the related specification. Pins are not guaranteed to sink current
greater than the listed test conditions.
Note2 : Minimum VCC for Power-down is 2V.
Specifications subject to change without notice contact your sales representatives for the most recent information.
14
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
AC Characteristics
(16/25/40MHz, operating conditions; CL for Port 0, ALE and PSEN Outputs=100pF; CL for all Other Output=80pF)
Symbol
Parameter
Valid Cycle
fosc=16MHz
Min. Typ. Max
Variable fosc
Min.
Typ.
Unit
T LHLL
ALE pulse width
RD/WRT
115
2xT - 10
nS
T AVLL
Address Valid to ALE low
RD/WRT
43
T - 20
nS
T LLAX
Address Hold after ALE low
RD/WRT
53
T - 10
nS
240
T LLIV
ALE low to Valid Instruction In
RD
T LLPL
ALE low to #PSEN low
RD
53
T - 10
4xT - 10
nS
T PLPH
#PSEN pulse width
RD
173
3xT - 15
nS
T PLIV
#PSEN low to Valid Instruction In
RD
T PXIX
Instruction Hold after #PSEN
RD
177
0
3xT - 10
0
nS
nS
nS
T PXIZ
Instruction Float after #PSEN
RD
87
T + 25
nS
T AVIV
Address to Valid Instruction In
RD
292
5xT -20
nS
T PLAZ
#PSEN low to Address Float
RD
10
10
nS
T RLRH
#RD pulse width
RD
365
6xT - 10
nS
T WLWH
#WR pulse width
WRT
365
6xT - 10
nS
T RLDV
#RD low to Valid Data In
RD
T RHDX
Data Hold after #RD
RD
T RHDZ
Data Float after #RD
RD
145
2xT+ 20
nS
T LLDV
ALE low to Valid Data In
RD
590
8xT - 10
nS
T AVDV
Address to Valid Data In
RD
542
9xT - 20
nS
T LLYL
ALE low to #WR High or #RD low
RD/WRT
178
3xT+ 10
nS
302
0
5xT - 10
0
197
nS
nS
3xT - 10
T AVYL
Address Valid to #WR or #RD low
RD/WRT
230
4xT - 20
nS
T QVWH
Data Valid to #WR High
WRT
403
7xT - 35
nS
T QVWX
Data Valid to #WR transition
WRT
38
T - 25
nS
T WHQX
Data hold after #WR
WRT
73
T + 10
nS
T RLAZ
#RD low to Address Float
RD
RD/WRT
53
72
T -10
5
nS
T + 10
nS
T YALH
#WR or #RD high to ALE high
T CHCL
clock fall time
nS
T CLCX
clock low time
nS
T CLCH
clock rise time
nS
T CHCX
clock high time
nS
T, TCLCL
clock period
63
Remarks
Max
1/fosc
nS
Specifications subject to change without notice contact your sales representatives for the most recent information.
15
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
Application Reference
Valid for SM8958A
X'tal
C1
C2
R
3MHz
30 pF
30 pF
open
6MHz
30 pF
30 pF
open
9MHz
30 pF
30 pF
open
12MHz
30 pF
30 pF
open
X'tal
C1
C2
R
16MHz
30 pF
30 pF
open
25MHz
15 pF
15 pF
62KΩ
33MHz
5 pF
5 pF
6.8KΩ
40MHz
2 pF
2 pF
4.7KΩ
NOTE: Oscillation circuit may differs with different crystal or ceramic
resonator in higher oscillation frequency which was due to each
crystal or ceramic resonator has its own characteristics.
User should check with the crystal or ceramic resonator manufacturer
for appropriate value of external components.
Data Memory Read Cycle Timing
Specifications subject to change without notice contact your sales representatives for the most recent information.
16
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
Program Memory Read Cycle Timing
Data Memory Write Cycle Timing
Specifications subject to change without notice contact your sales representatives for the most recent information.
17
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
I/O Ports Timing
Timing Critical, Requirement of External Clock
(Vss=0.0V is assumed)
Tm.I External Program Memory Read Cycle
Specifications subject to change without notice contact your sales representatives for the most recent information.
18
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
Tm.II External Data Memory Read Cycle
Tm.III External Data Memory Write Cycle
Specifications subject to change without notice contact your sales representatives for the most recent information.
19
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
PDIP 40L (600mil) Package Information：
Symbol
Note:
1. Refer to JEDEC STD.MS-011(AC).
2. Dimension D and E1 do not include
mold protrusion. Allowable protrusion is
0.25 mm per side. D and E1 are
maximum plastic body size dimension
include mold mismatch.
3. Dimension b3 does not include dambar
protrusion. Allowable dambar protrusion
shall not cause the lead width to exceed
the maximum b3 dimension by more than
0.2mm.
Dimension in mm
Dimension in MIL
Min
Nom
Max
Min
Nom
Max
A1
0.254
－
－
10
－
－
A2
3.683
3.810
3.937
145
150
155
b
0.356
0.500
0.660
14
20
26
b1
0.356
0.457
0.508
14
18
22
b2
1.016
1.270
1.524
40
50
60
b3
1.016
1.321
1.626
40
52
64
c
0.203
0.254
0.432
8
10
17
c1
0.203
0.254
0.356
8
10
14
D
52.07
52.2
52.32
2050
2055
2060
E
14.99
15.24
15.49
590
600
610
E1
13.69
13.87
13.94
539
546
549
－
2.540
－
－
100
－
eB
15.75
16.26
16.76
620
640
660
L
2.921
3.302
3.683
115
130
145
S
1.727
1.981
2.235
68
78
88
Q1
1.651
1.778
1.905
65
70
75
0°
－
10°
0°
－
10°
e
θ
Specifications subject to change without notice contact your sales representatives for the most recent information.
20
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
PLCC 44L Package Information：
UNIT
SYMBOL
A
A1
A2
B
B1
c
D
D1
D2
E
E1
E2
e
y
θ
INCH(REF)
MM(BASE)
0.180(MAX)
0.024 ±0.005
0.105 ±0.005
0.018 + 0.004
- 0.002
0.028 + 0.004
- 0.002
0.010(TYP)
4.572(MAX)
0.52 ±0.14
2.667 ±0.127
0.457 + 0.102
- 0.051
0.711 + 0.102
- 0.051
0.254(TYP)
0.690 ±0.010
17.526 ±0.254
0.653 ±0.003
16.586 ±0.076
0.610 ±0.020
15.494 ±0.508
0.690 ±0.010
17.526 ±0.254
0.653 ±0.003
16.586 ±0.076
0.610 ±0.010
15.494 ±0.254
0.050(TYP)
1.270(TYP)
0.003(MAX)
0.076(MAX)
0~5°
0~5°
Specifications subject to change without notice contact your sales representatives for the most recent information.
21
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
QFP 44L(10x10x2.0mm) Package Information：
Symbol
Note:
1. Refer to JEDC STD.MS-022(AB).
2. Dimension E1 do not include mold protrusion.
Allowable protrusion is 0.25mm per side.E1 are
maximum plastic body size dimension include
mold mismatch .
3. Dimension b does not include dambar
protrusion .Allowable dambar protrusion shall not
cause the lead width to exceed the maximum b3
dimension by more than 0.1 mm.
Dimension in mm
Dimension in MIL
Min
Nom
Max
Min
Nom
Max
A
－
－
2.45
－
－
964
A1
0.05
0.15
0.25
2.1
6.0
9.6
A2
1.90
2.00
2.10
74.8
78.7
82.7
b
0.29
0.32
0.45
11.4
12.6
17.7
b1
0.29
0.30
0.41
11.4
11.8
16.1
c
0.11
0.17
0.23
4.3
6.7
9.1
c1
0.11
0.15
0.19
4.3
5.9
7.5
E
13.00
13.20
13.40
512
520
528
E1
9.90
10.00
10.10
390
394
398
【e】
－
0.800
－
－
31.5
－
L
0.73
0.88
1.03
28.7
34.6
40.6
L1
1.50
1.60
1.70
59.1
63.0
66.9
y
－
－
0.076
－
－
3
θ
0°
－
7°
0°
－
7°
Specifications subject to change without notice contact your sales representatives for the most recent information.
22
Ver 2.1 SM8954A 08/2006
SyncMOS Technologies International, Inc.
SM8954A
8-Bits Micro-controller
With 16KB flash & 1KB RAM embedded
e MCU writer list
Company
Advantech
7F, No.98, Ming-Chung Rd.,
Shin-Tien City, Taipei, Taiwan,
ROC
Web site:
http://www.aec.com.tw
Contact info
Tel:02-22182325
Fax:02-22182435
E-mail:
[email protected]
Programmer Model Number
Lab Tool - 48XP (1 * 1)
Lab Tool - 848 (1*8)
Hi-Lo
4F, No. 20, 22, LN, 76,
Rui Guang Rd., Nei Hu, Taipei,
Taiwan, ROC.
Web site:
http://www.hilosystems.com.tw
Tel:02-87923301
Fax:02-87923285
E-mail:
[email protected]
All - 11 (1*1)
Gang - 08 (1*8)
Leap
6th F1-4, Lane 609,
Chunghsin Rd., Sec. 5, Sanchung,
Taipei Hsien, Taiwan, ROC
Web site:
http://www.leap.com.tw
Tel:02-29991860
Fax:02-29990015
E-mail:
[email protected]
Leap-48 (1*1)
SU - 2000 (1*8)
Xeltek Electronic Co., Ltd
338 Hongwu Road, Nanjing, China
210002
Web site:
http://www.xeltek-cn.com
Tel:+86-25-84408399, 84543153-206
E-mail:
[email protected],
[email protected]
Superpro/2000 (1*1)
Superpro/280U (1*1)
Superpro/L+(1*1)
Specifications subject to change without notice contact your sales representatives for the most recent information.
23
Ver 2.1 SM8954A 08/2006