PD - 91357C IRLZ24N HEXFET® Power MOSFET l l l l l l Logic-Level Gate Drive Advanced Process Technology Dynamic dv/dt Rating 175°C Operating Temperature Fast Switching Fully Avalanche Rated D VDSS = 55V RDS(on) = 0.06Ω G ID = 18A S Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry. TO-220AB Absolute Maximum Ratings ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Parameter Max. Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw. 18 13 72 45 0.30 ±16 68 11 4.5 5.0 -55 to + 175 Units A W W/°C V mJ A mJ V/ns °C 300 (1.6mm from case) 10 lbfin (1.1Nm) Thermal Resistance Parameter RθJC RθCS RθJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Min. Typ. Max. Units 0.50 3.3 62 °C/W 07/12/02 IRLZ24N Electrical Characteristics @ TJ = 25°C (unless otherwise specified) ∆V(BR)DSS/∆TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 55 1.0 8.3 RDS(on) Static Drain-to-Source On-Resistance VGS(th) gfs Gate Threshold Voltage Forward Transconductance IDSS Drain-to-Source Leakage Current LD Internal Drain Inductance LS Internal Source Inductance Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance V(BR)DSS IGSS Typ. 0.061 7.1 74 20 29 Max. Units Conditions V V GS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA 0.060 V GS = 10V, ID = 11A 0.075 Ω V GS = 5.0V, ID = 11A 0.105 V GS = 4.0V, ID = 9.0A 2.0 V V DS = V GS, ID = 250µA S V DS = 25V, ID = 11A 25 V DS = 55V, VGS = 0V µA 250 V DS = 44V, VGS = 0V, TJ = 150°C 100 V GS = 16V nA -100 V GS = -16V 15 ID = 11A 3.7 nC V DS = 44V 8.5 V GS = 5.0V, See Fig. 6 and 13 V DD = 28V ID = 11A ns RG = 12Ω, VGS = 5.0V RD = 2.4Ω, See Fig. 10 Between lead, 4.5 6mm (0.25in.) nH from package 7.5 and center of die contact 480 V GS = 0V 130 pF V DS = 25V 61 = 1.0MHz, See Fig. 5 D G S Source-Drain Ratings and Characteristics IS I SM VSD t rr Q rr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions MOSFET symbol 18 showing the A G integral reverse 72 p-n junction diode. 1.3 V TJ = 25°C, IS = 11A, VGS = 0V 60 90 ns TJ = 25°C, IF = 11A 130 200 nC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) VDD = 25V, starting TJ = 25°C, L = 790µH RG = 25Ω, IAS = 11A. (See Figure 12) ISD ≤ 11A, di/dt ≤ 290A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C Pulse width ≤ 300µs; duty cycle ≤ 2%. D S IRLZ24N 100 100 VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V 10 1 2.5V 20µs PULSE WIDTH T J = 25°C 0.1 0.1 1 10 A 10 2.5V 1 R DS(on) , Drain-to-Source On Resistance (Normalized) 3.0 I D , Drain-to-Source Current (A) TJ = 25°C TJ = 175°C 10 1 V DS = 15V 20µs PULSE WIDTH 4 5 6 7 8 9 10 A 100 Fig 2. Typical Output Characteristics 100 3 1 VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 0.1 20µs PULSE WIDTH T J = 175°C 0.1 0.1 100 VDS , Drain-to-Source Voltage (V) 2 VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP ID , Drain-to-Source Current (A) ID , Drain-to-Source Current (A) TOP 10 A I D = 18A 2.5 2.0 1.5 1.0 0.5 VGS = 10V 0.0 -60 -40 -20 0 20 40 60 A 80 100 120 140 160 180 VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature (°C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature IRLZ24N Ciss 600 400 15 V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd VGS , Gate-to-Source Voltage (V) C, Capacitance (pF) 800 Coss 200 Crss 0 10 V DS = 44V V DS = 28V 12 9 6 3 FOR TEST CIRCUIT SEE FIGURE 13 0 A 1 I D = 11A 0 100 VDS , Drain-to-Source Voltage (V) 8 12 16 A 20 Q G , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 100 OPERATION IN THIS AREA LIMITED BY R DS(on) I D , Drain Current (A) ISD , Reverse Drain Current (A) 4 TJ = 175°C TJ = 25°C 10 VGS = 0V 1 0.4 0.8 1.2 1.6 VSD , Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage A 2.0 100 10µs 100µs 10 TC = 25°C TJ = 175°C Single Pulse 1 1 1ms 10ms 10 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area A 100 IRLZ24N 20 RD VDS V GS ID, Drain Current (Amps) 16 RG 12 D.U.T. + -V DD 5.0V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 8 Fig 10a. Switching Time Test Circuit 4 VDS 90% A 0 25 50 75 100 125 150 175 TC , Case Temperature (°C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (ZthJC ) 10 D = 0.50 1 0.20 0.10 0.05 PDM 0.02 0.01 0.1 t SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 0.01 0.00001 1 /t 1 t2 2 2. Peak TJ = PDM x Z thJC + T C 0.0001 0.001 0.01 0.1 t 1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case A 1 L VDS D.U.T. RG + V - DD 5.0 V IAS tp 0.01Ω Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS EAS , Single Pulse Avalanche Energy (mJ) IRLZ24N 140 TOP 120 BOTTOM 100 80 60 40 20 0 VDD = 25V 25 50 A 75 100 125 150 Starting TJ , Junction Temperature (°C) tp VDD VDS Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V .2µF .3µF 5.0 V QGS ID 4.5A 7.8A 11A D.U.T. QGD + V - DS VGS VG 3mA Charge Fig 13a. Basic Gate Charge Waveform IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 175 IRLZ24N Peak Diode Recovery dv/dt Test Circuit Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + D.U.T + - - + RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. Period D= + - VDD P.W. Period VGS=10V D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS ISD * IRLZ24N Package Outline TO-220AB Outline Dimensions are shown in millimeters (inches) 2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) -B- 3.78 (.149) 3.54 (.139) 4.69 (.185) 4.20 (.165) -A- 1.32 (.052) 1.22 (.048) 6.47 (.255) 6.10 (.240) 4 15.24 (.600) 14.84 (.584) LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN 1.15 (.045) MIN 1 2 3 14.09 (.555) 13.47 (.530) 4.06 (.160) 3.55 (.140) 3X 3X 1.40 (.055) 1.15 (.045) 0.93 (.037) 0.69 (.027) 0.36 (.014) 3X M B A M 0.55 (.022) 0.46 (.018) 2.92 (.115) 2.64 (.104) 2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220-AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. Part Marking Information TO-220AB EXAMPLE : THIS IS AN IRF1010 WITH ASSEMBLY LOT CODE 9B1M A INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER IRF1010 9246 9B 1M DATE CODE (YYWW) YY = YEAR WW = WEEK Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 07/02