LT1943 High Current Quad Output Regulator for TFT LCD Panels U FEATURES DESCRIPTIO ■ The LT®1943 quad output adjustable switching regulator provides power for large TFT LCD panels. The device, housed in a low profile 28 pin thermally enhanced TSSOP package, can generate a 3.3V or 5V logic supply along with the triple output supply required for the TFT LCD panel. Operating from an input range of 4.5V to 22V, a step-down regulator provides a low voltage output VLOGIC with up to 2A current. A high-power step-up converter, a lowerpower step-up converter and an inverting converter provide the three independent output voltages AVDD, VON and VOFF required by the LCD panel. A high-side PNP provides delayed turn-on of the VON signal and can handle up to 30mA. Protection circuitry ensures that VON is disabled if any of the four outputs are more than 10% below the programmed voltage. ■ ■ ■ ■ ■ ■ ■ ■ 4 Integrated Switches: 2.4A Buck, 2.6A Boost, 0.35A Boost, 0.35A Inverter (Guaranteed Minimum Current Limit) Fixed Frequency, Low Noise Outputs Soft-Start for all Outputs Externally Programmable VON Delay Integrated Schottky Diode for VON Output PGOOD Pin for AVDD Output Disconnect 4.5V to 22V Input Voltage Range PanelProtectTM Circuitry Disables VON Upon Fault Available in Thermally Enhanced 28-Lead TSSOP U APPLICATIO S ■ ■ Large TFT-LCD Desktop Monitors Flat Panel Televisions All switchers are synchronized to an internal 1.2MHz clock, allowing the use of low profile inductors and ceramic capacitors throughout. A current mode architecture provides excellent transient response. For best flexibility, all outputs are adjustable. Soft-start is included in all four channels. A PGOOD pin can drive an optional PMOS pass device to provide output disconnect for the AVDD output. , LTC and LT are registered trademarks of Linear Technology Corporation. PanelProtect is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. U TYPICAL APPLICATIO VIN, 8V TO 20V VOFF –5.5V 50mA 1µF 10µF 0.47µF 2.2µF 10µH 33µH 10µH 88.7k 44.2k SW4 SW3 VIN 10.0k 10pF SW2 0.015µF RUN-SS 10µH 0.015µF SS-234 FB4 LT1943 0.047µF CT PGOOD BIAS PGOOD 0.22µF E3 FB3 16.2k FB1 VC1 10.0k VC2 VC3 10.0k GND SGND VC4 RUN-SS 2V/DIV VLOGIC 5V/DIV AVDD 10V/DIV VOFF 10V/DIV VE3 20V/DIV VON 50V/DIV IIN(AVG) 1A/DIV 274k SW1 4.7µH VON 35V 30mA VON BOOST Startup Waveforms 10µF 10.0k FB2 NFB4 VLOGIC 3.3V 2A AVDD 12.2V 500mA 2.2µF 22µF 5ms/DIV 18k 100pF 2.2nF 6.8k 100pF 2.2nF 27k 100pF 680pF 0.47µF 13k 100pF 2.2nF Quad Output TFT-LCD Power Supply 1943 TA01 1943fa 1 LT1943 U W W W ABSOLUTE AXI U RATI GS U W U PACKAGE/ORDER I FOR ATIO (Note 1) VIN Voltage .............................................................. 25V BOOST Voltage ........................................................ 36V BOOST Voltage Above SW1 ..................................... 25V BIAS Pin Voltage ..................................................... 18V SW2, SW4 Pin Voltages .......................................... 40V SW3 Voltage ............................................................ 40V FB1, FB2, FB3, FB4 Voltages ...................................... 4V NFB4 Voltage ................................................ +6V, –0.6V VC1, VC2, VC3, VC4 Pin Voltages .............................. 6V RUN-SS, SS-234 Pin Voltages ................................... 6V PGOOD Pin Voltage ................................................. 36V E3 Pin Voltage ......................................................... 38V VON Voltage ............................................................. 38V CT Pin Voltage ........................................................... 6V Junction Temperature ........................................... 125°C Operating Temperature Range (Note 2) ...–40°C to 85°C Storage Temperature Range ..................–65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C ORDER PART NUMBER TOP VIEW GND 1 28 SW2 VC1 2 27 SW2 VC2 3 26 VON FB1 4 25 CT FB2 5 24 E3 FB3 6 23 PGOOD NFB4 7 FB4 8 21 SW3 VC3 9 20 GND VC4 10 19 SW4 29 LT1943EFE 22 BIAS SGND 11 18 RUN-SS BOOST 12 17 SS-234 SW1 13 16 VIN SW1 14 15 VIN FE PART MARKING 1943E FE PACKAGE 28-LEAD PLASTIC TSSOP EXPOSED PAD (PIN 29) IS GROUND (MUST BE SOLDERED TO PCB) TJMAX = 125°C, θJA = 25°C/W, θJC = 7.5°C/W Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN-SS, SS-234 = 2.5V unless otherwise noted. PARAMETER CONDITIONS MIN TYP ● Minimum Input Voltage Maximum Input Voltage Quiescent Current Not Switching RUN-SS = SS-234 = 0V RUN-SS, SS-234 Pin Current RUN-SS, SS-234 = 0.4V 10 35 RUN-SS, SS-234 Threshold ● BIAS Pin Voltage to Begin SS-234 Charge 2.4 MAX UNITS 4.5 V 22 V 14 45 mA µA 1.7 µA 0.8 V 2.8 3.15 V BIAS Pin Current BIAS = 3.1V, All Switches Off 10.5 15 mA FB Threshold Offset to Begin CT Charge (Note 3) 90 125 160 mV CT Pin Current Source All FB Pins = 1.5V 16 20 25 µA CT Threshold to Power VON All FB Pins = 1.5V 1.0 VON Switch Drop VON Current = 30mA Maximum VON Current VE3 = 30V ● 1.1 1.2 V 180 240 mV 30 60 PGOOD Threshold Offset 90 125 PGOOD Sink Current 200 PGOOD Pin Leakage mA 160 µA VPGOOD = 36V 1 Master Oscillator Frequency ● 1.1 1.0 mV 1.2 1.35 1.46 µA MHz MHz Foldback Switching Frequency All FB Pins = 0V 250 kHz Frequency Shift Threshold on FB ∆200kHz 0.5 V 1943fa 2 LT1943 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN-SS, SS-234 = 2.5V unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS 1.23 1.22 1.25 1.27 1.27 V V 0.01 0.03 %/V 100 600 SWITCH 1 (2.4A BUCK) FB1 Voltage ● FB1 Voltage Line Regulation 4.5V < VIN < 22V FB1 Pin Bias Current (Note 4) ● Error Amplifier 1 Voltage Gain 200 Error Amplifier 1 Transconductance ∆I = 5µA Switch 1 Current Limit Duty Cycle = 35% (Note 6) Switch 1 VCESAT µmhos 450 ● 3.2 4.3 A ISW = 2A 310 470 mV Switch 1 Leakage Current FB1 = 1.5V 0.1 10 µA Minimum BOOST Voltage Above SW1 Pin ISW = 1.5A (Note 7) 1.8 2.5 V BOOST Pin Current ISW = 1.5A 30 50 mA Maximum Duty Cycle (SW1) 2.4 nA V/V ● 82 92 1.23 1.22 1.25 ● 1.27 1.27 V V 0.01 0.03 %/V 220 1000 % SWITCH 2 (2.6A BOOST) FB2 Voltage FB2 Voltage Line Regulation 4.5V < VIN < 22V FB2 Pin Bias Current (Note 4) ● Error Amplifier 2 Voltage Gain Error Amplifier 2 Transconductance 200 ∆I = 5µA µmhos 450 ● Switch 2 Current Limit 2.6 nA V/V 3.8 4.9 A mV Switch 2 VCESAT ISW2 = 2A 360 540 Switch 2 Leakage Current FB2 = 1.5V 0.1 1 BIAS Pin Current ISW2 = 2A 45 mA % Maximum Duty Cycle (SW2) µA ● 85 92 1.23 1.22 1.25 ● 1.27 1.27 V V 0.01 0.03 %/V 100 600 nA SWITCH 3 (350mA BOOST) FB3 Voltage FB3 Voltage Line Regulation 4.5V < VIN < 22V FB3 Pin Bias Current (Note 4) ● Error Amplifier 3 Voltage Gain Error Amplifier 3 Transconductance ∆I = 5µA ● Switch 3 Current Limit V/V µmhos 0.5 0.7 A Switch 3 VCESAT ISW3 = 0.2A 180 280 mV Switch 3 Leakage Current FB3 = 1.5V 0.1 1 µA BIAS Pin Current ISW3 = 0.2A Maximum Duty Cycle (SW3) ● Schottky Diode Drop I = 170mA 0.35 200 450 84 83 14 mA 88 % % 700 mV 1943fa 3 LT1943 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. RUN-SS, SS-234 = 2.5V unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS 1.23 1.22 1.25 1.27 1.27 V V 0.01 0.03 %/V 100 600 nA 1.245 1.275 1.275 V V SWITCH 4 (350mA INVERTER) FB4 Voltage ● FB4 Voltage Line Regulation 4.5V < VIN < 22V FB4 Pin Bias Current (Note 4) ● NFB4 Voltage (VFB4-VNFB4) ● 1.215 1.205 NFB4 Voltage Line Regulation 4.5V < VIN < 22V 0.01 0.03 %/V NFB4 Pin Bias Current (Note 5) 100 600 nA 200 V/V ∆I = 5µA 450 µmhos Error Amplifier 4 Voltage Gain Error Amplifier 4 Transconductance ● Switch 4 Current Limit 0.35 0.5 0.7 A Switch 4 VCESAT ISW4 = 0.3A 260 390 mV Switch 4 Leakage Current FB4 = 1.5V 0.1 1 µA BIAS Pin Current due to SW4 ISW4 = 0.3A 15 mA 88 % % Maximum Duty Cycle (SW4) 84 83 ● Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LT1943E is guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization, and correlation with statistical process controls. Note 3: The CT pin is held low until FB1, FB2, FB3 and FB4 all ramp above the FB threshold offset. Note 4: Current flows into FB1, FB2, FB3 and FB4 pins. Note 5: Current flows out of NFB4 pin. Note 6: Current limit is guaranteed by design and/or correlation to static test. Slope compensation reduces current limit at high duty cycle. Note 7: This is the minimum voltage across the boost capacitor needed to guarantee full saturation of the internal power switch. U W TYPICAL PERFOR A CE CHARACTERISTICS Maximum Output Current for VLOGIC = 3.3V SW1 Current Limit vs Duty Cycle 4.5 TA = 25°C TA = 25°C 2.6 4 4.0 2.4 2.2 L1 = 3.3µH 2.0 1.8 TYPICAL SW1 CURRENT (A) L1 = 4.7µH SW1 CURRENT (A) VLOGIC MAXIMUM OUTPUT CURRENT (A) SW1 Current Limit 5 2.8 3 2 MINIMUM 3.5 3.0 1.6 1 1.4 1.2 0 0 5 10 15 20 INPUT VOLTAGE (V) 1943 G01 0 20 40 60 DUTY CYCLE (%) 80 100 1943 G02 2.5 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 125 1943 G03 1943fa 4 LT1943 U W TYPICAL PERFOR A CE CHARACTERISTICS MINIMUM Input Voltage to Start, VLOGIC = 3.3V BOOST Pin Current 6.0 TA = 25°C TA = 25°C 5.0 4.5 4.0 3.5 4.5 80 SW2 CURRENT (A) BOOST PIN CURRENT (mA) INPUT VOLTAGE (V) 5.5 3.0 SW2 Current Limit 5.0 100 60 40 20 0 100 40 60 80 LOAD CURRENT (mA) 3.5 3.0 20 2.5 –50 0 0 4.0 1.0 1.5 2.0 SW1 CURRENT (A) 0.5 2.5 3.0 50 25 0 75 TEMPERATURE (°C) –25 100 1943 G05 1943 G04 SW3 Current Limit 125 1943 G06 SW4 Current Limit SW1 VCESAT 0.8 0.8 600 0.7 0.7 500 0.6 0.5 0.4 0.3 SW1 VOLTAGE DROP (mV) SW4 CURRENT (A) SW3 CURRENT (A) TA = 25°C 0.6 0.5 0.4 50 25 75 0 TEMPERATURE (°C) 100 50 25 75 0 TEMPERATURE (°C) 1943 G07 600 300 200 100 2.5 3.0 TA = 25°C 400 300 200 100 0 1.0 1.5 2.0 SW2 CURRENT (A) 0 0.1 0.2 0.3 400 300 200 100 0 0.4 0 0.1 0.2 0.3 0.4 SW4 CURRENT (A) SW3 CURRENT (A) 1943 G10 3.0 SW4 VCESAT SW4 VOLTAGE DROP (mV) 400 2.5 1.0 1.5 2.0 SW1 CURRENT (A) 0.5 500 TA = 25°C SW3 VOLTAGE DROP (mV) SW2 VOLTAGE DROP (mV) 0 1943 G09 500 TA = 25°C 0.5 125 SW3 VCESAT SW2 VCESAT 0 100 1943 G08 500 0 200 0 0.2 –50 –25 125 300 100 0.3 0.2 –50 –25 400 1943 G11 1943 G12 1943fa 5 LT1943 U W TYPICAL PERFOR A CE CHARACTERISTICS VON Current Limit Frequency Foldback Oscillator Frequency 1.4 100 1.4 TA = 25°C TA = 25°C SWITCHING FREQUENCY (MHz) 1.3 80 FREQUENCY (MHz) VON CURRENT (mA) 90 70 60 50 1.2 1.1 40 30 5 10 15 25 20 VON (V) 35 30 40 1.0 –50 1.0 0.8 0.6 0.4 0.2 0 –25 0 25 50 75 TEMPERATURE (°C) 100 125 1943 G13 0.2 0.4 0.6 0.8 1.0 FEEDBACK VOLTAGE (V) 1.2 1943 G15 Bias Pin Current 100 1.26 80 BIAS PIN CURRENT (mA) 1.27 1.25 1.24 1.23 60 ISW2 = 1.5A ISW3 = 0.2A ISW4 = 0.3A 40 20 1.22 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 ISW2 = ISW3 = ISW4 = 0A 0 50 25 75 –50 –25 0 TEMPERATURE (°C) 125 1943 G16 100 125 1943 G17 Efficiency, VLOGIC = 3.3V Efficiency, AVDD = 13V 100 100 VIN = 5V TA = 25°C VIN = 5V TA = 25°C 90 EFFICIENCY (%) 90 EFFICIENCY (%) 0 1943 G14 Reference Voltage REFERENCE VOLTAGE (V) 1.2 80 70 80 70 60 60 50 50 0 0.1 0.3 0.4 0.2 LOAD CURRENT (A) 0.5 1943 G18 0 0.25 0.50 0.75 1.00 LOAD CURRENT (A) 1.25 1.50 1943 G19 1943fa 6 LT1943 U U U PI FU CTIO S GND (Pins 1, 20, Exposed Pad Pin 29): Ground. Tie both GND pins and the exposed pad directly to a local ground plane. The ground metal to the exposed pad should be as wide as possible for better heat dissipation. Multiple vias (to ground plane under the ground backplane) placed close to the exposed pad can further aid in reducing thermal resistance. VC1 (Pin 2): Switching Regulator 1 Error Amplifier Compensation. Connect a resistor/capacitor network in series with this pin. VC2 (Pin 3): Error Amplifier Compensation for Switcher 2. Connect a resistor/capacitor network in series with this pin. FB1 (Pin 4): Switching Regulator 1 Feedback. Tie the resistor divider tap to this pin and set VLOGIC according to VLOGIC = 1.25 • (1 + R2/R1). Reference designators refer to Figure 1. FB2 (Pin 5): Feedback for Switch 2. Tie the resistor divider tap to this pin and set AVDD according to AVDD = 1.25 • (1 + R6/R5). FB3 (Pin 6): Switching Regulator 3 Feedback. Tie the resistor divider tap to this pin and set VON according to VON = 1.25 • (1 + R9/R8) – 150mV. NFB4 (Pin 7): Switching Regulator 4 Negative Feedback. Switcher 4 can be used to generate a positive or negative output. When regulating a negative output, tie the resistor divider tap to this pin. Negative output voltage can be set by the equation VOFF = –1.245 • (R3/R4) with R4 set to 10k. Tie the NFB4 pin to FB4 for positive output voltages. FB4 (Pin 8): Feedback for Switch 4. When generating a positive voltage from switch 4, tie the resistor divider tap to this pin. When generating a negative voltage, tie a 10k resistor between FB4 and NFB4 (R4). VC3 (Pin 9): Switching Regulator 3 Error Amplifier Compensation. Connect a resistor/capacitor network in series with this pin. VC4 (Pin 10): Switching Regulator 4 Error Amplifier Compensation. Connect a resistor/capacitor network in series with this pin. SGND (Pin 11): Signal Ground. Return ground trace from the FB resistor networks and VC pin compensation components directly to this pin and then tie to ground. BOOST (Pin 12): The BOOST pin is used to provide a drive voltage, higher than VIN, to the switch 1 drive circuit. SW1 (Pins 13, 14): The SW1 pins are the emitter of the internal NPN bipolar power transistor for switching regulator 1. These pins must be tied together for proper operation. Connect these pins to the inductor, catch diode and boost capacitor. VIN (Pins 15, 16): The VIN pins supply current to the LT1943’s internal regulator and to the internal power transistor for switch 1. These pins must be tied together and locally bypassed. SS-234 (Pin 17): This is the soft-start pin for switching regulators 2, 3 and 4. Place a soft-start capacitor here to limit start-up inrush current and output voltage ramp rate. When the BIAS pin reaches 2.8V, a 1.7µA current source begins charging the capacitor. When the capacitor voltage reaches 0.8V, switches 2, 3 and 4 turn on and begin switching. For slower start-up, use a larger capacitor. When this pin is pulled to ground, switches 2, 3 and 4 are disabled. For complete shutdown, tie RUN-SS to ground. RUN-SS (Pin 18): This is the soft-start pin for switching regulator 1. Place a soft-start capacitor here to limit startup inrush current and output voltage ramp rate. When power is applied to the VIN pin, a 1.7µA current source charges the capacitor. When the voltage at this pin reaches 0.8V, switch 1 turns on and begins switching. For slower start-up, use a larger capacitor. For complete shutdown, tie RUN-SS to ground. SW4 (Pin 19): This is the collector of the internal NPN bipolar power transistor for switching regulator 4. Minimize metal trace area at this pin to keep EMI down. 1943fa 7 LT1943 U U U PI FU CTIO S SW3 (Pin 21): This is the collector of the internal NPN bipolar power transistor for switching regulator 3. Minimize metal trace area at this pin to keep EMI down. BIAS (Pin 22): The BIAS pin is used to improve efficiency when operating at higher input voltages. Connecting this pin to the output of switching regulator 1 forces most of the internal circuitry to draw its operating current from VLOGIC rather than VIN. The drivers of switches 2, 3 and 4 are supplied by BIAS. Switches 2, 3 and 4 will not switch until the BIAS pin reaches approximately 2.8V. BIAS must be tied to VLOGIC. PGOOD (Pin 23): Power Good Comparator Output. This is the open collector output of the power good comparator and can be used in conjunction with an external P-Channel MOSFET to provide output disconnect for AVDD as shown in the 5V Input, Quad Output TFT-LCD Power Supply on the last page of the data sheet. When switcher 2’s output reaches approximately 90% of its programmed voltage, PGOOD will be pulled to ground. This will pull down on the gate of the MOSFET, connecting AVDD. A 100k pull-up resistor between the source and gate of the P-channel MOSFET keeps it off when switcher 2’s output is low. E3 (Pin 24): This is switching regulator 3’s output and the emitter of the output disconnect PNP. Tie the output capacitor and resistor divider here. CT (Pin 25): Timing Capacitor Pin. This is the input to the VON timer and programs the time delay from all four feedback pins reaching 1.125V to VON turning on. The CT capacitor value can be set using the equation C = (20µA • tDELAY)/1.1V. VON (Pin 26): This is the delayed output for switching regulator 3. VON reaches its programmed voltage after the internal CT timer times out. Protection circuitry ensures VON is disabled if any of the four outputs are more than 10% below normal voltage. SW2 (Pins 27, 28): The SW2 pins are the collector of the internal NPN bipolar power transistor for switching regulator 2. These pins must be tied together. Minimize trace area at these pins to keep EMI down. 1943fa 8 LT1943 W BLOCK DIAGRA VIN VIN 15 16 C1 MASTER OSCILLATOR 1.2MHz VLOGIC R2 FOLDBACK OSCILLATOR SLOPE COMPENSATION BOOST 12 Σ + DRIVER FB1 4 – R1 2.4A SWITCH 13 C3 – R14 14 + VC2 R5 C9 – 1.25V BIAS 22 + 27 R S Q DRIVER FOLDBACK OSCILLATOR + C12 C21 + CT R11 3 gm 20µA – – – – C11 C20 – 5 25 R10 2 1.25V 1.12V FB2 C2 VC1 gm R6 L1 D1 – + VLOGIC SW1 R S Q PGOOD 23 AVDD D2 2.6A SWITCH SW2 28 L2 VIN D5 C16 L3 Σ 1.125V SLOPE COMPENSATION AVDD C8 FB4 8 1.7µA RUN-SS 18 C5 VIN – INTERNAL REGULATOR AND REFERENCE + 7 17 C4 – + + 1.25V R S Q DRIVER FOLDBACK OSCILLATOR BIAS VOFF Σ 2.8V VC3 gm C22 C13 – + 1.25V VON R12 9 – 26 VLOGIC D6 C7 400mA SWITCH SLOPE COMPENSATION R8 VON L4 D3 C6 6 VE3 SW4 19 + FB3 R9 C14 C23 SW2 SW3 SW4 LOCKOUT – R13 10 gm 1.7µA SS-234 R3 VC4 – R4 C24 NFB4 + – SW3 21 R S Q DRIVER L5 VIN 400mA SWITCH FOLDBACK OSCILLATOR C15 + Σ SLOPE COMPENSATION 1.1V 1 GND 11 SGND 20 GND 29 E3 24 VE3 C10 GND Figure 1. Block Diagram 1943fa 9 LT1943 U OPERATIO The LT1943 is a highly integrated power supply IC containing four separate switching regulators. All four switching regulators have their own oscillator with frequency foldback and use current mode control. Switching regulator 1 consists of a step-down regulator with a switch current limit of 2.4A. Switching regulator 2 can be configured as a step-up or SEPIC converter and has a 2.6A switch. Switching regulator 3 consists of a step-up regulator with a 0.35A switch as well as an integrated Schottky diode. Switching regulator 4 has two feedback pins (FB4 and NFB4) and can directly regulate positive or negative output voltages. The four regulators share common circuitry including input source, voltage reference, and master oscillator. Operation can be best understood by referring to the Block Diagram as shown in Figure 1. If the RUN/SS pin is pulled to ground, the LT1943 is shut down and draws 35µA from the input source tied to VIN. An internal 1.7µA current source charges the external softstart capacitor, generating a voltage ramp at this pin. If the RUN/SS pin exceeds 0.6V, the internal bias circuits turn on, including the internal regulator, reference, and 1.1MHz master oscillator. The master oscillator generates four clock signals, one for each of the switching regulators. Switching regulator 1 will only begin to operate when the RUN/SS pin reaches 0.8V. Switcher 1 generates VLOGIC, which must be tied to the BIAS pin. When BIAS reaches 2.8V, the NPN pulling down on the SS-234 pin turns off, allowing an internal 1.7µA current source to charge the external capacitor tied to the SS-234 pin. When the voltage on the SS-234 pin reaches 0.8V, switchers 2, 3 and 4 are enabled. AVDD and VOFF will then begin rising at a ramp rate determined by the capacitor tied to the SS-234 pin. When all the outputs reach 90% of their programmed voltages, the NPN pulling down on the CT pin will turn off, and an internal 20µA current source will charge the external capacitor tied to the CT pin. When the CT pin reaches 1.1V, the output disconnect PNP turns on, connecting VON. In the event of any of the four outputs dropping below 10% of their programmed voltage, PanelProtect circuitry pulls the CT pin to GND, disabling VON. A power good comparator monitors AVDD and turns on when the FB2 pin is at or above 90% of its regulated value. RUN-SS 2V/DIV VLOGIC 5V/DIV IL1 1A/DIV SS-234 2V/DIV AVDD 20V/DIV IL2+L3 1A/DIV PGOOD 20V/DIV 5ms/DIV 1943 F03a (2a) VOFF 10V/DIV IL4 500mA/DIV VE3 20V/DIV IL5 500mA/DIV VCT 2V/DIV VON 50V/DIV 5ms/DIV 1943 F03b (2b) Figure 2. LT1943 Power-Up Sequence. (Traces From Both Photos are Synchronized to the Same Trigger) The output is an open collector transistor that is off when the output is out of regulation, allowing an external resistor to pull the pin high. This pin can be used with a P-channel MOSFET that functions as an output disconnect for AVDD. The four switchers are current mode regulators. Instead of directly modulating the duty cycle of the power switch, the feedback loop controls the peak current in the switch during each cycle. Compared to voltage mode control, current mode control improves loop dynamics and provides cycle-by-cycle current limit. 1943fa 10 LT1943 U OPERATIO The control loop for the four switchers is similar. A pulse from the slave oscillator sets the RS latch and turns on the internal NPN bipolar power switch. Current in the switch and the external inductor begins to increase. When this current exceeds a level determined by the voltage at VC, the current comparator resets the latch, turning off the switch. The current in the inductor flows through the Schottky diode and begins to decrease. The cycle begins again at the next pulse from the oscillator. In this way, the voltage on the VC pin controls the current through the inductor to the output. The internal error amplifier regulates the output voltage by continually adjusting the VC pin voltage. The threshold for switching on the VC pin is 0.8V, and an active clamp of 1.8V limits the output current. The RUN/SS and SS-234 pins also clamp the VC pin voltage. As the internal current source charges the external soft-start capacitor, the current limit increases slowly. Each switcher contains an extra, independent oscillator to perform frequency foldback during overload conditions. This slave oscillator is normally synchronized to the master oscillator. A comparator senses when VFB is less than 0.5V and switches the regulator from the master oscillator to a slower slave oscillator. The VFB pin is less than 0.5V during startup, short-circuit, and overload conditions. Frequency foldback helps limit switch current and power dissipation under these conditions. The switch driver for SW1 operates either from VIN or from the BOOST pin. An external capacitor and diode are used to generate a voltage at the BOOST pin that is higher than the input supply. This allows the driver to saturate the internal bipolar NPN power switch for efficient operation. STEP-DOWN CONSIDERATIONS FB Resistor Network The output voltage for switcher 1 is programmed with a resistor divider (refer to the Block Diagram) between the output and the FB pin. Choose the resistors according to: R2 = R1(VOUT/1.25V – 1) R1 should be 10kΩ or less to avoid bias current errors. Input Voltage Range The minimum operating voltage of switcher 1 is determined either by the LT1943’s undervoltage lockout of ~4V, or by its maximum duty cycle. The duty cycle is the fraction of time that the internal switch is on and is determined by the input and output voltages: DC = (VOUT + VF)/(VIN – VSW + VF) where VF is the forward voltage drop of the catch diode (~0.4V) and VSW is the voltage drop of the internal switch (~0.3V at maximum load). This leads to a minimum input voltage of VIN(MIN) = (VOUT + VF)/DCMAX – VF + VSW with DCMAX = 0.82. Inductor Selection and Maximum Output Current A good first choice for the inductor value is: L = (VOUT + VF)/1.2 where VF is the voltage drop of the catch diode (~0.4V) and L is in µH. The inductor’s RMS current rating must be greater than the maximum load current and its saturation current should be at least 30% higher. For highest efficiency, the series resistance (DCR) should be less than 0.1Ω. Table 1 lists several vendors and types that are suitable. The optimum inductor for a given application may differ from the one indicated by this simple design guide. A larger value inductor provides a higher maximum load current, and reduces the output voltage ripple. If your load is lower than the maximum load current, then you can relax the value of the inductor and operate with higher ripple current. This allows you to use a physically smaller inductor, or one with a lower DCR resulting in higher efficiency. Be aware that the maximum load current depends on input voltage. A graph in the Typical Performance section of this data sheet shows the maximum load current as a function of input voltage and inductor value for VOUT = 3.3V. In addition, low inductance may result in discontinuous mode operation, which further reduces 1943fa 11 LT1943 U OPERATIO maximum load current. For details of maximum output current and discontinuous mode operation, see Linear Technology’s Application Note AN44. Finally, for duty cycles greater than 50% (VOUT/VIN > 0.5), a minimum inductance is required to avoid subharmonic oscillations. See AN19. these equations to check that the LT1943 will be able to deliver the required output current. Note again that these equations assume that the inductor current is continuous. Discontinuous operation occurs when IOUT is less than ∆IL/2. The current in the inductor is a triangle wave with an average value equal to the load current. The peak switch current is equal to the output current plus half the peak-topeak inductor ripple current. The LT1943 limits its switch current in order to protect itself and the system from overload faults. Therefore, the maximum output current that the LT1943 will deliver depends on the switch current limit, the inductor value, and the input and output voltages. Part Number When the switch is off, the potential across the inductor is the output voltage plus the catch diode drop. This gives the peak-to-peak ripple current in the inductor: ∆IL = (1 – DC)(VOUT + VF)/(L • f), where f is the switching frequency of the LT1943 and L is the value of the inductor. The peak inductor and switch current is ISWPK = ILPK = IOUT + ∆IL/2 To maintain output regulation, this peak current must be less than the LT1943’s switch current limit of ILIM. For SW1, ILIM is at least 2.4A at DC = 0.35 and decreases linearly to 1.6A at DC = 0.8, as shown in the Typical Performance Characteristics section. The maximum output current is a function of the chosen inductor value: IOUT(MAX) = ILIM – ∆IL/2 = 3A • (1 – 0.57 • DC) – ∆IL/2 Choosing an inductor value so that the ripple current is small will allow a maximum output current near the switch current limit. One approach to choosing the inductor is to start with the simple rule given above, look at the available inductors, and choose one to meet cost or space goals. Then use Table 1. Inductors. Value (µH) IRMS (A) DCR (Ω) Height (mm) CR43-1R4 1.4 2.52 0.056 3.5 CR43-2R2 2.2 1.75 0.071 3.5 CR43-3R3 3.3 1.44 0.086 3.5 CR43-4R7 4.7 1.15 0.109 3.5 CDRH3D16-1R5 1.5 1.55 0.040 1.8 CDRH3D16-2R2 2.2 1.20 0.050 1.8 CDRH3D16-3R3 3.3 1.10 0.063 1.8 CDRH4D28-3R3 3.3 1.57 0.049 3.0 CDRH4D28-4R7 4.7 1.32 0.072 3.0 CDRH4D18-1R0 1.0 1.70 0.035 2.0 CDC5D23-2R2 2.2 2.50 0.03 2.5 CDRH5D28-2R6 2.6 2.60 0.013 3.0 DO1606T-152 1.5 2.10 0.060 2.0 DO1606T-222 2.2 1.70 0.070 2.0 DO1606T-332 3.3 1.30 0.100 2.0 DO1606T-472 4.7 1.10 0.120 2.0 DO1608C-152 1.5 2.60 0.050 2.9 DO1608C-222 2.2 2.30 0.070 2.9 DO1608C-332 3.3 2.00 0.080 2.9 DO1608C-472 4.7 1.50 0.090 2.9 MOS6020-222 2.2 2.15 0.035 2.0 MOS6020-332 3.3 1.8 0.046 2.0 MOS6020-472 4.7 1.5 0.050 2.0 D03314-222 2.2 1.6 0.200 1.4 1008PS-272 2.7 1.3 0.140 2.7 (D62F)847FY-2R4M 2.4 2.5 0.037 2.7 (D73LF)817FY-2R2M 2.2 2.7 0.03 3.0 Sumida Coilcraft Toko 1943fa 12 LT1943 U OPERATIO Output Capacitor Selection For 5V and 3.3V outputs, a 10µF 6.3V ceramic capacitor (X5R or X7R) at the output results in very low output voltage ripple and good transient response. Other types and values will also work; the following discussion explores tradeoffs in output ripple and transient performance. The output capacitor filters the inductor current to generate an output with low voltage ripple. It also stores energy in order satisfy transient loads and stabilizes the LT1943’s control loop. Because the LT1943 operates at a high frequency, minimal output capacitance is necessary. In addition, the control loop operates well with or without the presence of output capacitor series resistance (ESR). Ceramic capacitors, which achieve very low output ripple and small circuit size, are therefore an option. Because loop stability and transient response depend on the value of COUT, this loss may be unacceptable. Use X7R and X5R types. Electrolytic capacitors are also an option. The ESRs of most aluminum electrolytic capacitors are too large to deliver low output ripple. Tantalum and newer, lower ESR organic electrolytic capacitors intended for power supply use are suitable, and the manufacturers will specify the ESR. Chose a capacitor with a low enough ESR for the required output ripple. Because the volume of the capacitor determines its ESR, both the size and the value will be larger than a ceramic capacitor that would give similar ripple performance. One benefit is that the larger capacitance may give better transient response for large changes in load current. Table 2 lists several capacitor vendors. Table 2. Low ESR Surface Mount Capacitors Type Series Taiyo Yuden Ceramic X5R, X7R AVX Ceramic Tantalum X5R, X7R TPS VRIPPLE = ∆IL • ESR for electrolytic capacitors (tantalum and aluminum); Kemet Tantalum Ta Organic Al Organic T491, T494, T495 T520 A700 where ∆IL is the peak-to-peak ripple current in the inductor. The RMS content of this ripple is very low so the RMS current rating of the output capacitor is usually not of concern. It can be estimated with the formula: Sanyo Ta or Al Organic POSCAP You can estimate output ripple with the following equations: VRIPPLE = ∆IL/(8 • f • COUT) for ceramic capacitors, and IC(RMS)= ∆IL/√12 Another constraint on the output capacitor is that it must have greater energy storage than the inductor; if the stored energy in the inductor transfers to the output, the resulting voltage step should be small compared to the regulation voltage. For a 5% overshoot, this requirement indicates: COUT > 10 • L • (ILIM/VOUT)2 The low ESR and small size of ceramic capacitors make them the preferred type for LT1943 applications. Not all ceramic capacitors are the same, however. Many of the higher value capacitors use poor dielectrics with high temperature and voltage coefficients. In particular, Y5V and Z5U types lose a large fraction of their capacitance with applied voltage and at temperature extremes. Vendor Panasonic TDK Al Organic SP CAP Ceramic X5R, X7R Diode Selection The catch diode (D1 from Figure 1) conducts current only during switch off time. Average forward current in normal operation can be calculated from: ID(AVG) = IOUT (VIN – VOUT)/VIN The only reason to consider a diode with a larger current rating than necessary for nominal operation is for the worst-case condition of shorted output. The diode current will then increase to the typical peak switch current. Peak reverse voltage is equal to the regulator input voltage. Use a diode with a reverse voltage rating greater than the input voltage. Table 3 lists several Schottky diodes and their manufacturers. 1943fa 13 LT1943 U OPERATIO Table 3. Schottky Diodes Part Number VR (V) IAVE (A) VF at 1A (mV) VF at 2A (mV) On Semiconductor MBRM120E 20 1 530 MBRM140 40 1 550 R4 should be 10kΩ or less to avoid bias current errors. If switcher 4 is used to generate a positive output voltage, NFB4 should be tied to FB4. 595 VOUT Diodes Inc. R3 FB4 B120 20 1 500 B130 30 1 500 B220 20 2 500 B230 30 2 500 B240 40 2 500 NFB4 R4 1943 A1 Regulating Negative Output Voltages International Rectifier 10BQ030 30 1 20BQ030 30 2 420 470 470 Boost Pin Considerations The minimum operating voltage of an LT1943 application is limited by the undervoltage lockout ~4V and by the maximum duty cycle. The boost circuit also limits the minimum input voltage for proper start-up. If the input voltage ramps slowly, or the LT1943 turns on when the output is already in regulation, the boost capacitor may not be fully charged. Because the boost capacitor charges with the energy stored in the inductor, the circuit will rely on some minimum load current to get the boost circuit running properly. This minimum load will depend on input and output voltages. The Typical Performance Characteristics section shows a plot of the minimum load current to start as a function of input voltage for a 3.3V output. The minimum load current generally goes to zero once the circuit has started. Even without an output load current, in many cases the discharged output capacitor will present a load to the switcher that will allow it to start. INVERTER/STEP-UP CONSIDERATIONS The LT1943 contains an inverting op amp with its noninverting terminal tied to ground and its output connected to the FB4 pin. Use this op amp to generate a voltage at FB4 that is proportional to VOUT4. Choose the resistors according to: R6 = –VOUT R6 NFB4 C1 10pF R3 = R4(VOUT/1.25 – 1) R5 10k FB4 1943 A2 Use 10k for R5. Tie 10pF in parallel with R5. Duty Cycle Range The maximum duty cycle (DC) of the LT1943 switching regulator is 85% for SW2, and 83% for SW3 and SW4. The duty cycle for a given application using the step-up or charge pump topology is: Regulating Positive Output Voltages The output voltage is programmed with a resistor divider between the output and the FB pin. Choose the resistors according to: R5 • | V0UT | 1.245V DC = | VOUT | – VIN | VOUT | The duty cycle for a given application using the inverter or SEPIC topology is: 1943fa 14 LT1943 U OPERATIO DC = | VOUT | VIN + | VOUT | Output Capacitor Selection The LT1943 can still be used in applications where the duty cycle, as calculated above, is above the maximum. However, the part must be operated in discontinuous mode so that the actual duty cycle is reduced. Inductor Selection Several inductors that work well with the LT1943 regulator are listed in Table 4. Besides these, many other inductors will work. Consult each manufacturer for detailed information and for their entire selection of related parts. Use ferrite core inductors to obtain the best efficiency, as core losses at frequencies above 1MHz are much lower for ferrite cores than for powdered-iron units. A 10µH to 22µH inductor will be the best choice for most LT1943 step-up and charge pump designs. Choose an inductor that can carry the entire switch current without saturating. For inverting and SEPIC regulators, a coupled inductor, or two separate inductors is an option. When using coupled inductors, choose one that can handle at least the switch current without saturating. If using uncoupled inductors, each inductor need only handle approximately one-half of the total switch current. A 4.7µH to 15µH coupled inductor or two 10µH to 22µH uncoupled inductors will usually be the best choice for most LT1943 inverting and SEPIC designs. Table 4. Inductors. Part Number Value (µH) IRMS (A) DCR (Ω) Height (mm) TP3-4R7 4.7 1.5 0.181 2.2 TP4-100 10 1.5 0.146 3.0 CD73-100 10 1.44 0.080 3.5 CDRH5D18-6R2 6.2 1.4 0.071 2.0 CDRH4D28-100 10 1.3 0.048 3.0 CDRH4D28-100 10 1.0 0.095 3.0 DO3314-103 10 0.8 0.520 1.4 1008PS-103 10 0.78 0.920 2.8 Use low ESR (equivalent series resistance) capacitors at the output to minimize the output ripple voltage. Multilayer ceramic capacitors are an excellent choice, as they have an extremely low ESR and are available in very small packages. X7R dielectrics are preferred, followed by X5R, as these materials retain their capacitance over wide voltage and temperature ranges. A 10µF to 22µF output capacitor is sufficient for most LT1943 applications. Even less capacitance is required for outputs with |VOUT| > 20V or |IOUT| < 100mA. Solid tantalum or OS-CON capacitors will also work, but they will occupy more board area and will have a higher ESR than a ceramic capacitor. Always use a capacitor with a sufficient voltage rating. Diode Selection A Schottky diode is recommended for use with the LT1943 switcher 2 and switcher 4. The Schottky diode for switcher 3 is integrated inside the LT1943. Choose diodes for switcher 2 and switcher 4 rated to handle an average current greater than the load current and rated to handle the maximum diode voltage. The average diode current in the step-up, SEPIC, and inverting configurations is equal to the load current. Each of the two diodes in the charge pump configurations carries an average diode current equal to the load current. The maximum diode voltage in the step-up and charge pump configurations is equal to |VOUT|. The maximum diode voltage in the SEPIC and inverting configurations is VIN + |VOUT|. Input Capacitor Selection Coiltronics Sumida Coilcraft Bypass the input of the LT1943 circuit with a 4.7µF or higher ceramic capacitor of X7R or X5R type. A lower value or a less expensive Y5V type will work if there is additional bypassing provided by bulk electrolytic capacitors or if the input source impedance is low. The following paragraphs describe the input capacitor considerations in more detail. Step-down regulators draw current from the input supply in pulses with very fast rise and fall times. The input capacitor is required to reduce the resulting voltage ripple at the LT1943 input and to force this switching current into a tight local loop, minimizing EMI. The input capacitor 1943fa 15 LT1943 U OPERATIO must have low impedance at the switching frequency to do this effectively and it must have an adequate ripple current rating. The input capacitor RMS current can be calculated from the step-down output voltage and current, and the input voltage: CINRMS = IOUT • VOUT (VIN – V0UT ) IOUT < 2 VIN and is largest when VIN = 2 VOUT (50% duty cycle). The ripple current contribution from the other channels will be minimal. Considering that the maximum load current from switcher 1 is ~2.8A, RMS ripple current will always be less than 1.4A. The high frequency of the LT1943 reduces the energy storage requirements of the input capacitor, so that the capacitance required is less than 10µF. The combination of small size and low impedance (low equivalent series resistance or ESR) of ceramic capacitors makes them the preferred choice. The low ESR results in very low voltage ripple. Ceramic capacitors can handle larger magnitudes of ripple current than other capacitor types of the same value. Use X5R and X7R types. An alternative to a high value ceramic capacitor is a lower value along with a larger electrolytic capacitor, for example a 1µF ceramic capacitor in parallel with a low ESR tantalum capacitor. For the electrolytic capacitor, a value larger than 10µF will be required to meet the ESR and ripple current requirements. Because the input capacitor is likely to see high surge currents when the input source is applied, only consider a tantalum capacitor if it has the appropriate surge current rating. The manufacturer may also recommend operation below the rated voltage of the capacitor. Be sure to place the 1µF ceramic as close as possible to the VIN and GND pins on the IC for optimal noise immunity. A final caution is in order regarding the use of ceramic capacitors at the input. A ceramic input capacitor can combine with stray inductance to form a resonant tank circuit. If power is applied quickly (for example by plugging the circuit into a live power source), this tank can ring, doubling the input voltage and damaging the LT1943. The solution is to either clamp the input voltage or dampen the tank circuit by adding a lossy capacitor (an electrolytic) in parallel with the ceramic capacitor. For details, see Application Note 88. Soft-Start and Shutdown The RUN/SS (Run/Soft-Start) pin is used to place the switching regulators and the internal bias circuits in shutdown mode. It also provides a soft-start function, along with SS-234. If the RUN/SS is pulled to ground, the LT1943 enters its shutdown mode with all regulators off and quiescent current reduced to ~35µA. An internal 1.7µA current source pulls up on the RUN/SS and SS-234 pins. If the RUN/SS pin reaches ~0.8V, the internal bias circuits start and the quiescent currents increase to their nominal levels. If a capacitor is tied from the RUN/SS or SS-234 pins to ground, then the internal pull-up current will generate a voltage ramp on these pins. This voltage clamps the VC pin, limiting the peak switch current and therefore input current during start-up. The RUN/SS pin clamps VC1, and the SS-234 pin clamps the VC2, VC3, and VC4 pins. A good value for the soft-start capacitors is COUT/10,000, where COUT is the value of the largest output capacitor. To shut down SW2, SW3, and SW4, pull the SS-234 pin to ground with an open drain or collector. If the shutdown and soft-start features are not used, leave the RUN/SS and SS-234 pins floating. VON Pin Considerations The VON pin is the delayed output for switching regulator 3. When the CT pin reaches 1.1V, the output disconnect PNP turns on, connecting VON to E3. The VON pin is current limited, and will protect the LT1943 and input source from a shorted output. However, if the VON pin is charged to a high output voltage, and then shorted to ground through a long wire, unpredictable results can occur. The resonant tank circuit created by the inductance of the long wire and the capacitance at the VON pin can ring the VON pin several volts below ground. This can lead to large and potentially damaging currents internal to the LT1943. If the VON output may be shorted after being fully charged, there 1943fa 16 LT1943 U OPERATIO and inverting regulators, the switched currents flow through the power switch, the switching diode, and the tank capacitor. The loop formed by the components in the switched current path should be as small as possible. Place these components, along with the inductor and output capacitor, on the same side of the circuit board, and connect them on that layer. Place a local, unbroken ground plane below these components, and tie this ground plane to system ground at one location, ideally at the ground terminal of the output capacitor C2. Additionally, keep the SW and BOOST nodes as small as possible. should be 5Ω of resistance between the VON pin and its connection to the load, as shown on Figure 3. The resistance will damp resonant tank circuit created by the output short. As the transient on the VON pin during a short-circuit condition will be highly dependent on the layout and the type of short, be sure to test the short condition and examine the voltage at the VON pin to check that it does not swing below ground. VON R1 5Ω TO LOAD C1 0.47µF Thermal Considerations R1 IS ONLY NECESSARY IF LOAD MAY HAVE TRANSIENT SHORT CONDITION. OTHERWISE, CONNECT VON PIN DIRECTLY TO LOAD The PCB must provide heat sinking to keep the LT1943 cool. The exposed pad on the bottom of the package must be soldered to a ground plane. This ground should be tied to other copper layers below with thermal vias; these layers will spread the heat dissipated by the LT1943. Place additional vias near the catch diodes. Adding more copper to the top and bottom layers and tying this copper to the internal planes with vias can reduce thermal resistance further. With these steps, the thermal resistance from die (or junction) to ambient can be reduced to θJA = 25°C or less. With 100LFPM airflow, this resistance can fall by another 25%. Further increases in airflow will lead to lower thermal resistance. 1943 F03 Figure 3. Transient Short Protection for VON Pin Printed Circuit Board Layout For proper operation and minimum EMI, care must be taken during printed circuit board (PCB) layout. Figure 4 shows the high-current paths in the step down regulator circuit. Note that in the step-down regulators, large, switched currents flow in the power switch, the catch diode, and the input capacitor. In the step-up regulators, large, switched currents flow through the power switch, the switching diode, and the output capacitor. In SEPIC VIN VIN SW GND SW GND (a) (b) VSW VIN IC1 C1 L1 SW D1 GND C2 1943 F04 (c) Figure 4. Subtracting the Current when the Switch is ON (a) From the Current when the Switch is OFF (b) Reveals the Path of the High Frequency Switching Current (c) Keep this Loop Small. The Voltage on the SW and BOOST Nodes will also be Switched; Keep these Nodes as Small as Possible. Finally, Make Sure the Circuit is Shielded with a Local Ground Plane 1943fa 17 LT1943 U OPERATIO GND AVDD VIN PLACE VIAS UNDER GROUND PAD TO GROUND PLANE FOR GOOD THERMAL CONDUCTIVITY VOFF GND VLOGIC 1943 F05 Figure 5. Top Side PCB Layout U TYPICAL APPLICATIO S 8V to 20V Input, Quad Output TFT-LCD Power Supply VIN 8V TO 20V ZHCS400 VOFF –5.5V 50mA 44.2k 2.2µF 10V X5R ZHCS400 0.47µF 16V X5R 10µH 10µF 25V X5R 33µH VIN SW3 PGOOD VON VLOGIC 3.3V 2A 0.22µF 10V X5R 4.7µH B230A PGOOD VON 35V 30mA 274k FB3 22µF 6.3V X5R 18k 0.047µF E3 VC1 100pF 2.2nF 0.015µF SW1 FB1 10.0k 10.0k CT BOOST 10µF 16V X5R 0.015µF SS-234 LT1943 BIAS 16.2k SW2 RUN-SS 10µH FB4 CMDSH-3 AVDD 12.2V 500mA 10µH FB2 NFB4 10pF B240A 88.7k SW4 10.0k 1µF 25V X5R 6.8k 100pF 2.2nF VC2 VC3 10.0k GND SGND VC4 27k 100pF 680pF 13k 100pF 2.2nF 2.2µF 50V X5R 0.47µF 50V X5R 1943 TA02 1943fa 18 LT1943 U PACKAGE DESCRIPTIO FE Package 28-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663) Exposed Pad Variation EB 9.60 – 9.80* (.378 – .386) 4.75 (.187) 4.75 (.187) 28 2726 25 24 23 22 21 20 19 18 1716 15 6.60 ±0.10 2.74 (.108) 4.50 ±0.10 SEE NOTE 4 0.45 ±0.05 EXPOSED PAD HEAT SINK ON BOTTOM OF PACKAGE 6.40 2.74 (.252) (.108) BSC 1.05 ±0.10 0.65 BSC RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.50 – 0.75 (.020 – .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 2. DIMENSIONS ARE IN MILLIMETERS (INCHES) 3. DRAWING NOT TO SCALE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 0.25 REF 1.20 (.047) MAX 0° – 8° 0.65 (.0256) BSC 0.195 – 0.30 (.0077 – .0118) TYP 0.05 – 0.15 (.002 – .006) FE28 (EB) TSSOP 0204 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE 1943fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LT1943 U TYPICAL APPLICATIO 5V Input, Quad Output TFT-LCD Power Supply ZHCS400 VOFF –10V 50mA 0.47µF 16V X5R VIN 4.5V TO 8V 10µH 80.6k 2.2µF 10V X5R ZHCS400 4.7µH 10µF 10V X5R SW4 VIN SW2 FB2 RUN-SS FB4 VLOGIC 3.3V 1.5A 0.22µF 10V X5R E3 232k SW1 FB3 FB1 VC1 10.0k 22µF 10V X5R 7.5k 100pF 2.7nF AVDD 13V 500mA VON 30V 20mA 0.047µF PGOOD VON BOOST 4.7µH B230A Si2343DS 0.015µF CT BIAS 16.5k 10.0k 0.015µF SS-234 LT1943 100k 95.3k SW3 10pF CMDSH-3 10µF 16V X5R 68µH NFB4 10.0k B240A VC2 4.7k 100pF 4700pF VC3 10.0k GND SGND VC4 30k 100pF 1500pF 13k 100pF 2.2nF 2.2µF 35V X5R 0.47µF 35V X5R 1943 TA03 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1615/LT1615-1 300mA/80mA (ISW), Constant Off-Time, High Efficiency Step-Up DC/DC Converters VIN: 1.2V to 15V, VOUT(MAX): 34V, IQ: 20µA, ISD: <1µA, ThinSOTTM Package LT1940 Dual Output 1.4A (IOUT), Constant 1.1MHz, High Efficiency Step-Down DC/DC Converter VIN: 3V to 25V, VOUT(MIN): 1.2V, IQ: 2.5mA, ISD: <1µA, TSSOP-16E Package LT1944/LT1944-1 Dual Output 350mA (ISW), Constant Off-Time, High Efficiency Step-Up DC/DC Converter VIN: 1.2V to 15V, VOUT(MAX): 34V, IQ: 20µA, ISD: <1µA, MS Package LT1945 Dual Output, Pos/Neg, 350mA (ISW), Constant Off-Time, High Efficiency Step-Up DC/DC Converter VIN: 1.2V to 15V, VOUT(MAX): ±34V, IQ: 20µA, ISD: <1µA, MS Package LT1946/LT1946A 1.5mA (ISW), 1.2MHz/2.7MHz, High Efficiency Step-Up DC/DC Converter VIN: 2.75V to 16V, VOUT(MAX): 34V, IQ: 20µA, ISD: <1µA, MS Package LT1947 1.1A, 3MHz, TFT-LCD Triple Output Switching Regulator VIN: 2.7V to 8V, VOUT(MAX): 34V, IQ: 9.5mA, ISD: <1µA, MS Package LT3464 85mA (ISW), Constant Off-Time, High Efficiency Step-Up DC/DC VIN: 2.3V to 10V, VOUT(MAX): 34V, IQ: 25µA, ISD: <0.5µA, Converter with Integrated Schottky and Output Disconnect PNP ThinSOT Package ThinSOT is a trademark of Linear Technology Corporation. 1943fa 20 Linear Technology Corporation LT/LT 0405 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2003