LINER LTM8025EV

LTM8025
36V, 3A Step-Down
µModule Converter
FEATURES
DESCRIPTION
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The LTM®8025 is a 36VIN, 3A step down μModule® converter. Included in the package are the switching controller,
power switches, inductor and all support components.
Operating over an input voltage range of 3.6V to 36V, the
LTM8025 supports an output voltage range of 0.8V to 24V
and a switching frequency range of 200kHz to 2.4MHz,
each set by a single resistor. Only the bulk input and output
filter capacitors are needed to finish the design.
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Complete Step-Down Switch Mode Power Supply
Wide Input Voltage Range: 3.6V to 36V
Up to 3A Output Current
Parallelable for Increased Output Current
0.8V to 24V Output Voltage
Selectable Switching Frequency: 200kHz to 2.4MHz
Current Mode Control
(e4) RoHS Compliant Package with Gold Pad Finish
Programmable Soft-Start
Tiny, Low Profile (15mm × 9mm × 4.32mm) Surface
Mount LGA Package
The low profile package (4.32mm) enables utilization of
unused space on the bottom of PC boards for high density
point of load regulation.
The LTM8025 is packaged in a thermally enhanced, compact
(15mm × 9mm) and low profile (4.32mm) over-molded
land grid array (LGA) package suitable for automated
assembly by standard surface mount equipment. The
LTM8025 is RoHS compliant.
APPLICATIONS
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Automotive Battery Regulation
Power for Portable Products
Distributed Supply Regulation
Industrial Supplies
Wall Transformer Regulation
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Efficiency
100
VOUT
VIN
4.7μF
RUN/SS
BIAS
PGOOD
RT
22μF
ADJ
SYNC
VIN = 24V
90
AUX
LTM8025
SHARE
47.5k
VOUT
12V AT 3A
GND
EFFICIENCY(%)
VIN*
22V TO 36V
80
70
60
34.8k
50
*RUNNING VOLTAGE RANGE. PLEASE REFER TO
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS
8025 TA01a
40
0
500
1000 1500 2000 2500
OUTPUT CURRENT (mA)
3000
8025 TA01b
8025f
1
LTM8025
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
1
VIN, RUN/SS Voltage.................................................36V
ADJ, RT, SHARE Voltage .............................................6V
VOUT, AUX .................................................................25V
PGOOD, SYNC...........................................................30V
BIAS ..........................................................................25V
VIN + BIAS.................................................................56V
Maximum Junction Temperature (Note 2) ............ 125°C
Solder Temperature............................................... 245°C
2
3
4
VOUT
5
6
7
GND
A
B
BANK 1
C
D
E
BANK 2
F
RT
G
H
BANK 3
SHARE
AUX
J
PGOOD
BIAS
K
ADJ
L
VIN
RUN/SS SYNC
LGA PACKAGE
70-PIN (15mm s 9mm s 4.32mm)
TJMAX = 125°C, θJA = 24.4°C/W, θJC(BOTTOM) = 11.5°C/W,
θJC(TOP) = 42.7°C/W, θJB = 18.7°C/W
θ VALUES DETERMINED PER JESD51-9, MAX OUTPUT POWER
WEIGHT = 1.8 GRAMS
ORDER INFORMATION
LEAD FREE FINISH
TRAY
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTM8025EV#PBF
LTM8025EV#PBF
8025V
70-Lead (15mm × 9mm × 4.32mm) LGA
–40°C to 125°C
LTM8025IV#PBF
LTM8025IV#PBF
8025V
70-Lead (15mm × 9mm × 4.32mm) LGA
–40°C to 125°C
LTM8025MPV#PBF
LTM8025MPV#PBF
8025MPV
70-Lead (15mm × 9mm × 4.32mm) LGA
–55°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN/SS = 12V, BIAS = 3V unless otherwise noted. (Note 2)
PARAMETER
CONDITIONS
TYP
l
Minimum Input Voltage
Output DC Voltage
MIN
MAX
3.6
0 < IOUT ≤ 3A; RADJ Open
0 < IOUT ≤ 3A; RADJ = 16.9k; VIN = 32V
0.8
24
0
UNITS
V
V
V
Output DC Current
VOUT = 3.3V
3
A
Quiescent Current into VIN
RUN/SS = 0V
Not Switching
BIAS = 0V, Not Switching
0.01
25
85
1
60
150
μA
μA
μA
Quiescent Current into BIAS
RUN/SS = 0V
Not Switching
BIAS = 0V, Not Switching
0.01
65
0
0.5
120
5
μA
μA
μA
Line Regulation
5.5V < VIN < 36V, IOUT = 1A
0.3
%
Load Regulation
0A < IOUT < 3A
0.4
%
8025f
2
LTM8025
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN/SS = 12V, BIAS = 3V unless otherwise noted. (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Output Voltage Ripple (RMS)
0A < IOUT < 3A
10
mV
Switching Frequency
RT = 45.3k
775
kHz
Voltage (at ADJ Pin)
Current Out of ADJ Pin
l
775
770
mV
mV
2
2
2.8
V
RUN/SS = 2.5V
5
10
μA
RUN Input High Voltage
μA
2.5
V
RUN Input Low Voltage
PGOOD Threshold (at ADJ Pin)
805
810
ADJ = 0V, VOUT = 1V
Minimum BIAS Voltage for Proper Operation
RUN/SS Pin Current
790
0.2
VOUT Rising
PGOOD Leakage Current
PGOOD = 30V
PGOOD Sink Current
PGOOD = 0.4V
SYNC Input Low Threshold
fSYNC = 550kHz
SYNC Input High Threshold
fSYNC = 550kHz
SYNC Bias Current
SYNC = 0V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM8025E is guaranteed to meet performance specifications
from 0°C to 125°C internal. Specifications over the full –40°C to
125°C internal operating temperature range are assured by design,
710
0.1
200
1
700
μA
μA
0.5
0.7
V
mV
V
V
0.1
μA
characterization and correlation with statistical process controls. The
LTM8025I is guaranteed to meet specifications over the full –40°C
to 125°C internal operating temperature range. The LTM8025MP is
guaranteed to meet specifications over the full –55°C to 125°C internal
operating temperature range. Note that the maximum internal temperature
is determined by specific operating conditions in conjunction with board
layout, the rated package thermal resistance and other environmental
factors.
8025f
3
LTM8025
TYPICAL PERFORMANCE CHARACTERISTICS
2.5VOUT Efficiency
TA = 25°C, unless otherwise noted.
3.3VOUT Efficiency
5VOUT Efficiency
90
90
90
80
80
80
70
60
5VIN
12VIN
24VIN
32VIN
50
40
0
500
1000 1500 2000 2500
LOAD CURRENT (mA)
EFFICIENCY(%)
100
EFFICIENCY(%)
100
EFFICIENCY(%)
100
70
60
5.5VIN
12VIN
24VIN
32VIN
50
40
3000
0
500
1000 1500 2000 2500
LOAD CURRENT (mA)
8025 G01
70
60
40
3000
0
8VOUT Efficiency
12VOUT Efficiency
80
80
80
40
0
500
1000 1500 2000 2500
LOAD CURRENT (mA)
EFFICIENCY(%)
90
EFFICIENCY(%)
90
EFFICIENCY(%)
90
12VIN
24VIN
32VIN
70
60
16VIN
24VIN
32VIN
50
40
3000
0
500
1000 1500 2000 2500
LOAD CURRENT (mA)
8025 G04
25
60
50
30
12VIN
24VIN
3000
0
1000 1500 2000 2500
LOAD CURRENT (mA)
3000
Bias Current vs Load Current
5VOUT
40
12VIN
24VIN
12VIN
24VIN
35
BIAS CURRENT (mA)
BIAS CURRENT (mA)
10
500
8025 G06
25
15
24VIN
32VIN
40
Bias Current vs Load Current
3.3VOUT
20
BIAS CURRENT (mA)
70
8025 G05
Bias Current vs Load Current
2.5VOUT
3000
18VOUT Efficiency
100
50
1000 1500 2000 2500
LOAD CURRENT (mA)
8025 G03
100
60
500
8025 G02
100
70
12VIN
24VIN
32VIN
50
20
15
10
30
25
20
15
10
5
5
0
5
0
0
1000
2000
LOAD CURRENT (mA)
3000
8025 G07
0
0
1000
2000
LOAD CURRENT (mA)
3000
8025 G08
0
1000
2000
LOAD CURRENT (mA)
3000
8025 G09
8025f
4
LTM8025
TYPICAL PERFORMANCE CHARACTERISTICS
Bias Current vs Load Current
8VOUT
120
60
BIAS CURRENT (mA)
60
50
40
30
20
100
50
40
24VIN
30
20
0
0
1000
2000
LOAD CURRENT (mA)
3000
0
1000
2000
LOAD CURRENT (mA)
8025 G10
0
2500
INPUT CURRENT (mA)
1000
500
1500
Input Current vs Load Current
5VOUT
1600
5.5VIN
12VIN
24VIN
32VIN
2000
1500
500
1000
LOAD CURRENT (mA)
8025 G12
Input Current vs Load Current
3.3VOUT
5VIN
12VIN
24VIN
32VIN
2000
40
8025 G11
Input Current vs Load Current
2.5VOUT
2500
24VIN
60
0
3000
12VIN
24VIN
32VIN
1400
INPUT CURRENT (mA)
0
80
20
10
10
INPUT CURRENT (mA)
Bias Current vs Load Current
18VOUT
70
12VIN
24VIN
70
BIAS CURRENT (mA)
Bias Current vs Load Current
12VOUT
BIAS CURRENT (mA)
80
TA = 25°C, unless otherwise noted.
1500
1000
500
1200
1000
800
600
400
200
0
0
0
1000
2000
LOAD CURRENT (mA)
3000
0
0
1000
2000
LOAD CURRENT (mA)
8025 G13
500
3000
2000
1500
1000
500
0
1000
2000
LOAD CURRENT (mA)
3000
8025 G16
2000
1500
1000
500
0
0
24VIN
32VIN
2500
INPUT CURRENT (mA)
1000
3000
Input Current vs Load Current
18VOUT
16VIN
24VIN
32VIN
2500
INPUT CURRENT (mA)
INPUT CURRENT (mA)
3000
1500
1000
2000
LOAD CURRENT (mA)
8025 G15
Input Current vs Load Current
12VOUT
12VIN
24VIN
32VIN
2000
0
8025 G14
Input Current vs Load Current
8VOUT
2500
3000
0
0
1000
2000
LOAD CURRENT (mA)
3000
8025 G17
0
1000
2000
LOAD CURRENT (mA)
3000
8025 G18
8025f
5
LTM8025
TYPICAL PERFORMANCE CHARACTERISTICS
Input Current vs Input Voltage
Output Shorted
Minimum Input Running Voltage
vs VOUT, IOUT = 3A
600
6.0
35
TO RUN
TO START
RUN/SS CONTROLLED
5.5
400
300
200
INPUT VOLTAGE (V)
30
INPUT VOLTAGE (V)
INPUT CURRENT (mA)
Minimum Input Voltage vs Load
Current, 3.3VOUT
40
500
25
20
15
5.0
4.5
4.0
10
100
0
3.5
5
0
10
20
INPUT VOLTAGE (V)
0
30
11.0
5.5
5.0
10.0
9.5
9.0
4.5
8.5
4.0
8.0
TO RUN
TO START
RUN/SS CONTROLLED
21
20
19
18
17
16
15
14
13
0
1000
2000
LOAD CURRENT (mA)
3000
12
0
1000
2000
LOAD CURRENT (mA)
8025 G22
32
22
TO RUN
TO START
RUN/SS CONTROLLED
0
1000
2000
LOAD CURRENT (mA)
3000
8025 G25
3000
Minimum Input Voltage vs Load
Current, –5VOUT
14
TO RUN
TO START
RUN/SS CONTROLLED
12
7
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
8
27
1000
2000
LOAD CURRENT (mA)
8025 G24
TO RUN
TO START
RUN/SS CONTROLLED
9
12
0
Minimum Input Voltage vs Load
Current, –3.3VOUT
10
17
3000
8025 G23
Minimum Input Voltage vs Load
Current, 18VOUT
INPUT VOLTAGE (V)
22
INPUT VOLTAGE (V)
6.0
3000
Minimum Input Voltage vs Load
Current, 12VOUT
TO RUN
TO START
RUN/SS CONTROLLED
10.5
INPUT VOLTAGE (V)
6.5
1000
2000
LOAD CURRENT (mA)
8025 G21
Minimum Input Voltage vs Load
Current, 8VOUT
TO RUN
TO START
RUN/SS CONTROLLED
7.0
0
8025 G20
Minimum Input Voltage vs Load
Current, 5VOUT
7.5
3.0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
OUTPUT VOLTAGE (V)
8025 G19
INPUT VOLTAGE (V)
TA = 25°C, unless otherwise noted.
6
5
4
3
10
8
6
4
2
2
1
0
0
0
1000
2000
LOAD CURRENT (mA)
3000
8025 G26
0
1000
2000
LOAD CURRENT (mA)
3000
8025 G27
8025f
6
LTM8025
TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Input Voltage vs Load
Current, –8VOUT
20
TA = 25°C, unless otherwise noted.
Minimum Input Voltage vs Load
Current, –12VOUT
30
TO RUN
TO START
RUN/SS CONTROLLED
Minimum Input Voltage vs
Negative VOUT
25
TO RUN
TO START
RUN/SS CONTROLLED
25
20
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
15
10
1A
2A
3A
20
15
10
15
10
5
5
5
0
0
1000
2000
LOAD CURRENT (mA)
3000
0
0
1000
2000
LOAD CURRENT (mA)
8025 G28
60
30
25
20
15
10
50
12VIN
24VIN
32VIN
45
40
30
20
40
35
30
25
20
15
10
10
5
5
0
0
0
0
500 1000 1500 2000 2500 3000 3500
LOAD CURRENT (mA)
0
500 1000 1500 2000 2500 3000 3500
LOAD CURRENT (mA)
8025 G31
Junction Temperature Rise vs
Load Current, 12VOUT
120
12VIN
24VIN
32VIN
60
50
40
30
20
Junction Temperature Rise vs
Load Current, 18VOUT
100
16VIN
24VIN
32VIN
100
TEMPERATURE RISE (°C)
70
80
60
40
0
0
0
500 1000 1500 2000 2500 3000 3500
LOAD CURRENT (mA)
8025 G34
24VIN
32VIN
80
60
40
20
20
10
500 1000 1500 2000 2500 3000 3500
LOAD CURRENT (mA)
8025 G33
TEMPERATURE RISE (°C)
80
0
8025 G32
Junction Temperature Rise vs
Load Current, 8VOUT
TEMPERATURE RISE (°C)
–15
Junction Temperature Rise vs
Load Current, 5VOUT
5VIN
12VIN
24VIN
32VIN
50
TEMPERATURE RISE (°C)
TEMPERATURE RISE (°C)
35
–5
–10
OUTPUT VOLTAGE (V)
8025 G13
Junction Temperature Rise vs
Load Current, 3.3VOUT
5VIN
12VIN
24VIN
32VIN
40
0
8025 G29
Junction Temperature Rise vs
Load Current, 2.5VOUT
45
3000
TEMPERATURE RISE (°C)
0
0
0
500
1000 1500 2000 2500
LOAD CURRENT (mA)
3000
8025 G35
0
500
1000
1500
LOAD CURRENT (mA)
2000
8025 G36
8025f
7
LTM8025
PIN FUNCTIONS
VOUT (Bank 1): Power Output Pins. Apply the output filter
capacitor and the output load between these pins and
GND pins.
GND (Bank 2): Tie these GND pins to a local ground plane
below the LTM8025 and the circuit components. In most
applications, the bulk of the heat flow out of the LTM8025
is through these pads, so the printed circuit design has
a large impact on the thermal performance of the part.
See the PCB Layout and Thermal Considerations sections
for more details. Return the feedback divider (RADJ) to
this net.
VIN (Bank 3): The VIN pin supplies current to the LTM8025’s
internal regulator and to the internal power switch. This
pin must be locally bypassed with an external, low ESR
capacitor; see Table 1 for recommended values.
AUX (Pin G5): Low Current Voltage Source for BIAS. In
many designs, the BIAS pin is simply connected to VOUT.
The AUX pin is internally connected to VOUT and is placed
adjacent to the BIAS pin to ease printed circuit board routing. Although this pin is internally connected to VOUT, it
is not intended to deliver a high current, so do not draw
current from this pin to the load. If this pin is not tied to
BIAS, leave it floating.
BIAS (Pin H5): The BIAS pin connects to the internal power
bus. Connect to a power source greater than 2.8V and less
than 25V. If the output is greater than 2.8V, connect this
pin there. If the output voltage is less, connect this to a
voltage source between 2.8V and 25V. Also, make sure
that BIAS + VIN is less than 56V.
RUN/SS (Pin L5): Pull the RUN/SS pin below 0.2V to
shut down the LTM8025. Tie to 2.5V or more for normal
operation. If the shutdown feature is not used, tie this pin
to the VIN pin. RUN/SS also provides a soft-start function;
see the Applications Information section.
SYNC (Pin L6): This is the external clock synchronization
input. Ground this pin for low ripple Burst Mode operation
at low output loads. Tie to a stable voltage source greater
than 0.7V to disable Burst Mode operation. Do not leave
this pin floating. Tie to a clock source for synchronization. Clock edges should have rise and fall times faster
than 1μs. See the Synchronization section in Applications
Information.
RT (Pin G7): The RT pin is used to program the switching
frequency of the LTM8025 by connecting a resistor from
this pin to ground. Table 2 gives the resistor values that
correspond to the resultant switching frequency. Minimize
the capacitance at this pin.
SHARE (Pin H7): Tie this to the SHARE pin of another
LTM8025 when paralleling the outputs. Otherwise, do
not connect.
PGOOD (Pin J7): The PGOOD pin is the open-collector
output of an internal comparator. PGOOD remains low
until the ADJ pin is within 10% of the final regulation
voltage. PGOOD output is valid when VIN is above 3.6V
and RUN/SS is high. If this function is not used, leave
this pin floating.
ADJ (Pin K7): The LTM8025 regulates its ADJ pin to 0.79V.
Connect the adjust resistor from this pin to ground. The
value of RADJ is given by the equation RADJ = 394.21/(VOUT
– 0.79), where RADJ is in kΩ.
8025f
8
LTM8025
BLOCK DIAGRAM
VIN
VOUT
8.2μH
499k
0.2μF
15pF
4.4μF
AUX
BIAS
RUN/SS
SHARE
CURRENT
MODE
CONTROLLER
SYNC
GND
RT
PGOOD
ADJ
8025 BD
OPERATION
The LTM8025 is a standalone nonisolated step-down
switching DC/DC power supply that can deliver up to 3A of
output current. This module provides a precisely regulated
output voltage programmable via one external resistor
from 0.8V to 25V. The input voltage range is 3.6V to 36V.
Given that the LTM8025 is a step-down converter, make
sure that the input voltage is high enough to support the
desired output voltage and load current.
As shown in the Block Diagram, the LTM8025 contains a
current mode controller, power switching element, power
inductor, power Schottky diode and a modest amount of
input and output capacitance. The LTM8025 is a fixed
frequency PWM regulator. The switching frequency is set
by simply connecting the appropriate resistor value from
the RT pin to GND.
An internal regulator provides power to the control circuitry.
The bias regulator normally draws power from the VIN
pin, but if the BIAS pin is connected to an external voltage higher than 2.8V, bias power will be drawn from the
external source (typically the regulated output voltage).
This improves efficiency. The RUN/SS pin is used to place
the LTM8025 in shutdown, disconnecting the output and
reducing the input current to less than 1μA.
To further optimize efficiency, the LTM8025 automatically
switches to Burst Mode® operation in light load situations.
Between bursts, all circuitry associated with controlling
the output switch is shut down reducing the input supply
current to 50μA in a typical application.
The oscillator reduces the LTM8025’s operating frequency
when the voltage at the ADJ pin is low. This frequency
foldback helps to control the output current during startup and overload.
The LTM8025 contains a power good comparator which
trips when the ADJ pin is at roughly 90% of its regulated
value. The PGOOD output is an open-collector transistor that
is off when the output is in regulation, allowing an external
resistor to pull the PGOOD pin high. Power good is valid
when the LTM8025 is enabled and VIN is above 3.6V.
The LTM8025 is equipped with a thermal shutdown that
will inhibit power switching at high junction temperatures. The activation threshold of this function, however,
is above 125°C to avoid interfering with normal operation.
Thus, prolonged or repetitive operation under a condition
in which the thermal shutdown activates may damage or
impair the reliability of the device.
Burst Mode is a registered trademark of Linear Technology Corporation.
8025f
9
LTM8025
APPLICATIONS INFORMATION
For most applications, the design process is straight
forward, summarized as follows:
1. Look at Table 1 and find the row that has the desired
input range and output voltage.
2. Apply the recommended CIN, COUT, RADJ and RT values.
3. Connect BIAS as indicated.
While these component combinations have been tested
for proper operation, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions. Bear in mind that the
maximum output current is limited by junction temperature, the relationship between the input and output voltage
magnitude and polarity and other factors. Please refer to
the graphs in the Typical Performance Characteristics
section for guidance.
The maximum frequency (and attendant RT value) at
which the LTM8025 should be allowed to switch is given
in Table 1 in the fMAX column, while the recommended
frequency (and RT value) for optimal efficiency over the
given input condition is given in the fOPTIMAL column.
There are additional conditions that must be satisfied if
the synchronization function is used. Please refer to the
Synchronization section for details.
Capacitor Selection Considerations
The CIN and COUT capacitor values in Table 1 are the
minimum recommended values for the associated operating conditions. Applying capacitor values below those
indicated in Table 1 is not recommended, and may result
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response, if
it is necessary. Again, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions.
Ceramic capacitors are small, robust and have very low
ESR. However, not all ceramic capacitors are suitable.
X5R and X7R types are stable over temperature and applied voltage and give dependable service. Other types,
including Y5V and Z5U have very large temperature and
voltage coefficients of capacitance. In an application circuit they may have only a small fraction of their nominal
capacitance resulting in much higher output voltage ripple
than expected.
Ceramic capacitors are also piezoelectric. In Burst Mode
operation, the LTM8025’s switching frequency depends
on the load current, and can excite a ceramic capacitor
at audio frequencies, generating audible noise. Since the
LTM8025 operates at a lower current limit during Burst
Mode operation, the noise is typically very quiet to a
casual ear.
If this audible noise is unacceptable, use a high performance electrolytic capacitor at the output. It may also be
a parallel combination of a ceramic capacitor and a low
cost electrolytic capacitor.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8025. A
ceramic input capacitor combined with trace or cable
inductance forms a high Q (under damped) tank circuit.
If the LTM8025 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possibly exceeding the device’s rating. This situation is easily
avoided; see the Hot-Plugging Safely section.
Frequency Selection
The LTM8025 uses a constant frequency PWM architecture that can be programmed to switch from 200kHz to
2.4MHz by using a resistor tied from the RT pin to ground.
Table 2 provides a list of RT resistor values and their resultant frequencies.
8025f
10
LTM8025
APPLICATIONS INFORMATION
Table 1: Recommended Component Values and Configuration (TA = 25°C)
VIN
VOUT
CIN
COUT
RADJ
BIAS
fOPTIMAL
RT(OPTIMAL)
fMAX
RT(MIN)
3.6V to 36V
0.8V
10μF, 50V, 1210
4× 100μF, 6.3V, 1210
Open
2.8V to 25V
230kHz
182k
250kHz
169k
3.6V to 36V
1.5V
10μF, 50V, 1210
4× 100μF, 6.3V, 1210
549k
2.8V to 25V
270kHz
154k
360kHz
113k
3.6V to 36V
1.8V
10μF, 50V, 1210
3× 100μF, 6.3V, 1210
383k
2.8V to 25V
285kHz
147k
420kHz
95.3k
4.1V to 36V
2.5V
4.7μF, 50V, 1206
2× 100μF, 6.3V, 1210
226k
2.8V to 25V
300kHz
137k
540kHz
71.5k
5.3V to 36V
3.3V
4.7μF, 50V, 1206
100μF, 6.3V, 1210
154k
AUX
345kHz
118k
675kHz
54.9k
7.5V to 36V
5V
4.7μF, 50V, 1206
100μF, 6.3V, 1206
93.1k
AUX
425kHz
93.1k
950kHz
36.5k
10.5V to 36V
8V
4.7μF, 50V, 1206
47μF, 16V, 1210
54.9k
AUX
550kHz
69.8k
1.45MHz
20.5k
16V to 36V
12V
2.2μF, 50V, 1206
22μF, 16V, 1210
34.8k
AUX
760kHz
47.5k
2.3MHz
9.09k
23V to 36V
18V
2.2μF, 50V, 1206
22μF, 25V, 1812
22.6k
AUX
800kHz
44.2k
2.4MHz
8.25k
31V to 36V
24V
1μF, 50V, 1206
22μF, 25V, 1812
16.5k
2.8V to 25V
1MHz
34k
2.4MHz
8.25k
3.6V to 15V
0.8V
10μF, 25V, 1210
4× 100μF, 6.3V, 1210
Open
VIN
230kHz
182k
575kHz
66.5k
3.6V to 15V
1.5V
10μF, 25V, 1210
4× 100μF, 6.3V, 1210
549k
VIN
270kHz
154k
840kHz
42.2k
3.6V to 15V
1.8V
10μF, 25V, 1210
4× 100μF, 6.3V, 1210
383k
VIN
285kHz
147k
1.0MHz
34k
4.1V to 15V
2.5V
4.7μF, 16V, 1206
2× 100μF, 6.3V, 1210
226k
VIN
300kHz
137k
1.3MHz
23.7k
5.3V to 15V
3.3V
4.7μF, 16V, 1206
100μF, 6.3V, 1206
154k
VIN
345kHz
118k
1.6MHz
17.8k
7.5V to 15V
5V
4.7μF, 16V, 1206
100μF, 6.3V, 1206
93.1k
VIN
425kHz
93.1k
2.4MHz
8.25k
10.5V to 15V
8V
2.2μV, 25V, 1206
47μF, 16V, 1210
54.9k
VIN
550kHz
69.8k
2.4MHz
8.25k
9V to 24V
0.8V
4.7μF, 25V, 1206
4× 100μF, 6.3V, 1210
Open
VIN
270kHz
154k
360kHz
113k
9V to 24V
1.5V
4.7μF, 25V, 1206
4× 100μF, 6.3V, 1210
549k
VIN
310kHz
133k
550kHz
69.8k
9V to 24V
1.8V
4.7μF, 25V, 1206
3× 100μF, 6.3V, 1210
383k
VIN
330kHz
124k
620kHz
60.4k
9V to 24V
2.5V
4.7μF, 25V, 1206
100μF, 6.3V, 1206
226k
VIN
345kHz
118k
800kHz
44.2k
9V to 24V
3.3V
4.7μF, 25V, 1206
100μF, 6.3V, 1206
154k
AUX
425kHz
93.1k
1MHz
34k
9V to 24V
5V
4.7μF, 25V, 1206
47μF, 16V, 1210
93.1k
AUX
500kHz
76.8k
1.4MHz
21.5k
10.5V to 24V
8V
2.2μF, 25V, 1206
22μF, 16V, 1210
54.9k
AUX
590kHz
64.9k
2.2MHz
9.76k
16V to 24V
12V
2.2μF, 50V, 1206
22μF, 16V, 1210
34.8k
AUX
760kHz
47.5k
2.3MHz
9.09k
23V to 24V
18V
2.2μF, 50V, 1206
22μF, 25V, 1812
22.6k
AUX
800kHz
44.2k
2.4MHz
8.25k
18V to 36V
0.8V
1μF, 50V, 1206
4× 100μF, 6.3V, 1210
Open
2.8V to 25V
230kHz
182k
250kHz
169k
18V to 36V
1.5V
1μF, 50V, 1206
4× 100μF, 6.3V, 1210
549k
2.8V to 25V
270kHz
154k
360kHz
113k
18V to 36V
1.8V
1μF, 50V, 1206
3× 100μF, 6.3V, 1210
383k
2.8V to 25V
300kHz
137k
420kHz
95.3k
18V to 36V
2.5V
1μF, 50V, 1206
100μF, 6.3V, 1206
226k
2.8V to 25V
345kHz
118k
540kHz
71.5k
18V to 36V
3.3V
1μF, 50V, 1206
100μF, 6.3V, 1206
154k
AUX
385kHz
105k
675kHz
54.9k
18V to 36V
5V
1μF, 50V, 1206
47μF, 16V, 1210
93.1k
AUX
500kHz
76.8k
950kHz
36.5k
18V to 36V
8V
2.2μF, 50V, 1206
22μF, 16V, 1210
54.9k
AUX
550kHz
69.8k
1.45MHz
20.5k
18V to 36V
12V
2.2μF, 50V, 1206
22μF, 16V, 1210
34.8k
AUX
760kHz
47.5k
2.3MHz
9.09k
4.75V to 32V –3.3V
4.7μF, 50V, 1206
100μF, 6.3V, 1210
154k
AUX
345kHz
118k
675kHz
54.9k
7V to 31V
–5V
4.7μF, 50V, 1206
100μF, 6.3V, 1210
93.1k
AUX
425kHz
93.1k
950kHz
36.5k
15V to 28V
–8V
4.7μF, 50V, 1206
47μF, 16V, 1210
54.9k
AUX
550kHz
69.8k
1.45MHz
20.5k
20V to 24V
–12V
4.7μF, 50V, 1206
22μF, 16V, 1210
34.8k
AUX
760kHz
47.5k
2.3MHz
9.09k
Note: An input bulk capacitance is required. Do not allow VIN + BIAS to exceed 56V. Refer to the Typical Performance Characteristics section for load
conditions.
8025f
11
LTM8025
APPLICATIONS INFORMATION
Table 2. Switching Frequency vs RT Value
SWITCHING FREQUENCY
RT VALUE
0.2MHz
215kΩ
0.3MHz
137kΩ
0.4MHz
100kΩ
0.5MHz
76.8kΩ
0.6MHz
63.4kΩ
0.7MHz
52.3kΩ
0.8MHz
44.2kΩ
0.9MHz
38.3kΩ
1MHz
34.0kΩ
1.2MHz
26.7kΩ
1.4MHz
21.5kΩ
1.6MHz
17.8kΩ
1.8MHz
14.7kΩ
2MHz
12.1kΩ
2.2MHz
9.76kΩ
2.4MHz
8.25kΩ
Operating Frequency Tradeoffs
It is recommended that the user apply the optimal RT
value given in Table 1 for the input and output operating
condition. System level or other considerations, however,
may necessitate another operating frequency. While the
LTM8025 is flexible enough to accommodate a wide range
of operating frequencies, a haphazardly chosen one may
result in undesirable operation under certain operating or
fault conditions. A frequency that is too high can reduce
efficiency, generate excessive heat or even damage the
LTM8025 if the output is overloaded or short circuited.
A frequency that is too low can result in a final design
that has too much output ripple or too large of an output
capacitor.
BIAS Pin Considerations
The BIAS pin is used to provide drive power for the internal power switching stage and operate other internal
circuitry. For proper operation, it must be powered by at
least 2.8V. If the output voltage is programmed to 2.8V
or higher, BIAS may be simply tied to AUX. If VOUT is less
than 2.8V, BIAS can be tied to VIN or some other voltage
source. If the BIAS pin voltage is too high, the efficiency
of the LTM8025 may suffer. The optimum BIAS voltage is
dependent upon many factors, such as load current, input
voltage, output voltage and switching frequency, but 4V to
5V works well in many applications. In all cases, ensure
that the maximum voltage at the BIAS pin is less than 25V
and that the sum of VIN and BIAS is less than 56V. If BIAS
power is applied from a remote or noisy voltage source, it
may be necessary to apply a decoupling capacitor locally
to the pin.
Load Sharing
Two or more LTM8025’s may be paralleled to produce higher
currents. To do this, tie the VIN, ADJ, VOUT and SHARE
pins of all the paralleled LTM8025’s together. To ensure
that paralleled modules start up together, the RUN/SS pins
may be tied together, as well. If the RUN/SS pins are not
tied together, make sure that the same valued soft-start
capacitors are used for each module. Current sharing can
be improved by synchronizing the LTM8025s. An example
of two LTM8025s configured for load sharing is given in
the Typical Applications section.
Burst Mode Operation
To enhance efficiency at light loads, the LTM8025 automatically switches to Burst Mode operation which keeps
the output capacitor charged to the proper voltage while
minimizing the input quiescent current. During Burst Mode
operation, the LTM8025 delivers single cycle bursts of
current to the output capacitor followed by sleep periods
where the output power is delivered to the load by the output
capacitor. In addition, VIN and BIAS quiescent currents are
each reduced to microamps during the sleep time. As the
load current decreases towards a no load condition, the
percentage of time that the LTM8025 operates in sleep
mode increases and the average input current is greatly
reduced, resulting in higher efficiency.
Burst Mode operation is enabled by tying SYNC to GND. To
disable Burst Mode operation, tie SYNC to a stable voltage
above 0.7V. Do not leave the SYNC pin floating.
Minimum Input Voltage
The LTM8025 is a step-down converter, so a minimum
amount of headroom is required to keep the output in
regulation. In addition, the input voltage required to turn
8025f
12
LTM8025
APPLICATIONS INFORMATION
on is higher than that required to run, and depends upon
whether the RUN/SS is used. As shown in the Typical
Performance Characteristics section, the minimum input
voltage to run a 3.3V output at light load is only about 3.6V,
but, if the RUN/SS is pulled up to VIN, it takes 5.5VIN to
start. If the LTM8025 is enabled with the RUN/SS pin, the
minimum voltage to start at light loads is lower, about 4.3V.
Similar curves detailing this behavior of the LTM8025 for
other outputs are also included in the Typical Performance
Characteristics section.
Soft-Start
The RUN/SS pin can be used to soft-start the LTM8025,
reducing the maximum input current during start-up. The
RUN/SS pin is driven through an external RC filter to create a voltage ramp at this pin. Figure 1 shows the start-up
and shutdown waveforms with the soft-start circuit. By
choosing an appropriate RC time constant, the peak startup current can be reduced to the current that is required to
regulate the output, with no overshoot. Choose the value
of the resistor so that it can supply at least 20μA when
the RUN/SS pin reaches 2.5V.
RUN
IL
1A/DIV
15k
RUN/SS
0.22μF
VRUN/SS
2V/DIV
RUN
VOUT
2V/DIV
2ms/DIV
8025 F01
Figure 1. To Soft-Start the LTM8025, Add a Resistor and
Capacitor to the RUN/SS Pin
Frequency Foldback
The LTM8025 is equipped with frequency foldback which
acts to reduce the thermal and energy stress on the internal
power elements during a short circuit or output overload
condition. If the LTM8025 detects that the output has fallen
out of regulation, the switching frequency is reduced as a
function of how far the output is below the target voltage.
This in turn limits the amount of energy that can be delivered
to the load under fault. During the start-up time, frequency
foldback is also active to limit the energy delivered to the
potentially large output capacitance of the load.
Synchronization
The internal oscillator of the LTM8025 can be synchronized
by applying an external 250kHz to 2MHz clock to the SYNC
pin. Do not leave this pin floating. When synchronizing
the LTM8025, select an RT resistor value that corresponds
to an operating frequency 20% lower than the intended
synchronization frequency (see the Frequency Selection
section).
In addition to synchronization, the SYNC pin controls Burst
Mode behavior. If the SYNC pin is driven by an external
clock, or pulled up above 0.7V, the LTM8025 will not enter Burst Mode operation, but will instead skip pulses to
maintain regulation instead.
Shorted Input Protection
Care needs to be taken in systems where the output will be
held high when the input to the LTM8025 is absent. This
may occur in battery charging applications or in battery
backup systems where a battery or some other supply is
diode ORed with the LTM8025’s output. If the VIN pin is
allowed to float and the SHDN pin is held high (either by a
logic signal or because it is tied to VIN), then the LTM8025’s
internal circuitry will pull its quiescent current through
its internal power switch. This is fine if your system can
tolerate a few milliamps in this state. If you ground the
SHDN pin, the SW pin current will drop to essentially zero.
However, if the VIN pin is grounded while the output is
held high, then parasitic diodes inside the LTM8025 can
pull large currents from the output through the VIN pin.
Figure 2 shows a circuit that will run only when the input
voltage is present and that protects against a shorted or
reversed input.
PCB Layout
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8025. The LTM8025 is nevertheless a switching power supply, and care must be taken to
minimize EMI and ensure proper operation. Even with the
8025f
13
LTM8025
APPLICATIONS INFORMATION
VIN
VOUT
VOUT
VIN
RUN/SS
AUX
LTM8025
might use very small via holes. It should employ more
thermal vias than a board that uses larger holes.
BIAS
AUX
PGOOD
GND
RT
GND
ADJ
SYNC
RT
RADJ
GND
SYNC
8025 F02
SHDN
Figure 2. The Input Diode Prevents a Shorted Input from
Discharging a Backup Battery Tied to the Output. It Also Protects
the Circuit from a Reversed Input. The LTM8025 Runs Only When
the Input is Present.
high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure 3
for a suggested layout. Ensure that the grounding and
heatsinking are acceptable.
BIAS
VOUT
VIN
COUT
CIN
GND
THERMAL VIAS TO GND
8025 F03
1. Place the RADJ and RT resistors as close as possible to
their respective pins.
Figure 3. Layout Showing Suggested External Components, GND
Plane and Thermal Vias.
2. Place the CIN capacitor as close as possible to the VIN
and GND connection of the LTM8025.
Hot-Plugging Safely
3. Place the COUT capacitor as close as possible to the
VOUT and GND connection of the LTM8025.
4. Place the CIN and COUT capacitors such that their
ground current flow directly adjacent or underneath
the LTM8025.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8025.
6. For good heatsinking, use vias to connect the GND copper area to the board’s internal ground planes. Liberally
distribute these GND vias to provide both a good ground
connection and thermal path to the internal planes of the
printed circuit board. Pay attention to the location and
density of the thermal vias in Figure 3. The LTM8025
can benefit from the heat-sinking afforded by vias that
connect to internal GND planes at these locations, due to
their proximity to internal power handling components.
The optimum number of thermal vias depends upon
the printed circuit board design. For example, a board
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8025. However, these capacitors
can cause problems if the LTM8025 is plugged into a live
supply (see Linear Technology Application Note 88 for
a complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
source forms an underdamped tank circuit, and the voltage at the VIN pin of the LTM8025 can ring to more than
twice the nominal input voltage, possibly exceeding the
LTM8025’s rating and damaging the part. If the input
supply is poorly controlled or the user will be plugging
the LTM8025 into an energized supply, the input network
should be designed to prevent this overshoot. This can be
accomplished by installing a small resistor in series to VIN,
but the most popular method of controlling input voltage
overshoot is to add an electrolytic bulk capacitor to the
VIN net. This capacitor’s relatively high equivalent series
resistance damps the circuit and eliminates the voltage
overshoot. The extra capacitor improves low frequency
ripple filtering and can slightly improve the efficiency of
the circuit, though it is likely to be the largest component
in the circuit.
8025f
14
LTM8025
APPLICATIONS INFORMATION
Thermal Considerations
The LTM8025 output current may need to be derated if it is
required to operate in a high ambient temperature or deliver
a large amount of continuous power. The amount of current
derating is dependent upon the input voltage, output power
and ambient temperature. The temperature rise curves
given in the Typical Performance Characteristics section
can be used as a guide. These curves were generated by a
LTM8025 mounted to a 58cm2 4-layer FR4 printed circuit
board. Boards of other sizes and layer count can exhibit
different thermal behavior, so it is incumbent upon the user
to verify proper operation over the intended system’s line,
load and environmental operating conditions.
The junction to air and junction to board thermal resistances given in the Pin Configuration diagram may also
be used to estimate the LTM8025 internal temperature.
These thermal coefficients are determined for maximum
output power per JESD 51-9 “JEDEC Standard, Test Boards
for Area Array Surface Mount Package Thermal Measurements” through analysis and physical correlation. Bear in
mind that the actual thermal resistance of the LTM8025
to the printed circuit board depends upon the design of
the circuit board.
The die temperature of the LTM8025 must be lower than
the maximum rating of 125°C, so care should be taken in
the layout of the circuit to ensure good heat sinking of the
LTM8025. The bulk of the heat flow out of the LTM8025
is through the bottom of the module and the LGA pads
into the printed circuit board. Consequently a poor printed
circuit board design can cause excessive heating, resulting in impaired performance or reliability. Please refer to
the PCB Layout section for printed circuit board design
suggestions.
The LTM8025 is equipped with a thermal shutdown that
will inhibit power switching at high junction temperatures.
The activation threshold of this function, however, is above
125°C to avoid interfering with normal operation. Thus,
it follows that prolonged or repetitive operation under a
condition in which the thermal shutdown activates necessarily means that the internal components are subjected
to temperatures above the 125°C rating for prolonged
or repetitive intervals, which may damage or impair the
reliability of the device.
Finally, be aware that at high ambient temperatures the
internal Schottky diode will have significant leakage current
increasing the quiescent current of the LTM8025.
8025f
15
LTM8025
TYPICAL APPLICATIONS
1.8V Step-Down Converter
VIN
3.6V TO 24V
VIN
RUN/SS
10μF
VOUT
1.8V AT 3A
VOUT
BIAS
AUX
300μF
LTM8025
SHARE
PGOOD
RT
ADJ
SYNC
147k
GND
383k
8025 TA02
2.5V Step-Down Converter
VIN*
4.1V TO 36V
RUN/SS
4.7μF
3.3V
BIAS
AUX
200μF
LTM8025
SHARE
PGOOD
RT
ADJ
SYNC
137k
VOUT
2.5V AT 3A
VOUT
VIN
GND
226k
*RUNNING VOLTAGE RANGE. PLEASE REFER TO
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS
8025 TA03
3.3V Step-Down Converter
VIN*
5.5V TO 36V
4.7μF
RUN/SS
AUX
BIAS
LTM8025
SHARE
PGOOD
RT
100μF
ADJ
SYNC
118k
VOUT
3.3V AT 3A
VOUT
VIN
GND
154k
*RUNNING VOLTAGE RANGE. PLEASE REFER TO
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS
8025 TA04
8V Step-Down Converter
VIN*
11V TO 36V
VIN
4.7μF
RUN/SS
AUX
LTM8025
SHARE
BIAS
PGOOD
RT
69.8k
VOUT
8V AT 3A
VOUT
47μF
ADJ
SYNC
GND
54.9k
*RUNNING VOLTAGE RANGE. PLEASE REFER TO
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS
8025 TA05
8025f
16
LTM8025
TYPICAL APPLICATIONS
–5V Negative Output Converter
VIN*
7.5V TO 30V
VIN
4.7μF
VOUT
RUN/SS
AUX
LTM8025
SHARE
BIAS
PGOOD
RT
ADJ
SYNC
93.1k
100μF
GND
93.1k
VOUT
–5V AT 2A
*RUNNING VOLTAGE RANGE. PLEASE REFER TO
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS
8025 TA06
Two LTM8025s in Paralel, 2.5V at 5.5A
VIN*
4.1V TO 36V
VOUT
2.5V AT 5.6A
VOUT
VIN
RUN/SS
AUX
LTM8025
SHARE
BIAS
3V
PGOOD
2.2μF
RT
ADJ
SYNC
137k
GND
113k
OPTIONAL
SYNC
VIN
VOUT
RUN/SS
AUX
BIAS
LTM8025
SHARE
300μF
PGOOD
2.2μF
RT
137k
ADJ
SYNC
GND
*RUNNING VOLTAGE RANGE. PLEASE REFER TO APPLICATIONS INFORMATION
SECTION FOR START-UP DETAILS
NOTE: SYNCHRONIZE THE TWO MODULES TO AVOID BEAT FREQUENCIES,
IF NECESSARY. OTHERWISE, TIE EACH SYNC TO GND
8025 TA07
8025f
17
4
PACKAGE TOP VIEW
15
BSC
2.540
SUGGESTED PCB LAYOUT
TOP VIEW
2.540
3.810
5.080
6.350
X
9
BSC
Y
DETAIL A
0.27 – 0.37
SUBSTRATE
eee S X Y
DETAIL B
0.635 ±0.025 SQ. 70x
aaa Z
3.95 – 4.05
MOLD
CAP
DETAIL B
4.22 – 4.42
(Reference LTC DWG # 05-08-1817 Rev Ø)
3.810
2.540
1.270
LAND DESIGNATION PER JESD MO-222, SPP-010
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
3
4
SYMBOL TOLERANCE
0.15
aaa
0.10
bbb
0.05
eee
6. THE TOTAL NUMBER OF PADS: 70
5. PRIMARY DATUM -Z- IS SEATING PLANE
1.27
BSC
7.62
BSC
3
L
TRAY PIN 1
BEVEL
COMPONENT
PAD “A1”
PADS
SEE NOTES
2. ALL DIMENSIONS ARE IN MILLIMETERS
3.810
0.000
5.080
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
6.350
1.270
2.540
3.810
PAD 1
CORNER
1.270
// bbb Z
aaa Z
0.000
Z
18
1.270
LGA Package
70-Lead (15mm × 9mm × 4.32mm)
K
J
G
F
E
D
C
B
A
DETAIL A
LGA 70 1007 REV Ø
PACKAGE IN TRAY LOADING ORIENTATION
LTMXXXXXX
μModule
PACKAGE BOTTOM VIEW
H
12.70
BSC
1
2
3
4
5
6
7
C(0.30)
PAD 1
LTM8025
PACKAGE DESCRIPTION
8025f
LTM8025
PACKAGE DESCRIPTION
Pin Assignment Table
(Arranged by Pin Number)
PIN NAME
PIN NAME
PIN NAME
PIN NAME
PIN NAME
PIN NAME
A1 VOUT
B1 VOUT
C1 VOUT
D1 VOUT
E1
GND
F1
GND
A2 VOUT
A3 VOUT
B2 VOUT
B3 VOUT
C2 VOUT
C3 VOUT
D2 VOUT
D3 VOUT
E2
GND
F2
GND
E3
GND
F3
GND
A4 VOUT
A5 GND
B4 VOUT
B5 GND
C4 VOUT
C5 GND
D4 VOUT
D5 GND
E4
GND
F4
GND
E5
GND
F5
GND
A6 GND
B6 GND
C6 GND
D6 GND
E6
GND
F6
GND
A7 GND
B7 GND
C7 GND
D7 GND
E7
GND
F7
GND
PIN NAME
PIN NAME
PIN NAME
PIN NAME
PIN NAME
L1
VIN
VIN
K1 VIN
K2 VIN
L2
VIN
VIN
K3 VIN
L3
VIN
-
K4 -
L4
-
G1 GND
H1 -
J1
VIN
G2 GND
H2 -
J2
G3 GND
H3 -
J3
G4 GND
H4 -
J4
G5 AUX
H5 BIAS
J5
GND
K5 GND
L5
RUN/SS
G6 GND
H6 GND
J6
GND
K6 GND
L6
SYNC
G7 RT
H7 SHARE
J7
PGOOD
K7 ADJ
L7
GND
8025f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTM8025
PACKAGE PHOTOGRAPH
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTM4600/LTM4602
10A and 6A DC/DC μModule
Pin Compatible, 4.5V ≤ VIN ≤ 28V, 15mm × 15mm × 2.8mm LGA Package
LTM4601/LTM4603
12A and 6A DC/DC μModule
Pin Compatible; Remote Sensing; PLL, Tracking and Margining, 4.5V ≤ VIN ≤ 28V
LTM4604
4A, Low VIN DC/DC μModule
2.375V ≤ VIN ≤ 5.5V, 0.8V ≤ VOUT ≤ 5V, 9mm × 15mm × 2.3mm LGA Package
LTM4606
Low EMI 6A, 28V DC/DC μModule
4.5V ≤ VIN ≤ 28V, 0.6V ≤ VOUT ≤ 5V, 15mm × 15mm × 2.8mm LGA Package
LTM8020
200mA, 36V DC/DC μModule
4V ≤ VIN ≤ 36V, 1.25V ≤ VOUT ≤ 5V, 6.25mm × 6.25mm × 2.32mm LGA Package
LTM8022
1A, 36V DC/DC μModule
3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 10V, 11.25mm × 9mm × 2.82mm LGA Package
LTM8023
2A, 36V DC/DC μModule
3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 10V, 11.25mm × 9mm × 2.82mm, LGA Package
8025f
20 Linear Technology Corporation
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