2-Phase Stepper-Motor Driver
Bipolar-IC
TLE4729G
Features
• 2 × 0.7 amp. full bridge outputs
• Integrated driver, control logic and current control
(chopper)
• Very low current consumption in inhibit mode
• Fast free-wheeling diodes
• Max. supply voltage 45 V
• Output stages are free of crossover current
• Offset-phase turn-ON of output stages
• All outputs short-circuit proof
• Error-flag for overload, open load, over-temperature
• SMD package PG-DSO-24-16
• Green Product (RoHS compliant)
• AEC Qualified
Type
Package
TLE4729G
PG-DSO-24-16 (SMD)
PG-DSO-24-16
Functional Description
TLE4729G is a bipolar, monolithic IC for driving bipolar stepper motors, DC motors and
other inductive loads that operate by constant current. It is fully pin and function
compatible except the current programming is inverse to the TLE4728G with an
additional inhibit feature. The control logic and power output stages for two bipolar
windings are integrated on a single chip which permits switched current control of motors
with 0.7 A per phase at operating voltages up to 16 V.
The direction and value of current are programmable for each phase via separate control
inputs. In the case of low at all four current program inputs the device is switched to
inhibit mode automatically. A common oscillator generates the timing for the current
control and turn-on with phase offset of the two output stages. The two output stages in
full-bridge configuration include fast integrated freewheeling diodes and are free of
crossover current. The device can be driven directly by a microprocessor in several
modes by programming phase direction and current control of each bridge
independently.
Data Sheet
1
V1.2, 2008-03-18
TLE 4729 G
With the two error outputs the TLE4729G signals malfunction of the device. Setting the
control inputs low resets the error flag and by reactivating the bridges one by one the
location of the error can be found.
Pin Configuration
(top view)
TLE4729G
Ι 10
Ι 11
Phase 1
OSC
GND
GND
GND
GND
Q11
R1
+V S
Q12
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Ι 20
Ι 21
Phase 2
Error 1
GND
GND
GND
GND
Q21
R2
Error 2
Q22
AEP02195
Figure 1
Data Sheet
2
V1.2, 2008-03-18
TLE 4729 G
Pin Definitions and Functions
Pin
Function
1, 2, 23, 24
Digital control inputs IX0, IX1 for the magnitude of the current of the
particular phase.
Iset = 450 mA with Rsense = 1 Ω
IX1 IX0
Phase Current
Example of Motor Status
L
0
No current1)
L
L
H
0.155 × Iset
Hold
H
L
Iset
Normal mode
H
H
1.55 × Iset
Accelerate
1)
“No current” in both bridges inhibits the circuit and current consumption will sink below
50 µA (inhibit-mode)
3
Input phase 1; controls the current through phase winding 1.
On H-potential the phase current flows from Q11 to Q12, on L-potential
in the reverse direction.
5 … 8,
17 … 20
Ground; all pins are connected at leadframe internally.
4
Oscillator; works at approx. 25 kHz if this pin is wired to ground across
2.2 nF.
10
Resistor R1 for sensing the current in phase 1.
9, 12
Push-pull outputs Q11, Q12 for phase 1 with integrated free-wheeling
diodes.
11
Supply voltage; block to ground, as close as possible to the IC, with a
stable electrolytic capacitor of at least 47 µF in parallel with a ceramic
capacitor of 100 nF.
14
Error 2 output; signals with “low” the errors: short circuit to ground of
one or more outputs or over-temperature.
13, 16
Push-pull outputs Q22, Q21 for phase 2 with integrated free-wheeling
diodes.
15
Resistor R2 for sensing the current in phase 2.
21
Error 1 output; signals with “low” the errors: open load or short circuit to
+ VS of one or more outputs or short circuit of the load or overtemperature.
22
Input phase 2; controls the current flow through phase winding 2. On
H-potential the phase current flows from Q21 to Q22, on L-potential in
the reverse direction.
Data Sheet
3
V1.2, 2008-03-18
TLE 4729 G
Block Diagram
+V S
OSC
Oscillator
C OSC
T11
Ι 10
Ι 11
Phase 1
Error 1
Function
Logic
T12
D11
D12
D13
D14
T13
T14
Q11
Q12
Phase 1
R1
R sense
Error-Flag
Generation
Error 2
TLE 4729 G
+V S
Inhibit
T21
T22
D21
Ι 20
Ι 21
Phase 2
Function
Logic
D22
T23
T24
D23
Q21
Q22
D24
Phase 2
R2
GND
R sense
AEB02196
Figure 2
Data Sheet
4
V1.2, 2008-03-18
TLE 4729 G
Absolute Maximum Ratings
Tj = – 40 to 150 °C
Parameter
Supply voltage
Error outputs
Output current
Ground current
Logic inputs
Oscillator voltage
R1, R2 input voltage
Junction temperature
Storage temperature
Symbol
Limit Values
Unit Remarks
min.
max.
– 0.3
45
V
–
– 0.3
–
45
3
V
mA
–
–
–1
1
A
–
–2
–
A
–
– 15
15
V
IXX; Phase 1, 2
– 0.3
6
V
–
– 0.3
5
V
–
– 40
150
°C
– 50
150
°C
–
–
75
50
K/W –
K/W –
–
15
K/W Measured on pin 5
VS
TC
5
16
V
–
– 40
110
°C
Measured on pin 5
Pdiss = 2 W
IQ
VIXX
VErr
IErr
– 800
800
mA
–
–5
+6
V
IXX; Phase 1, 2
–
0
25
1
V
mA
–
–
VS
VErr
IErr
IQ
IGND
VIXX
VOSC
VRX
Tj
Tstg
Thermal resistances
Junction-ambient
Rth ja
Junction-ambient
Rth ja
(soldered on a 35 µm thick
20 cm2 PC board copper
area)
Junction-case
Rth jc
–
Operating Range
Supply voltage
Case temperature
Output current
Logic inputs
Error outputs
Data Sheet
5
V1.2, 2008-03-18
TLE 4729 G
Characteristics
VS = 6 to 16 V; Tj = – 40 to 130 °C
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit Test Condition
Current Consumption
From + VS
IS
–
–
50
µA
From + VS
IS
20
30
50
mA
IOSC
VOSCL
VOSCH
fOSC
90
0.8
1.7
18
120
1.3
2.3
24
150
1.9
2.9
30
µA
V
V
kHz
–
–
–
IQ
–
0
–
mA
IX0 = L; IX1 = L
Vch
Vcs
Vca
40
410
630
70
450
700
100
510
800
mV
mV
mV
IX0 = H; IX1 = L
IX0 = L; IX1 = H
IX0 = H; IX1 = H
VI
VIHy
IIL
IIL
IIH
1.2
–
– 10
– 100
–1
1.7
200
–1
– 20
0
2.2
–
1
–5
10
V
mV
µA
µA
µA
–
–
VI
VIHy
IIL
IIH
0.8
–
– 100
5
1.7
200
–
20
2.2
–
+5
50
V
mV
µA
µA
–
–
IXX = L; VS = 12 V;
Tj ≤ 85 °C
IQ1, 2 = 0 A
Oscillator
Output charging current
Charging threshold
Discharging threshold
Frequency
COSC = 2.2 nF
Phase Current (VS = 9 … 16 V)
Mode “no current”
Voltage threshold of
current Comparator at
Rsense in mode:
Hold
Setpoint
Accelerate
Logic Inputs (Phase X)
Threshold
Hysteresis
L-input current
L-input current
H-input current
VI = 1.2 V
VI = 0 V
VI = 5 V
Logic Inputs (IX1; IX0)
Threshold
Hysteresis
L-input current
H-input current
Data Sheet
6
VI = 0 V
VI = 5 V
V1.2, 2008-03-18
TLE 4729 G
Characteristics (cont’d)
VS = 6 to 16 V; Tj = – 40 to 130 °C
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
VErrSat
IErrL
50
–
200
–
500
10
mV
µA
IErr = 1 mA
VErr = 25 V
Tjsd
Tjpa
∆Tj
Tjsdhy
Tjpahy
140
120
10
–
–
150
130
20
20
20
160
140
30
–
–
°C
°C
K
K
K
IQ1, 2 = 0 A
VErr = L
∆Tj = Tjsd – Tjpa
0.3
0.5
1000
0.9
1.0
0.5
0.8
1500
1.2
1.3
V
V
µA
V
V
IQ = – 0.45 A
IQ = – 0.7 A
VS = VQ = 40 V
IQ = 0.45 A
IQ = 0.7 A
IQ = 0.45 A; charge
IQ = 0.45 A;
Error Outputs
Saturation voltage
Leakage current
Thermal Protection
Shutdown
Prealarm
Delta
Hysteresis shutdown
Hysteresis prealarm
–
–
Power Outputs
Diode Transistor Sink Pair
(D13, T13; D14, T14; D23, T23; D24, T24)
Saturation voltage
Saturation voltage
Reverse current
Forward voltage
Forward voltage
VsatI
VsatI
IRI
VFI
VFI
0.1
0.2
500
0.6
0.7
Diode Transistor Source Pair
(T11, D11; T12, D12; T21, D21; T22, D22)
Saturation voltage
Saturation voltage
VsatuC
VsatuD
0.6
0.1
1.0
0.3
1.2
0.6
V
V
Saturation voltage
Saturation voltage
VsatuC
VsatuD
0.7
0.2
1.2
0.5
1.5
0.8
V
V
Reverse current
Forward voltage
Forward voltage
Diode leakage current
IRu
VFu
VFu
ISL
400
0.7
0.8
0
800
1.0
1.1
3
1200
1.3
1.4
10
µA
V
V
mA
Data Sheet
7
discharge
IQ = 0.7 A; charge
IQ = 0.7 A;
discharge
VS = 40 V, VQ = 0 V
IQ = – 0.45 A
IQ = – 0.7 A
IF = – 0.7 A
V1.2, 2008-03-18
TLE 4729 G
Characteristics (cont’d)
VS = 6 to 16 V; Tj = – 40 to 130 °C
Parameter
Symbol
Limit Values
min.
typ.
max.
–
–
–
–
–
–
–
5
12
45
15
30
3
1
20
100
100
50
80
10
5
Unit Test Condition
Error Output Timing
Time Phase X to IXX
Time IXX to Phase X
Delay Phase X to Error 2
Delay Phase X to Error 1
Delay IXX to Error 2
Reset delay after Phase X
Reset delay after IXX
tPI
tIP
tPEsc
tPEol
tIEsc
tRP
tRI
µs
µs
µs
µs
µs
µs
µs
–
For details see next four pages.
These parameters are not 100% tested in production, but guaranteed by design.
Data Sheet
8
V1.2, 2008-03-18
TLE 4729 G
Diagrams
Timing between IXX and Phase X to prevent setting the error flag
Operating conditions:
+ VS = 14 V, Tj = 25 °C, Ierr = 1 mA, load = 3.3 mH, 1 Ω
a)
Ι XX
Phase X
t PI
AET02197
If tPI < typ. 5 µs, an error “open load” will be set.
b)
Ι XX
Phase X
t IP
AET02198
If tIP < typ. 12 µs, an error “open load” will be set.
Data Sheet
9
V1.2, 2008-03-18
TLE 4729 G
This time strongly depends on + VS and inductivity of the load, see diagram below.
Time tIP vs. Load Inductivity
AED02199
30
t IP
µs
25
VS= 6 V
20
15
10
9V
12 V
16 V
5
0
0
10
20
30
40
mH
L
60
Propagation Delay of the Error Flag
Operating conditions:
+ VS = 14 V, Tj = 25 °C, Ierr = 1 mA, load = 3.3 mH, 1 Ω
a) IXX = H, error condition: short circuit to GND.
Phase X
Error 2
t PEsc
AED02200
typ. tPEsc: 45 µs
Data Sheet
10
V1.2, 2008-03-18
TLE 4729 G
b) IXX = H, error condition: open load (equivalent: short circuit to + VS).
Phase X
Error 1
t PEol
AET02201
typ. tPEol: 15 µs
c) Phase X = H or L, const.; error condition: short circuit to GND.
Ι XX
Error 2
t IEsc
AET02202
typ. tIEsc: 30 µs
tIEsc is also measured under the condition: begin of short circuit to GND till error flag set.
Data Sheet
11
V1.2, 2008-03-18
TLE 4729 G
d) IXX = H, reset of error flag when error condition is not true.
Phase x
Error X
t RP
AET02203
typ. tRP: 3 µs
e) Phase X = H or L, const.; reset of error flag when error condition is not true.
Ι XX
Error X
t RI
AET02204
typ. tRI: 1 µs
Data Sheet
12
V1.2, 2008-03-18
TLE 4729 G
Quiescent Current IS vs. Supply Voltage VS;
bridges not chopping; Tj = 25 °C
AED02205
60
ΙS
Quiesc. Current IS vs. Junct. Temp. Tj;
bridges not chopping, VS = 14 V
mA
Ι QX =
50
0.70 A
AED02206
60
Ι QX = 0.70 A
mA
ΙS
50
0.45 A
0.45 A
40
40
0.07 A
0.07 A
30
30
20
20
10
10
0
-50
0
5
10
15
V
20
0
50
VS
Oscillator Frequency fOsc vs.
Junction Temperature Tj
Output Current IQX vs.
Junction Temperature Tj
AED02207
30
100 C 150
Tj
AED02208
800
mA
700
kHz
f Osc
Ι QX
Ι X1 = H, Ι X0 = H
600
25
500
Ι X1 = H, Ι X0 = L
400
VS = 14 V
C OSC = 2.2 nF
300
20
V S = 14 V
R X = 1Ω
200
100
15
-50
Data Sheet
0
50
0
-50
100 C 150
Tj
13
0
50
100 C 150
Tj
V1.2, 2008-03-18
TLE 4729 G
Output Saturation Voltages Vsat
vs. Output Current IQ
Forward Current IF of Free-Wheeling Diodes
vs. Forward Voltages VF
AED02209
2.0
V sat
ΙF
V S = 14 V
T j = 25 C
V
A
T j = 25 ˚C
V Fl
V Fu
0.8
1.5
0.6
V satuC
1.0
AED02210
1.0
0.4
V satl
V satuD
0.5
0.2
0
0
0.2
0.4
0
0.6 A 0.8
ΙQ
C OSC
TC
3
V 1.5
AED02212
16
P tot
L phase x = 10 mH
R phase x = 2 Ω
W
1.0
Permissible Power Dissipation Ptot vs.
Case Temp. TC (measured at pin 5)
AED02211
4
0.5
VF
Typical Power Dissipation Ptot vs.
Output Current IQ (non stepping)
P tot
0
W
= 2.2 nF
= 25 C
12
10
both phases active
8
2
V S = 14 V
T jmax =
150 C
6
120 C
4
1
2
0
0
0.2
0.4
0
-25
0.6 A 0.8
ΙQ
Data Sheet
14
0
25
75
125 C 175
TC
V1.2, 2008-03-18
TLE 4729 G
Input Characteristics of IXX, Phase X
i Ι xx
Output Leakage Current
AED02213
40
µA
20
AED02214
1.2
Ι xx
ΙR
mA
0.8
0
V S = 40 V
Phase X
-20
0.4
V S = 16 V
-40
Tj =
-60
0
40 C
25 C
150 C
-80
-0.4
-100
-120
-6
-0.8
-4
-2
0
2
4 V 6
V Ι xx
0
10
20
30 V
VQ
40
Quiescent Current IS vs. Supply Voltage VS;
inhibit mode; Tj = 25 °C
ΙS
AED02215
250
µA
200
150
100
50
0
0
Data Sheet
5
10
15 V
VS
20
15
V1.2, 2008-03-18
TLE 4729 G
+12V
100 nF
1
2
3
21
Microcontroller
14
24
23
22
11
VS
Ι 10
Ι 11
Q11
Phase 1
Error 1
Error 2
Q12
TLE 4729 G
Ι 20
Ι 21
Phase 2
OSC
4
22 nF
100 µ F
Q21
Q22
15
R2
1Ω
10
R1
1Ω
9
12
16
13
M
Stepper
Motor
GND
5,6,7,8,
17,18,19,20
AES02216
Figure 3
Data Sheet
Application Circuit
16
V1.2, 2008-03-18
TLE 4729 G
100 µF
VS
100 nF
ΙS
+V S
ΙΙ
Ι Err
VΙ
V satu
Ι XX, Phase X
V Fu
Ι Rl
TLE 4729 G
Output
Error X
Ι Ru
ΙQ
V satl
Osc
V Err
Ι OSC
V OSC
R sense
GND
Ι SL Ι GND
2.2 nF
V Fl
Ι Rsense
VC
1Ω
AES02217
Figure 4
Data Sheet
Test Circuit
17
V1.2, 2008-03-18
TLE 4729 G
full step operation
normal mode
accelerate mode
Ι 10
H
L
Ι 11
H
L
Phase 1
H
L
t
t
t
i acc
i set
Ι Q1
t
- i set
- i acc
i acc
i set
Ι Q2
t
- i set
- i acc
Phase 2
H
L
Ι 20
H
L
Ι 21
H
L
t
t
t
AED02218
Figure 5
Data Sheet
Full Step Operation
18
V1.2, 2008-03-18
TLE 4729 G
half step operation
normal mode
accelerate mode
Ι 10
H
L
Ι 11
H
L
Phase 1
H
L
t
t
t
i acc
i set
Ι Q1
t
- i set
- i acc
i acc
i set
Ι Q2
t
- i set
- i acc
Phase 2
H
L
Ι 20
H
L
Ι 21
H
L
t
t
t
AED02219
Figure 6
Data Sheet
Half Step Operation
19
V1.2, 2008-03-18
TLE 4729 G
V Osc
V Osc H
V Osc L
t
Ι Rsense 1
0
t
Ι Rsense 2
0
t
V Q12
+ VS
V FU
V satl
V ca
0
t
V Q11
+ VS
V satu D
V satu C
V Q22
+ VS
0
V Q21
+ VS
t
Ι Q1
i acc
Ι Q2
t
i acc
t
Operating conditions:
VS
= 14 V
L phase x = 10 mH
R phase x = 4 Ω
Figure 7
Data Sheet
Phase x = H
=H
Ι XX
AED02220
Current Control in Chop-Mode
20
V1.2, 2008-03-18
TLE 4729 G
V Osc
2.3 V
1.3 V
0V
Oscillator
High Imped.
Phase change-over
t
Phase H
L
t
Ι Rsense 1
0
t
V Q11
+V S
High
Impedance
t
V Q12
+VS
High
Impedance
t
Ι set
Ι Phase 1
fast current
decay
slow current decay
T1
- Ι set
Operating conditions:
VS
= 14 V
L phase 1 = 1 mH
R phase 1 = 4 Ω
Figure 8
Data Sheet
t
Ι 11 = L for t < T 1
Ι 11 = H for t > T 1
Ι 10 = Ι 2X = L
slow current decay
AED02221
Phase Reversal and Inhibit
21
V1.2, 2008-03-18
TLE 4729 G
Calculation of Power Dissipation
The total power dissipation Ptot is made up of
Saturation losses Psat
(transistor saturation voltage and diode forward voltages),
Quiescent losses Pq
(quiescent current times supply voltage) and
Switching losses Ps
(turn-ON / turn-OFF operations).
The following equations give the power dissipation for chopper operation without phase
reversal.
This is the worst case, because full current flows for the entire time and switching losses
occur in addition.
Ptot = 2 × Psat + Pq + 2 × Ps
where
Psat ≅ IN {VsatI × d + VFu (1 – d) + VsatuC × d + VsatuD (1 – d)}
Pq = Iq × VS
V i D × t DON ( i D + i R ) × t ON I N
P q ≅ ------S- ------------------------ + -------------------------------------- + ----- ( t DOFF + t OFF )
2
2
4
T
IN
= Nominal current (mean value)
Iq
= Quiescent current
iD
= Reverse current during turn-on delay
iR
= Peak reverse current
tp
= Conducting time of chopper transistor
tON = Turn-ON time
tOFF = Turn-OFF time
tDON = Turn-ON delay
tDOFF = Turn-OFF delay
T
= Cycle duration
d
= Duty cycle tp / T
Vsatl = Saturation voltage of sink transistor (TX3, TX4)
VsatuC = Saturation voltage of source transistor (TX1, TX2) during charge cycle
VsatuD = Saturation voltage of source transistor (TX1, TX2) during discharge cycle
VFu = Forward voltage of free-wheeling diode (DX1, DX2)
VS = Supply voltage
Data Sheet
22
V1.2, 2008-03-18
TLE 4729 G
+V S
Dx1
Tx1
Dx2
Tx2
L
Dx3
Tx3
Dx4
Tx4
VC
R sense
AET02222
Figure 9
Turn-ON
Turn-OFF
ΙN
iR
Voltage and
Current on
Chopper
Transistor
iD
V S + V Fu
V S + V Fu
V satl
t D ON
t ON
t D OFF
t OFF
tP
Figure 10
Data Sheet
t
AET02223
Voltage and Current on Chopper Transistor
23
V1.2, 2008-03-18
TLE 4729 G
Application Hints
The TLE4729G is intended to drive both phases of a stepper motor. Special care has
been taken to provide high efficiency, robustness and to minimize external components.
Power Supply
The TLE4729G will work with supply voltages ranging from 5 V to 16 V at pin VS. Surges
exceeding 16 V at VS wont harm the circuit up to 45 V, but whole function is not
guaranteed. As soon as the voltage drops below approximately 16 V the TLE4729G
works promptly again.
As the circuit operates with chopper regulation of the current, interference generation
problems can arise in some applications. Therefore the power supply should be
decoupled by a 0.1 µF ceramic capacitor located near the package. Unstabilized
supplies may even afford higher capacities.
Inhibit Mode
In the case of low at all four current program inputs IXX the device will switch into inhibit
condition; the current consumption is reduced to very low values.
When starting operation again, i.e. putting at least one IXX to high potential, the Error 1
output signals an open load error if the corresponding phase input is high. The error is
reset by first recirculation in chop mode.
Current Sensing
The current in the windings of the stepper motor is sensed by the voltage drop across
Rsense. Depending on the selected current internal comparators will turn off the sink
transistor as soon as the voltage drop reaches certain thresholds (typical 0 V, 0.07 V,
0.45 V and 0.7 V). These thresholds are not affected by variations of VS. Consequently
instabilized supplies will not affect the performance of the regulation. For precise current
level it must be considered, that internal bounding wire (typ. 60 mΩ) is a part of Rsense.
Due to chopper control fast current rises (up to 10 A/µs) will occur at the sensing
resistors. To prevent malfunction of the current sensing mechanism Rsense should be
pure ohmic. The resistors should be wired to GND as directly as possible. Capacitive
loads such as long cables (with high wire to wire capacity) to the motor should be
avoided for the same reason.
Synchronizing Several Choppers
In some applications synchrone chopping of several stepper motor drivers may be
desirable to reduce acoustic interference. This can be done by forcing the oscillator of
the TLE4729G by a pulse generator overdriving the oscillator loading currents
(approximately ± 120 µA). In these applications low level should be between 0 V and
0.8 V while high level should between 3 V and 5 V.
Data Sheet
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V1.2, 2008-03-18
TLE 4729 G
Application Hints (cont’d)
Optimizing Noise Immunity
Unused inputs should always be wired to proper voltage levels in order to obtain highest
possible noise immunity.
To prevent crossconduction of the output stages the TLE4729G uses a special break
before make timing of the power transistors. This timing circuit can be triggered by short
glitches (some hundred nanoseconds) at the phase inputs causing the output stage to
become high resistive during some microseconds. This will lead to a fast current decay
during that time. To achieve maximum current accuracy such glitches at the phase
inputs should be avoided by proper control signals.
To lower EMI a ceramic capacitor of max. 3 nF is advisable from each output to GND.
Thermal Shut Down
To protect the circuit against thermal destruction, thermal shut down has been
implemented.
Error Monitoring
The error outputs signal corresponding to the logic table the errors described below.
Logic Table
Kind of Error
Error Output
Error 1
Error 2
a) No error
H
H
b) Short circuit to GND
H
L
c) Open
load1)
L
H
d) b) and c) simultaneously
H
L
e) Temperature prealarm
L
L
1)
Also possible: short circuit to + VS or short circuit of the load.
Over-Temperature is implemented as pre-alarm; it appears approximately 20 K before
thermal shut down. To detect an open load, the recirculation of the inductive load is
watched. If there is no recirculation after a phase change-over, an internal error flipflop
is set. Because in most kinds of short circuits there won’t flow any current through the
motor, there will be no recirculation after a phase change-over, and the error flipflop for
open load will be set, too. Additionally an open load error is signaled after a phase
change-over during hold mode.
Data Sheet
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V1.2, 2008-03-18
TLE 4729 G
Only in the case of a short circuit to GND, the most probably kind of a short circuit in
automotive applications, the malfunction is signaled dominant (see d) in logic table) by
a separate error flag. Simultaneously the output current is disabled after 30 µs to prevent
disturbances.
A phase change-over or putting both current control inputs of the affected bridge on low
potential resets the error flipflop. Being a separate flipflop for every bridge, the error can
be located in easy way.
Data Sheet
26
V1.2, 2008-03-18
TLE 4729 G
1.27
0.35
8˚ MAX.
+0.0
7.6 -0.2 1)
9
0.35 x 45˚
0.23
2.45 -0.2
2.65 MAX.
0.2 -0.1
Package Outlines
0.4 +0.8
0.1
+0.15 2)
0.2 24x
24
1
10.3 ±0.3
13
15.6 -0.4 1)
12
Index Marking
1)
2)
Figure 11
Does not include plastic or metal protrusion of 0.15 max. per side
Lead width can be 0.61 max. in dambar area
PG-DSO-24-16 (Plastic Green Dual Small Outline)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products
and to be compliant with government regulations the device is available as a green
product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable
for Pb-free soldering according to IPC/JEDEC J-STD-020).
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
Dimensions in mm
SMD = Surface Mounted Device
Data Sheet
27
V1.2, 2008-03-18
TLE 4729 G
Revision History
Version
Rev. 1.1
Date
Changes
2007-09-17 RoHS-compliant version of the TLE 4729 G
• All pages: Infineon logo updated
• Page 2:
“added AEC qualified” and “RoHS” logo, “Green Product
(RoHS compliant)” and “AEC qualified” statement added to
feature list, package name changed to RoHS compliant
versions, package picture updated, ordering code
removed
• Page 27:
Package name changed to RoHS compliant versions,
“Green Product” description added
• added Revision History
• added Legal Disclaimer
Rev. 1.2
Data Sheet
2008-03-18
• Update Package suffix
28
V1.2, 2008-03-18
TLE 4729 G
Edition V1.2, 2008-03-18
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2008 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
Data Sheet
29
V1.2, 2008-03-18