PHILIPS PRTR5V0U8S

PRTR5V0U8S
Integrated octal low-capacity ESD protection to IEC 61000-4-2
level 4
Rev. 01 — 14 January 2008
Preliminary data sheet
1. Product profile
1.1 General description
The PRTR5V0U8S is designed to protect Input/Output (I/O) ports that are sensitive
concerning capacitive load, such as USB 2.0, Ethernet, Digital Video Interface (DVI), etc.
from destruction by ElectroStatic Discharges (ESD).
Therefore, the PRTR5V0U8S incorporates eight pairs of ultra-low capacity rail-to-rail
diodes plus an additional Zener diode to provide protection to downstream signal and
supply components from ESD voltages as high as ±8 kV contact discharge.
Due to the rail-to-rail diodes being connected to the Zener diode, the protection is working
independent from the availability of a supply voltage.
The PRTR5V0U8S is fabricated using thin film-on-silicon technology and integrates eight
pairs of ultra-low capacity rail-to-rail ESD protection diodes in a miniature 10-lead
TSSOP10 package.
1.2 Features
n
n
n
n
n
n
n
n
Pb-free and RoHS (Restriction of Hazardous Substances) compliant, dark green
ESD protection of up to eight Hi-Speed data lines or high-frequency signal lines
Eight pairs of ESD rail-to-rail protection diodes
Ultra-low input capacitance: C(I/O-GND) = 1 pF
ESD protection up to 8 kV (contact discharge compliant)
IEC 61000-4-2, level 4 (ESD)
Low voltage clamping due to an integrated protection Zener diode
Small TSSOP10 (SOT552-1) package
1.3 Applications
n General-purpose downstream ESD protection high-frequency analog signals and
high-speed serial data transmission for ports inside:
u Cellular and Personal Communication System (PCS) mobile handsets
u USB 2.0 ports in PC or Notebook
u IEEE 1394 ports
u Digital Video Interface (DVI) and High Definition Multimedia Interface (HDMI)
u Cordless telephones
u Wireless data: Wide Area Network (WAN) and Local Area Network (LAN) systems
u Personal Digital Assistants (PDAs)
PRTR5V0U8S
NXP Semiconductors
Integrated octal low-capacity ESD protection
2. Pinning information
Table 1.
Pinning
Pin
Description
Simplified outline
1
ESD protection I/O 1
2
ESD protection I/O 2
3
ground (GND)
4
ESD protection I/O 3
5
ESD protection I/O 4
6
ESD protection I/O 5
7
ESD protection I/O 6
8
supply voltage (VCC)
9
ESD protection I/O 7
10
ESD protection I/O 8
10
Symbol
6
1
5
1
10
2
9
3
8
4
7
5
6
001aah386
3. Ordering information
Table 2.
Ordering information
Type number
PRTR5V0U8S
Package
Name
Description
Version
TSSOP10
plastic thin shrink small outline package; 10 leads;
body width 3 mm
SOT552-1
4. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Min
Max
Unit
V(I/O-GND)
input/output to ground voltage
0
5.5
V
Tstg
storage temperature
−55
+125
°C
Table 4.
Conditions
ESD standards compliance
Standard
Conditions
Per diode
IEC 61000-4-2; level 4 (ESD)
≤ 8 kV (contact)
PRTR5V0U8S_1
Preliminary data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 01 — 14 January 2008
2 of 7
PRTR5V0U8S
NXP Semiconductors
Integrated octal low-capacity ESD protection
5. Recommended operating conditions
Table 5.
Operating conditions
Symbol
Parameter
Tamb
ambient temperature
Conditions
Min
Typ
Max
Unit
−40
-
+85
°C
6. Characteristics
Table 6.
Characteristics
Tamb = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Protection diodes
C(I/O-GND) input/output to ground
capacitance
reverse leakage current
ILR
VI = 0 V; f = 1 MHz; VCC = 3 V
[1]
-
1.0
-
pF
VI = 3 V
[1]
-
-
100
nA
II = 1 mA
[2]
6
-
9
V
VI = 0 V; f = 1 MHz; VCC = 3 V
[2]
-
30
-
pF
-
0.7
-
V
Zener diode
breakdown voltage
VBR
Csup
supply pin to ground
capacitance
VF
forward voltage
[1]
Measured from pin 1, 2, 4, 5, 6, 7, 9 and 10 to ground
[2]
Measured from pin 8 to ground
PRTR5V0U8S_1
Preliminary data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 01 — 14 January 2008
3 of 7
PRTR5V0U8S
NXP Semiconductors
Integrated octal low-capacity ESD protection
7. Package outline
TSSOP10: plastic thin shrink small outline package; 10 leads; body width 3 mm
D
E
SOT552-1
A
X
c
y
HE
v M A
Z
6
10
A2
(A3)
A1
A
pin 1 index
θ
Lp
L
1
5
detail X
e
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.15
0.23
0.15
3.1
2.9
3.1
2.9
0.5
5.0
4.8
0.95
0.7
0.4
0.1
0.1
0.1
0.67
0.34
6°
0°
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-07-29
03-02-18
SOT552-1
Fig 1. Package outline SOT552-1 (TSSOP10)
PRTR5V0U8S_1
Preliminary data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 01 — 14 January 2008
4 of 7
PRTR5V0U8S
NXP Semiconductors
Integrated octal low-capacity ESD protection
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PRTR5V0U8S_1
20080114
Preliminary data sheet
-
-
PRTR5V0U8S_1
Preliminary data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 01 — 14 January 2008
5 of 7
PRTR5V0U8S
NXP Semiconductors
Integrated octal low-capacity ESD protection
9. Legal information
9.1
Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
9.2
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
9.3
Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
9.4
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
10. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: [email protected]
PRTR5V0U8S_1
Preliminary data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 01 — 14 January 2008
6 of 7
PRTR5V0U8S
NXP Semiconductors
Integrated octal low-capacity ESD protection
11. Contents
1
1.1
1.2
1.3
2
3
4
5
6
7
8
9
9.1
9.2
9.3
9.4
10
11
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . .
General description. . . . . . . . . . . . . . . . . . . . . .
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pinning information . . . . . . . . . . . . . . . . . . . . . .
Ordering information . . . . . . . . . . . . . . . . . . . . .
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended operating conditions. . . . . . . .
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . .
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .
Revision history . . . . . . . . . . . . . . . . . . . . . . . . .
Legal information. . . . . . . . . . . . . . . . . . . . . . . .
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contact information. . . . . . . . . . . . . . . . . . . . . .
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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1
1
1
2
2
2
3
3
4
5
6
6
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6
6
7
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 14 January 2008
Document identifier: PRTR5V0U8S_1