FAIRCHILD FDD3570

FDD3570
80V N-Channel PowerTrench MOSFET
General Description
Features
This N-Channel Logic level MOSFET has been
designed specifically to improve the overall efficiency of
DC/DC converters using either synchronous or
conventional switching PWM controllers.
• 10 A, 80 V.
RDS(ON) = 0.019 Ω @ VGS = 10 V
RDS(ON) = 0.022 Ω @ VGS = 6 V.
• Fast switching speed.
This MOSFET features faster switching and lower gate
change than other MOSFETs with comparable RDS(ON)
specifications resulting in DC/DC power supply designs
with higher overall efficiency.
• High performance trench technology for extremely
low RDS(ON) .
• High power and current handling capability.
D
D
G
S
G
TO-252
S
Absolute Maximum Ratings
Symbol
o
TA=25 C unless otherwise noted
Parameter
Ratings
Units
VDSS
Drain-Source Voltage
80
V
VGSS
Gate-Source Voltage
± 20
V
ID
Maximum Drain Current-Continuous
(Note 1)
43
A
(Note 1a)
10
Maximum Drain Current – Pulsed
110
Maximum Power Dissipation @TC = 25oC
PD
(Note 1)
69
TA = 25 C
(Note 1a)
3.4
TA = 25oC
(Note 1b)
o
TJ, Tstg
Operating and Storage Junction Temperature Range
W
1.3
-55 to +150
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction-to- Case
(Note 1)
1.8
°C/W
RθJA
Thermal Resistance, Junction-to- Ambient
(Note 1a)
37
°C/W
(Note 1b)
96
°C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDD3570
FDD3570
13’’
16mm
2500
2000 Fairchild Semiconductor Corporation
FDD3570 Rev BW)
FDD3570
February 2000
PRELIMINARY
Symbol
TA = 25°C unless otherwise noted16
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
∆BVDSS
∆TJ
IDSS
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
ID = 250 µA,Referenced to 25°C
IGSSF
Gate–Body Leakage Current,
Forward
Gate–Body Leakage Current,
Reverse
IGSSR
On Characteristics
80
V
78
mV/°C
VDS = 64 V,
VGS = 0 V
1
µA
VGS = 20 V,
VDS = 0 V
100
nA
VGS = –20 V
VDS = 0 V
–100
nA
(Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID = 250 µA,Referenced to 25°C
-7
0.015
0.027
0.016
ID(on)
On–State Drain Current
VGS = 10 V, ID = 10 A
VGS = 10 V, ID = 10 A,TJ =125°C
VGS = 6 V, ID = 9 A
VGS = 10 V,
VDS = 5 V
gFS
Forward Transconductance
VDS = 5 V,
ID = 14 A
40
VDS = 40 V,
f = 1.0 MHz
V GS = 0 V,
2800
pF
230
pF
117
pF
2
2.4
4
V
mV/°C
0.019
0.038
0.022
25
Ω
A
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
Turn–Off Delay Time
tf
Turn–Off Fall Time
Qg
Total Gate Charge
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
(Note 2)
VDD = 40 V,
VGS = 10 V,
VDS = 40V,
VGS = 10 V
ID = 1 A,
RGEN = 6 Ω
ID = 9 A,
20
32
ns
12
24
ns
60
95
ns
24
38
ns
54
76
nC
9.6
nC
14
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
VSD
Drain–Source Diode Forward
Voltage
VGS = 0 V,
IS = 2.8 A
(Note 2)
0.72
2.8
A
1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) RθJA = 40°/W when mounted on a
2
1in pad of 2 oz copper
b) RθJA = 96°/W when mounted on
a minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDD3570 Rev. A(W)
FDD3570
Electrical Characteristics
FDD3570
Typical Characteristics
2
ID, DRAIN CURRENT (A)
VGS = 10V
5.0V
6.0V
40
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
50
4.5V
30
4.0V
20
10
3.5V
1.8
1.6
VGS = 4.0V
1.4
4.5V
5.0V
1.2
6.0V
7.0V
0.8
0
0
1
2
0
3
10
20
Figure 1. On-Region Characteristics.
40
50
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.04
2
ID = 10 A
ID = 9A
VGS = 10V
1.8
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
30
ID, DRAIN CURRENT (A)
VDS, DRAIN-SOURCE VOLTAGE (V)
1.6
1.4
1.2
1
0.8
0.6
0.4
-50
-25
0
25
50
75
100
125
0.03
TA = 125oC
0.02
TA = 25oC
0.01
0
150
2
TJ, JUNCTION TEMPERATURE (oC)
4
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
50
I S, REVERSE DRAIN CURRENT (A)
VDS = 5V
ID, DRAIN CURRENT (A)
10V
1
40
30
20
o
125 C
10
o
25 C
o
TA = -55 C
VGS = 0V
10
o
TA = 125 C
1
o
25 C
0.1
o
-55 C
0.01
0.001
0.0001
0
2
3
4
5
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
6
0
0.2
0.4
0.6
0.8
1
1.2
1.4
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDD3570 Rev. A(W)
FDD3570
Typical Characteristics
4000
VDS = 10V
ID = 9A
f = 1MHz
VGS = 0 V
3500
20V
8
40V
CAPACITANCE (pF)
VGS, GATE-SOURCE VOLTAGE (V)
10
6
4
3000
CISS
2500
2000
1500
1000
2
500
0
COSS
CRSS
0
0
10
20
30
40
50
60
0
10
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
P(pk), PEAK TRANSIENT POWER (W)
ID, DRAIN CURRENT (A)
40
50
60
200
RDS(ON) LIMIT
100µs
1ms
10ms
10
100ms
1s
1
10s
VGS = 10V
SINGLE PULSE
RθJA = 96oC/W
0.1
DC
TA = 25oC
0.01
0.1
1
10
SINGLE PULSE
RθJA = 96 °C/W
TA = 25°C
150
100
50
0
0.01
100
0.1
VDS, DRAIN-SOURCE VOLTAGE (V)
1
10
100
1000
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE TRANSIEN
THERMAL RESISTANCE
30
Figure 8. Capacitance Characteristics.
1000
100
20
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) + RθJA
0.2
0.1
RθJA = 96 °C/W
0.1
0.05
P(pk)
0.02
0.01
t1
0.01
t2
TJ - TA = P * RθJA(t)
SINGLE PULSE
0.001
0.0001
0.001
0.01
Duty Cycle, D = t1 / t2
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDD3570 Rev. A(W)
TO-252 Tape and Reel Data and Package Dimensions
D-PAK (TO-252) Packaging
Configuration: Figure 1.0
Packaging Description:
TO-252 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
2500 units per 13" or 330cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (antistatic coated). This and some other options are further
described in the Packaging Information table.
EL ECT ROST AT IC
SEN SIT IVE DEVICES
DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC
EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S
TNR D ATE
PT NUMB ER
PEEL STREN GTH MIN ___ __ ____ __ ___gms
MAX ___ ___ ___ ___ _ gms
Antistatic Cover Tape
ESD Label
These full reels are individually barcode labeled and
placed inside a standard intermediate box (illustrated in
figure 1.0) made of recyclable corrugated brown paper.
One box contains two reels maximum. And these boxes
are placed inside a barcode labeled shipping box which
comes in different sizes depending on the number of parts
shipped.
Static Dissipative
Embossed Carrier Tape
F63TNR
Label
FZ9935
FDD
6680
FZ9935
FDD
6680
FZ9935
FDD
6680
FZ9935
FDD
6680
D-PAK (TO-252) Packaging Information
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Reel Size
Standard
(no flow code)
TNR
D-PAK (TO-252) Unit Orientation
2,500
13" Dia
Box Dimension (mm)
359x359x57
Max qty per Box
5,000
Weight per unit (gm)
0.300
Weight per Reel(kg)
1.200
359mm x 359mm x 57mm
Standard Intermediate box
ESD Label
Note/Comments
F63TNR Label sample
F63TNR Label
LOT: CBVK741B019
QTY: 2500
FSID: FDD6680
SPEC:
D/C1: Z9942
D/C2:
QTY1:
QTY2:
SPEC REV:
CPN:
N/F: F
(F63TNR)3
TO-252 (D-PAK) Tape Leader and
Trailer Configuration: Figure 2.0
Carrier Tape
Cover Tape
Components
Trailer Tape
640mm minimum or
80 empty pockets
Leader Tape
1680mm minimum or
210 empty pockets
July 1999, Rev. A
TO-252 Tape and Reel Data and Package Dimensions
D-PAK (TO-252) Embossed Carrier
Tape Configuration: Figure 3.0
P0
D0
T
E1
F
K0
Wc
W
E2
B0
Tc
A0
D1
P1
User Direction of Feed
Dimensions are in millimeter
Pkg type
TO252
(24mm)
A0
B0
6.90
+/-0.10
10.50
+/-0.10
W
16.0
+/-0.3
D0
D1
E1
E2
1.55
+/-0.05
1.5
+/-0.10
1.75
+/-0.10
F
14.25
min
7.50
+/-0.10
P1
P0
8.0
+/-0.1
4.0
+/-0.1
K0
2.65
+/-0.10
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
T
Wc
0.30
+/-0.05
0.06
+/-0.02
0.9mm
maximum
10 deg maximum
Typical
component
cavity
center line
B0
13.0
+/-0.3
Tc
0.9mm
maximum
10 deg maximum component rotation
Typical
component
center line
Sketch A (Side or Front Sectional View)
A0
Component Rotation
Sketch C (Top View)
Component lateral movement
Sketch B (Top View)
D-PAK (TO-252) Reel
Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A
Max
B Min
Dim C
Dim A
max
Dim D
min
Dim N
DETAIL AA
See detail AA
W3
13" Diameter Option
W2 max Measured at Hub
Dimensions are in inches and millimeters
Tape Size
164mm
Reel
Option
13" Dia
Dim A
Dim B
13.00
330
0.059
1.5
Dim C
512 +0.020/-0.008
13 +0.5/-0.2
Dim D
0.795
20.2
Dim N
4.00
100
Dim W1
0.646 +0.078/-0.000
16.4 +2/0
Dim W2
0.882
22.4
Dim W3 (LSL-USL)
0.626 – 0.764
15.9 – 19.4
July 1999, Rev. A
TO-252 Tape and Reel Data and Package Dimensions
TO-252 (FS PKG Code AA)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.300
September 1999, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench 
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
SyncFET™
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. D