13554946866 393298913 [email protected] MSN: [email protected] CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Revision History Version 1.8 DATE 2007/09/20 Description Preliminary Datasheet Ordering Information Part No. CY2890-D04 Package 64pin LQFP, Green package Descriptions 7x7x1.4mm 2 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Content 1. General Description ...................................................................................................... 4 2. Features......................................................................................................................... 4 3. Block Diagram ............................................................................................................... 5 4. Pin Assignment.............................................................................................................. 6 5. Pin Description .............................................................................................................. 7 6. Panel Select Table......................................................................................................... 9 7. DC Characteristics......................................................................................................... 9 8. AC Characteristics ....................................................................................................... 11 9. Built-in Patterns........................................................................................................... 27 10. Waveforms ................................................................................................................... 30 11. Package Information................................................................................................... 35 3 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY 1. General Description The CY2890-D04 is a digital TFT-LCD timing controller with built-in “reverse”, “dual”, “flicker”, “AP” and “pattern generator” functions. The input signal is digital R/G/B with HSYNC/VSYNC or DE. User can use the MODE pin to select input signal to be either HSYNC mode or DE mode. The R/G/B input is fixed to 6bits data width and the output is always 6 bits. No dither function is on in this chip. The Reverse function is always on which is designed for reducing EMI. The key is to lower down the R/G/B transition count. The “dual” function can set the output HCLK to latch the output data at both edges. Set “dual” on can lower down the HCLK frequency to half. With the “Reverse” and “dual” functions, the board level system design can be relaxed. We also have a built-in test pattern generator for users to do a quick final test or aging burning test. The built-in test pattern generator has 24 very popular patterns. It will be free running when MODE = 1, HSYNC = 1 or MODE = 0, DE = 1. You can stop the free-running built-in test pattern at any time. The “flicker” function is used to reduce the flicker phenomenon. For CY2890-D04, we have three dedicate RES pins to select different panel resolutions. Through CY2890-D04, all the necessary horizontal and vertical control signals to TFT-LCD are handled automatically. This includes the polarity invert control. There is a built-in power-on reset circuit in the chip, no need for user to add external reset circuit. If users want to extend the power-on reset, an external capacitor can be added. 2. Features Supporting 8 kinds of different digital TFT-LCD panels, clock frequency up to 85M Hz 800 x 480 , 640 x 480, 800 x 600, 1024 x 600, 1024 x 768, 720 x 480, 320 x 240, 480 x 272 Support HSYNC mode or DE mode FLICKER reduction function. Support DUAL edge function Support output data REVERSE function. Support AP function. UDC/LRC scan control Built-in test pattern generator with 24 popular patterns Built-In Power-On reset circuit Built-in polarity inverted function. Provide source and gate drivers control timing. Master clock frequency:75 MHz max. Single supply voltage : +3.0V to +3.6V Wide temperature operation range -40°C / +95°C ESD above 4K 64 LQFP Green Package 4 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY 3. Block Diagram 5 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY 4. Pin Assignment DIO2 STV2 DCLK VSS VDD DIO1 HCLK RO0 RO1 RO2 RO3 RO4 RO5 GO0 GO1 GO2 Pin Assignment for CY2890-D04 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 RI0 49 32 GO3 RI1 50 31 GO4 RI2 51 30 GO5 RI3 52 29 BO0 RI4 53 28 BO1 RI5 54 27 BO2 UDC 55 26 BO3 LRC 56 25 BO4 GI0 57 24 BO5 GI1 58 23 LD GI2 59 22 REV GI3 60 21 POL GI4 61 20 OEV GI5 62 19 CKV REVEN 63 18 STV1 17 VSS 8 BI0 BI1 BI2 BI3 BI4 BI5 9 10 11 12 13 14 15 16 VDD 7 RESETB 6 RES0 5 RES1 4 MODE 3 VSYNC 2 HSYNC 1 DUAL 64 DE text AP RES2 CY2890-D04 6 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY 5. Pin Description Pin No. Symbol I/O 1 AP O 2 DUAL I 3 4 5 6 7 8 BI0 BI1 BI2 BI3 BI4 BI5 I I I I I I 9 DE / ENPG I 10 HSYNC / ENPG I 11 VSYNC / TEST I 12 MODE I 13 14 RES1 RES0 I I 15 RESETB I 16 17 VDD VSS I I 18 STV1 I/O 19 20 21 22 23 24 25 26 27 28 29 30 CKV OEV POL REV LD BO5 BO4 BO3 BO2 BO1 BO0 GO5 O O O O O O O O O O O O Description Internal AP out Enable dual function H : enable L : disable Blue color data input, bit0. Blue color data input, bit1. Blue color data input, bit2. Blue color data input, bit3. Blue color data input, bit4. Blue color data input, bit5 (MSB). MODE = H : Data enable signal input, active high MODE = L : enable built-in pattern generator when Set to High, Stop when set to Low. MODE = L : Negative polarity horizontal sync input MODE = H : enable built-in pattern generator when Set to High, Stop when set to Low. Negative polarity vertical sync input When set mode to DE, this pin must be floating or connected to ground. Tie to VDD at DE mode will force the chip to enter test mode. DE / SYNC mode select H : DE mode L : SYNC mode Resolution select bit 1 Resolution select bit 0 Active low system reset pin Set low will reset the CY2890. Power supply voltage. Power supply ground. Gate driver start pulse 1. UDC = 0, Tri-state UDC = 1, Output Gate driver shift clock. Gate driver output enable Source driver polarity select Source driver data reverse control. Source driver latch pulse and output enable. Blue color data output, bit5 (MSB). Blue color data output, bit4. Blue color data output, bit3. Blue color data output, bit2. Blue color data output, bit1. Blue color data output, bit0 (LSB). Green color data output, bit5 (MSB). 7 pull-down pull-down pull-down pull-down pull-up pull-up/down pull-up/down pull-up DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Pin No. Symbol I/O 31 32 33 34 35 36 37 38 39 40 41 42 GO4 GO3 GO2 GO1 GO0 RO5 RO4 RO3 RO2 RO1 RO0 HCLK O O O O O O O O O O O O 43 DIO1 I/O 44 45 46 VDD VSS DCLK I I I 47 STV2 I/O 48 DIO2 I/O 49 50 51 52 53 54 RI0 RI1 RI2 RI3 RI4 RI5 I I I I I I 55 UDC I 56 LRC I 57 58 59 60 61 62 GI0 GI1 GI2 GI3 GI4 GI5 I I I I I I 63 REVEN I 64 RES2 I Description Internal Green color data output, bit4. Green color data output, bit3. Green color data output, bit2. Green color data output, bit1. Green color data output, bit0. (LSB). Red data output, bit5 (MSB). Red color data output, bit4. Red color data output, bit3 Red color data output, bit2. Red color data output, bit1., Red color data output, bit0. (LSB) Source driver clock Source driver start pulse 1 LRC = 0, Tri-state LRC = 1, Output Power supply voltage. Power supply ground. Clock signal; latch input data at DCLK falling edge. Gate driver start pulse 2. UDC = 0, output UDC = 1, Tri-state Source driver start pulse 2 LRC = 0, output LRC = 1, Tri-state Red color data input, bit0. Red color data input, bit1. Red color data input, bit2. Red color data input, bit3. Red color data input, bit4. Red color data input, bit5 (MSB). Up/Down scan control UDC = 1 => STV1 output, STV2 Tri-state UDC = 0 => STV1 Tri-state, STV2 output Left/right scan control LRC = 1 => DIO1 output, DIO2 Tri-state LRC = 0 => DIO1 Tri-state, DIO2 output Green color data input, bit0. Green color data input, bit1. Green color data input, bit2. Green color data input, bit3. Green color data input, bit4. Green color data input, bit5 (MSB). Data reverse enable or disable L : disable H : enable Panel resolution select bit 2 8 pull-down pull-down pull-up pull-up/down DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY 6. Panel Select Table CY2890-D04 can support 8 different kind panel resolutions. Panel Select Table for CY2890-D04 RES[2:0] RESOLUTION Value Pin64 Pin13 Pin14 0 0 0 0 800x480 1 0 0 1 1024x600 2 0 1 0 640x480 (*) 3 0 1 1 800x600 (*) 4 1 0 0 1024x768 5 1 0 1 720x480 6 1 1 0 320x240 7 1 1 1 480x272 7. DC Characteristics Absolute maximum ratings PARAMETER SYMBOL RATING UNIT Power supply VDD 2.5 to 3.8 V Input voltage VIN -0.3 to VDD +0.3 V Output voltage VOUT -0.3 to VDD +0.3 V Storage temperature TSTG -40 to 125 ℃ Recommended operating conditions PARAMETER SYMBOL MIN. TYP. MAX. UNIT Power supply VDD 3.0 3.3 3.6 V Input voltage VIN 0 - VDD V Operating temperature TOPR -40 - 95 ℃ 9 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY DC Electrical characteristics PARAMETER SYMBOL Input low current IIL Input high current IIH Tri-state leakage current IOZ Logic input low voltage VIL Schmitt input low voltage Logic input high voltage Schmitt input high voltage CONDITION MIN. TYP. MAX. UNIT -1 - 1 µA -1 - 1 µA -10 - 10 µA CMOS - - 0.2VDD V Note 1 VSIL CMOS - - 0.3VDD V Note 2 VIH CMOS 0.8VDD - - V Note 1 VSIH CMOS 0.7VDD - - V Note 2 Output low voltage VOL IOL = 4mA - - 0.3VDD V Note 3 Output high voltage VOH IOH = -4mA 0.7VDD - - V Note 3 Output low voltage VOL IOL = 8mA - - 0.3VDD V Note 4 Output high voltage Input pull up / down resistance VOH IOH = -8mA 0.7VDD - - V Note 4 RI VIL = 0V or VIH = VDD - 90 - KΩ Note 5 No pull-up or pull-down No pull-up or pull-down REMARK Note 1: MODE, UDC, LRC, RI0~RI5, GI0~GI5, BI0~BI5. Note 2: DCLK, HSYNC, VSYNC, DE, RESETB Note 3: CKV, POL, REV, LD, DIO1, DIO2, STV1, STV2, OEV, AP, RO0~RO5, GO0~GO5, BO0~BO5. Note 4: HCLK Note 5: RESETB, HSYNC, VSYNC, DE, MODE, UDC, LRC. 10 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY 8. AC Characteristics SYNC mode Input signal characteristic, 800 x 480 PARAMETER CLOCK PERIOD CLOCK FREQUENCY CLOCK LOW LEVEL WIDTH CLOCK HIGH LEVEL WIDTH CLOCK RISE, FALL TIME HSYNC PERIOD HSYNC PULSE WIDTH HSYNC BACK PORCH HSYNC WIDTH + BACK PORCH HORIZONTAL VALID DATA WIDTH HSYNC FRONT PORCH HORIZONTAL BLANK VSYNC PERIOD VSYNC PULSE WIDTH VSYNC BACK PORCH VERTICAL DATA VALID WIDTH VSYNC FRONT PORCH VERTICAL BLANK DATA SETUP TIME DATA HOLD TIME SYMBOL TCLK FCLK TWCL TWCH TCLKR, TCLKF THP THW THBP THW+ THBP THV THFP THBK TVP TVW TVBP TW TVFP TVBK TDS TDH MIN. TYP. MAX. 25 34 29.5 40 8 8 3 810 928 1600 48 40 88 800 THP – THW - THBP - THV THP – THV 485 525 960 3 29 480 TVP – TVW - TVBP - TW TVP – TW 5 5 - UNIT NS MHZ NS NS NS TCLK TCLK TCLK TCLK TCLK TCLK TCLK THP THP THP THP THP THP NS NS REMARK MIN 25 6 6 TYP 34 29.5 - MAX 40 - UNIT NS MHZ NS NS REMARK - - 3 NS 0.55 5 1600 NS NS NS TCLK TCLK TCLK THP THP THP NS NS NS DE mode Input signal characteristics, 800 x 480 PARAMETER DCLK PERIOD FREQUENCY LOW LEVEL WIDTH HIGH LEVEL WIDTH RISE, FALL TIME DE DATA DUTY SETUP TIME HOLD TIME RISE, FALL TIME HORIZONTAL PERIOD HORIZONTAL VALID HORIZONTAL BLANK VERTICAL PERIOD VERTICAL VALID VERTICAL BLANK SETUP TIME HOLD TIME RISE, FALL TIME SYMBOL TCLK FCLK TWCL TWCH TCLKR, TCLKF TDES TDEH TDER, TDEF THP THV THBK TVP TW TVBK TDS TDH TDR, TDF 0.45 0.50 5 5 810 928 800 THP - THV 485 525 480 TVP - TW 5 5 - 11 960 3 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Output Signal Characteristics, 800 x 480 PARAMETER SYMBOL VALUE UNIT HCLK FREQUENCY HCLK FREQUENCY NORMAL DUAL FHCLK 1/2FHCLK 1 0.5 FCLK FCLK HCLK PERIOD HCLK PERIOD NORMAL DUAL THCLK 2THCLK 1 2 TCLK TCLK DATA, REV DIO VALID TO HCLK RISING HCLK RISING TO DATA, REV, DIO VALID TSU THD 0.5 0.5 THCLK THCLK POL PULSE WIDTH TPOL 1 THP POL VALID TO LD RISING LD RISING TO POL VALID TPSU TPHD 0.5 THP + 12 THP - TPSU THCLK THCLK STV PULSE WIDTH STV VALID TO CKV RISING TSTV TVSU 1 0.5 THP THP CKV RISING TO STV VALID TVHD 0.5 THP DIO PULSE WIDTH LD PULSE WIDTH TDIOW TLDW 1 4 THCLK THCLK OEV PULSE WIDTH CKV PULSE WIDTH TOEV TCKV 66 0.5 THCLK THP TIME FROM LD TO CKV TIME FROM LD TO DIO TGS TLDO 1 THBK – 6 THCLK THCLK TIME FROM THE LAST DATA TO LD TED 5.5 THCLK AP PULSE WIDTH TIME FROM LD TO AP TAPW TLDAP THP – 62 44 THCLK THCLK 12 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY SYNC mode Input signal characteristic, 640 x 480 PARAMETER CLOCK PERIOD CLOCK FREQUENCY CLOCK LOW LEVEL WIDTH CLOCK HIGH LEVEL WIDTH CLOCK RISE, FALL TIME HSYNC PERIOD HSYNC PULSE WIDTH HSYNC BACK PORCH HSYNC WIDTH + BACK PORCH HORIZONTAL VALID DATA WIDTH HSYNC FRONT PORCH HORIZONTAL BLANK VSYNC PERIOD VSYNC PULSE WIDTH VSYNC BACK PORCH VERTICAL DATA VALID WIDTH VSYNC FRONT PORCH VERTICAL BLANK DATA SETUP TIME DATA HOLD TIME SYMBOL TCLK FCLK TWCL TWCH TCLKR, TCLKF THP THW THBP THW+ THBP THV THFP THBK TVP TVW TVBP TW TVFP TVBK TDS TDH MIN. TYP. MAX. 25 40 25 40 8 20 8 20 3 650 800 1280 96 48 144 640 THP – THW - THBP - THV THP – THV 485 525 960 3 33 480 TVP – TVW - TVBP - TW TVP – TW 5 5 - UNIT NS MHZ NS NS NS TCLK TCLK TCLK TCLK TCLK TCLK TCLK THP THP THP THP THP THP NS NS REMARK MIN 25 6 6 TYP 40 25 - MAX 40 - UNIT NS MHZ NS NS REMARK - - 3 NS 0.55 5 1280 NS NS NS TCLK TCLK TCLK THP THP THP NS NS NS DE mode Input signal characteristics, 640 x 480 PARAMETER DCLK PERIOD FREQUENCY LOW LEVEL WIDTH HIGH LEVEL WIDTH RISE, FALL TIME DE DATA DUTY SETUP TIME HOLD TIME RISE, FALL TIME HORIZONTAL PERIOD HORIZONTAL VALID HORIZONTAL BLANK VERTICAL PERIOD VERTICAL VALID VERTICAL BLANK SETUP TIME HOLD TIME RISE, FALL TIME SYMBOL TCLK FCLK TWCL TWCH TCLKR, TCLKF TDES TDEH TDER, TDEF THP THV THBK TVP TW TVBK TDS TDH TDR, TDF 0.45 0.50 5 5 650 800 640 THP - THV 485 525 480 TVP - TW 5 5 - 13 960 3 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Output Signal Characteristics, 640 x 480 PARAMETER SYMBOL VALUE UNIT HCLK FREQUENCY HCLK FREQUENCY NORMAL DUAL FHCLK 1/2FHCLK 1 0.5 FCLK FCLK HCLK PERIOD HCLK PERIOD NORMAL DUAL THCLK 2THCLK 1 2 TCLK TCLK DATA, REV DIO VALID TO HCLK RISING HCLK RISING TO DATA, REV, DIO VALID TSU THD 0.5 0.5 THCLK THCLK POL PULSE WIDTH TPOL 1 THP POL VALID TO LD RISING LD RISING TO POL VALID TPSU TPHD 0.5 THP + 12 THP - TPSU THCLK THCLK STV PULSE WIDTH STV VALID TO CKV RISING TSTV TVSU 1 0.5 THP THP CKV RISING TO STV VALID TVHD 0.5 THP DIO PULSE WIDTH LD PULSE WIDTH TDIOW TLDW 1 4 THCLK THCLK OEV PULSE WIDTH CKV PULSE WIDTH TOEV TCKV 66 0.5 THCLK THP TIME FROM LD TO CKV TIME FROM LD TO DIO TGS TLDO 1 THBK – 6 THCLK THCLK TIME FROM THE LAST DATA TO LD TED 5.5 THCLK AP PULSE WIDTH TIME FROM LD TO AP TAPW TLDAP THP – 62 44 THCLK THCLK 14 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY SYNC mode Input signal characteristic, 800 x 600 PARAMETER CLOCK PERIOD CLOCK FREQUENCY CLOCK LOW LEVEL WIDTH CLOCK HIGH LEVEL WIDTH CLOCK RISE, FALL TIME HSYNC PERIOD HSYNC PULSE WIDTH HSYNC BACK PORCH HSYNC WIDTH + BACK PORCH HORIZONTAL VALID DATA WIDTH HSYNC FRONT PORCH HORIZONTAL BLANK VSYNC PERIOD VSYNC PULSE WIDTH VSYNC BACK PORCH VERTICAL DATA VALID WIDTH VSYNC FRONT PORCH VERTICAL BLANK DATA SETUP TIME DATA HOLD TIME SYMBOL TCLK FCLK TWCL TWCH TCLKR, TCLKF THP THW THBP THW+ THBP THV THFP THBK TVP TVW TVBP TW TVFP TVBK TDS TDH MIN. TYP. MAX. 20 25 40 50 8 12.5 8 12.5 3 810 1000 1600 48 40 88 800 THP – THW - THBP - THV THP – THV 605 660 1200 3 36 600 TVP – TVW - TVBP - TW TVP – TW 5 5 - UNIT NS MHZ NS NS NS TCLK TCLK TCLK TCLK TCLK TCLK TCLK THP THP THP THP THP THP NS NS REMARK MIN 20 8 8 TYP 25 40 - MAX 50 - UNIT NS MHZ NS NS REMARK - - 3 NS 0.55 5 1600 NS NS NS TCLK TCLK TCLK THP THP THP NS NS NS DE mode Input signal characteristics, 800 x 600 PARAMETER DCLK PERIOD FREQUENCY LOW LEVEL WIDTH HIGH LEVEL WIDTH RISE, FALL TIME DE DATA DUTY SETUP TIME HOLD TIME RISE, FALL TIME HORIZONTAL PERIOD HORIZONTAL VALID HORIZONTAL BLANK VERTICAL PERIOD VERTICAL VALID VERTICAL BLANK SETUP TIME HOLD TIME RISE, FALL TIME SYMBOL TCLK FCLK TWCL TWCH TCLKR, TCLKF TDES TDEH TDER, TDEF THP THV THBK TVP TW TVBK TDS TDH TDR, TDF 0.45 0.50 5 5 810 1000 800 THP – THV 605 660 600 TVP - TW 5 5 - 15 1200 3 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Output Signal Characteristics, 800 x 600 PARAMETER SYMBOL VALUE UNIT HCLK FREQUENCY HCLK FREQUENCY NORMAL DUAL FHCLK 1/2FHCLK 1 0.5 FCLK FCLK HCLK PERIOD HCLK PERIOD NORMAL DUAL THCLK 2THCLK 1 2 TCLK TCLK DATA, REV DIO VALID TO HCLK RISING HCLK RISING TO DATA, REV, DIO VALID TSU THD 0.5 0.5 THCLK THCLK POL PULSE WIDTH TPOL 1 THP POL VALID TO LD RISING LD RISING TO POL VALID TPSU TPHD 0.5 THP + 12 THP - TPSU THCLK THCLK STV PULSE WIDTH STV VALID TO CKV RISING TSTV TVSU 1 0.5 THP THP CKV RISING TO STV VALID TVHD 0.5 THP DIO PULSE WIDTH LD PULSE WIDTH TDIOW TLDW 1 4 THCLK THCLK OEV PULSE WIDTH CKV PULSE WIDTH TOEV TCKV 66 0.5 THCLK THP TIME FROM LD TO CKV TIME FROM LD TO DIO TGS TLDO 1 THBK – 6 THCLK THCLK TIME FROM THE LAST DATA TO LD TED 5.5 THCLK AP PULSE WIDTH TIME FROM LD TO AP TAPW TLDAP THP – 62 44 THCLK THCLK 16 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY SYNC mode Input signal characteristic, 1024 x 600 PARAMETER CLOCK PERIOD CLOCK FREQUENCY CLOCK LOW LEVEL WIDTH CLOCK HIGH LEVEL WIDTH CLOCK RISE, FALL TIME HSYNC PERIOD HSYNC PULSE WIDTH HSYNC BACK PORCH HSYNC WIDTH + BACK PORCH HORIZONTAL VALID DATA WIDTH HSYNC FRONT PORCH HORIZONTAL BLANK VSYNC PERIOD VSYNC PULSE WIDTH VSYNC BACK PORCH VERTICAL DATA VALID WIDTH VSYNC FRONT PORCH VERTICAL BLANK DATA SETUP TIME DATA HOLD TIME SYMBOL TCLK FCLK TWCL TWCH TCLKR, TCLKF THP THW THBP THW+ THBP THV THFP THBK TVP TVW TVBP TW TVFP TVBK TDS TDH MIN. TYP. MAX. 15 20 50 66 6 10 6 10 3 1034 1280 2047 48 40 88 1024 THP – THW - THBP - THV THP – THV 605 660 1200 3 36 600 TVP – TVW - TVBP - TW TVP – TW 5 5 - UNIT NS MHZ NS NS NS TCLK TCLK TCLK TCLK TCLK TCLK TCLK THP THP THP THP THP THP NS NS REMARK MIN 15 6 6 TYP 20 50 10 10 MAX 66 - UNIT NS MHZ NS NS REMARK - - 3 NS 0.55 5 2047 NS NS NS TCLK TCLK TCLK THP THP THP NS NS NS DE mode Input signal characteristics, 1024 x 600 PARAMETER DCLK PERIOD FREQUENCY LOW LEVEL WIDTH HIGH LEVEL WIDTH RISE, FALL TIME DE DATA DUTY SETUP TIME HOLD TIME RISE, FALL TIME HORIZONTAL PERIOD HORIZONTAL VALID HORIZONTAL BLANK VERTICAL PERIOD VERTICAL VALID VERTICAL BLANK SETUP TIME HOLD TIME RISE, FALL TIME SYMBOL TCLK FCLK TWCL TWCH TCLKR, TCLKF TDES TDEH TDER, TDEF THP THV THBK TVP TW TVBK TDS TDH TDR, TDF 0.45 0.50 5 5 1034 1280 1024 THP – THV 605 660 600 TVP - TW 5 5 - 17 1200 3 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Output Signal Characteristics, 1024 x 600 PARAMETER SYMBOL VALUE UNIT HCLK FREQUENCY HCLK FREQUENCY NORMAL DUAL FHCLK 1/2FHCLK 1 0.5 FCLK FCLK HCLK PERIOD HCLK PERIOD NORMAL DUAL THCLK 2THCLK 1 2 TCLK TCLK DATA, REV DIO VALID TO HCLK RISING HCLK RISING TO DATA, REV, DIO VALID TSU THD 0.5 0.5 THCLK THCLK POL PULSE WIDTH TPOL 1 THP POL VALID TO LD RISING LD RISING TO POL VALID TPSU TPHD 0.5 THP + 12 THP - TPSU THCLK THCLK STV PULSE WIDTH STV VALID TO CKV RISING TSTV TVSU 1 0.5 THP THP CKV RISING TO STV VALID TVHD 0.5 THP DIO PULSE WIDTH LD PULSE WIDTH TDIOW TLDW 1 4 THCLK THCLK OEV PULSE WIDTH CKV PULSE WIDTH TOEV TCKV 66 0.5 THCLK THP TIME FROM LD TO CKV TIME FROM LD TO DIO TGS TLDO 1 THBK – 6 THCLK THCLK TIME FROM THE LAST DATA TO LD TED 5.5 THCLK AP PULSE WIDTH TIME FROM LD TO AP TAPW TLDAP THP – 62 44 THCLK THCLK 18 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY SYNC mode Input signal characteristic, 1024 x 768 PARAMETER CLOCK PERIOD CLOCK FREQUENCY CLOCK LOW LEVEL WIDTH CLOCK HIGH LEVEL WIDTH CLOCK RISE, FALL TIME HSYNC PERIOD HSYNC PULSE WIDTH HSYNC BACK PORCH HSYNC WIDTH + BACK PORCH HORIZONTAL VALID DATA WIDTH HSYNC FRONT PORCH HORIZONTAL BLANK VSYNC PERIOD VSYNC PULSE WIDTH VSYNC BACK PORCH VERTICAL DATA VALID WIDTH VSYNC FRONT PORCH VERTICAL BLANK DATA SETUP TIME DATA HOLD TIME SYMBOL TCLK FCLK TWCL TWCH TCLKR, TCLKF THP THW THBP THW+ THBP THV THFP THBK TVP TVW TVBP TW TVFP TVBK TDS TDH MIN. TYP. MAX. 12 15 65 83 5 7.5 5 7.5 3 1034 1280 2047 48 40 88 1024 THP – THW - THBP - THV THP – THV 773 845 1536 3 36 768 TVP – TVW - TVBP - TW TVP – TW 5 5 - UNIT NS MHZ NS NS NS TCLK TCLK TCLK TCLK TCLK TCLK TCLK THP THP THP THP THP THP NS NS REMARK MIN 12 5 5 TYP 15 65 7.5 7.5 MAX 83 - UNIT NS MHZ NS NS REMARK - - 3 NS 0.55 5 2047 NS NS NS TCLK TCLK TCLK THP THP THP NS NS NS DE mode Input signal characteristics, 1024 x 768 PARAMETER DCLK PERIOD FREQUENCY LOW LEVEL WIDTH HIGH LEVEL WIDTH RISE, FALL TIME DE DATA DUTY SETUP TIME HOLD TIME RISE, FALL TIME HORIZONTAL PERIOD HORIZONTAL VALID HORIZONTAL BLANK VERTICAL PERIOD VERTICAL VALID VERTICAL BLANK SETUP TIME HOLD TIME RISE, FALL TIME SYMBOL TCLK FCLK TWCL TWCH TCLKR, TCLKF TDES TDEH TDER, TDEF THP THV THBK TVP TW TVBK TDS TDH TDR, TDF 0.45 0.50 5 5 1034 1280 1024 THP – THV 773 845 768 TVP – TW 5 5 - 19 1536 3 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Output Signal Characteristics, 1024 x 768 PARAMETER HCLK FREQUENCY HCLK FREQUENCY NORMAL DUAL SYMBOL FHCLK 1/2FHCLK VALUE 1 0.5 UNIT FCLK FCLK HCLK PERIOD HCLK PERIOD NORMAL DUAL THCLK 2THCLK 1 2 TCLK TCLK DATA, REV DIO VALID TO HCLK RISING TSU 0.5 THCLK HCLK RISING TO DATA, REV, DIO VALID POL PULSE WIDTH THD TPOL 0.5 1 THCLK THP POL VALID TO LD RISING LD RISING TO POL VALID TPSU TPHD 0.5 THP + 12 THP - TPSU THCLK THCLK STV PULSE WIDTH STV VALID TO CKV RISING TSTV TVSU 1 0.5 THP THP CKV RISING TO STV VALID TVHD 0.5 THP DIO PULSE WIDTH LD PULSE WIDTH TDIOW TLDW 1 4 THCLK THCLK OEV PULSE WIDTH CKV PULSE WIDTH TOEV TCKV 66 0.5 THCLK THP TIME FROM LD TO CKV TGS 1 THCLK TIME FROM LD TO DIO TIME FROM THE LAST DATA TO LD TLDO TED THBK – 6 5.5 THCLK THCLK AP PULSE WIDTH TIME FROM LD TO AP TAPW TLDAP THP – 62 44 THCLK THCLK 20 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY SYNC mode Input signal characteristic, 720 x 480 PARAMETER CLOCK PERIOD CLOCK FREQUENCY CLOCK LOW LEVEL WIDTH CLOCK HIGH LEVEL WIDTH CLOCK RISE, FALL TIME HSYNC PERIOD HSYNC PULSE WIDTH HSYNC BACK PORCH HSYNC WIDTH + BACK PORCH HORIZONTAL VALID DATA WIDTH HSYNC FRONT PORCH HORIZONTAL BLANK VSYNC PERIOD VSYNC PULSE WIDTH VSYNC BACK PORCH VERTICAL DATA VALID WIDTH VSYNC FRONT PORCH VERTICAL BLANK DATA SETUP TIME DATA HOLD TIME SYMBOL TCLK FCLK TWCL TWCH TCLKR, TCLKF THP THW THBP THW+ THBP THV THFP THBK TVP TVW TVBP TW TVFP TVBK TDS TDH MIN. TYP. MAX. 28.6 34.5 29 35 8 17.25 8 17.25 3 730 900 1440 32 48 80 720 THP – THW - THBP - THV THP – THV 485 525 960 3 29 480 TVP – TVW - TVBP - TW TVP – TW 5 5 - UNIT NS MHZ NS NS NS TCLK TCLK TCLK TCLK TCLK TCLK TCLK THP THP THP THP THP THP NS NS REMARK MIN 28.6 8 8 TYP 34.5 29 17.25 17.25 MAX 35 - UNIT NS MHZ NS NS REMARK - - 3 NS 0.55 5 1440 NS NS NS TCLK TCLK TCLK THP THP THP NS NS NS DE mode Input signal characteristics, 720 x 480 PARAMETER DCLK PERIOD FREQUENCY LOW LEVEL WIDTH HIGH LEVEL WIDTH RISE, FALL TIME DE DATA DUTY SETUP TIME HOLD TIME RISE, FALL TIME HORIZONTAL PERIOD HORIZONTAL VALID HORIZONTAL BLANK VERTICAL PERIOD VERTICAL VALID VERTICAL BLANK SETUP TIME HOLD TIME RISE, FALL TIME SYMBOL TCLK FCLK TWCL TWCH TCLKR, TCLKF TDES TDEH TDER, TDEF THP THV THBK TVP TW TVBK TDS TDH TDR, TDF 0.45 0.50 5 5 730 900 720 THP – THV 485 525 480 TVP – TW 5 5 - 21 960 3 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Output Signal Characteristics, 720 x 480 PARAMETER SYMBOL VALUE UNIT HCLK FREQUENCY HCLK FREQUENCY NORMAL DUAL FHCLK 1/2FHCLK 1 0.5 FCLK FCLK HCLK PERIOD HCLK PERIOD NORMAL DUAL THCLK 2THCLK 1 2 TCLK TCLK DATA, REV DIO VALID TO HCLK RISING HCLK RISING TO DATA, REV, DIO VALID TSU THD 0.5 0.5 THCLK THCLK POL PULSE WIDTH TPOL 1 THP POL VALID TO LD RISING LD RISING TO POL VALID TPSU TPHD 0.5 THP + 12 THP - TPSU THCLK THCLK STV PULSE WIDTH STV VALID TO CKV RISING TSTV TVSU 1 0.5 THP THP CKV RISING TO STV VALID TVHD 0.5 THP DIO PULSE WIDTH LD PULSE WIDTH TDIOW TLDW 1 4 THCLK THCLK OEV PULSE WIDTH CKV PULSE WIDTH TOEV TCKV 66 0.5 THCLK THP TIME FROM LD TO CKV TIME FROM LD TO DIO TGS TLDO 1 THBK – 6 THCLK THCLK TIME FROM THE LAST DATA TO LD TED 5.5 THCLK AP PULSE WIDTH TIME FROM LD TO AP TAPW TLDAP THP – 62 44 THCLK THCLK 22 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY SYNC mode Input signal characteristic, 854 x 480 PARAMETER CLOCK PERIOD CLOCK FREQUENCY CLOCK LOW LEVEL WIDTH CLOCK HIGH LEVEL WIDTH CLOCK RISE, FALL TIME HSYNC PERIOD HSYNC PULSE WIDTH HSYNC BACK PORCH HSYNC WIDTH + BACK PORCH HORIZONTAL VALID DATA WIDTH HSYNC FRONT PORCH HORIZONTAL BLANK VSYNC PERIOD VSYNC PULSE WIDTH VSYNC BACK PORCH VERTICAL DATA VALID WIDTH VSYNC FRONT PORCH VERTICAL BLANK DATA SETUP TIME DATA HOLD TIME SYMBOL TCLK FCLK TWCL TWCH TCLKR, TCLKF THP THW THBP THW+ THBP THV THFP THBK TVP TVW TVBP TW TVFP TVBK TDS TDH MIN. TYP. MAX. 25 30 33 40 8 15 8 15 3 864 1068 1708 48 44 92 854 THP – THW - THBP - THV THP – THV 485 525 960 3 29 480 TVP – TVW - TVBP - TW TVP – TW 5 5 - UNIT NS MHZ NS NS NS TCLK TCLK TCLK TCLK TCLK TCLK TCLK THP THP THP THP THP THP NS NS REMARK MIN 25 8 8 TYP 30 33 15 15 MAX 40 - UNIT NS MHZ NS NS REMARK - - 3 NS 0.55 5 1708 NS NS NS TCLK TCLK TCLK THP THP THP NS NS NS DE mode Input signal characteristics, 854 x 480 PARAMETER DCLK PERIOD FREQUENCY LOW LEVEL WIDTH HIGH LEVEL WIDTH RISE, FALL TIME DE DATA DUTY SETUP TIME HOLD TIME RISE, FALL TIME HORIZONTAL PERIOD HORIZONTAL VALID HORIZONTAL BLANK VERTICAL PERIOD VERTICAL VALID VERTICAL BLANK SETUP TIME HOLD TIME RISE, FALL TIME SYMBOL TCLK FCLK TWCL TWCH TCLKR, TCLKF TDES TDEH TDER, TDEF THP THV THBK TVP TW TVBK TDS TDH TDR, TDF 0.45 0.50 5 5 864 1068 854 THP – THV 485 525 480 TVP – TW 5 5 - 23 960 3 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Output Signal Characteristics, 854 x 480 PARAMETER SYMBOL VALUE UNIT HCLK FREQUENCY HCLK FREQUENCY NORMAL DUAL FHCLK 1/2FHCLK 1 0.5 FCLK FCLK HCLK PERIOD HCLK PERIOD NORMAL DUAL THCLK 2THCLK 1 2 TCLK TCLK DATA, REV DIO VALID TO HCLK RISING HCLK RISING TO DATA, REV, DIO VALID TSU THD 0.5 0.5 THCLK THCLK POL PULSE WIDTH TPOL 1 THP POL VALID TO LD RISING LD RISING TO POL VALID TPSU TPHD 0.5 THP + 12 THP - TPSU THCLK THCLK STV PULSE WIDTH STV VALID TO CKV RISING TSTV TVSU 1 0.5 THP THP CKV RISING TO STV VALID TVHD 0.5 THP DIO PULSE WIDTH LD PULSE WIDTH TDIOW TLDW 1 4 THCLK THCLK OEV PULSE WIDTH CKV PULSE WIDTH TOEV TCKV 66 0.5 THCLK THP TIME FROM LD TO CKV TIME FROM LD TO DIO TGS TLDO 1 THBK – 6 THCLK THCLK TIME FROM THE LAST DATA TO LD TED 5.5 THCLK AP PULSE WIDTH TIME FROM LD TO AP TAPW TLDAP THP – 62 44 THCLK THCLK 24 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY SYNC mode Input signal characteristic, 480 x 272 PARAMETER CLOCK PERIOD CLOCK FREQUENCY CLOCK LOW LEVEL WIDTH CLOCK HIGH LEVEL WIDTH CLOCK RISE, FALL TIME HSYNC PERIOD HSYNC PULSE WIDTH HSYNC BACK PORCH HSYNC WIDTH + BACK PORCH HORIZONTAL VALID DATA WIDTH HSYNC FRONT PORCH HORIZONTAL BLANK VSYNC PERIOD VSYNC PULSE WIDTH VSYNC BACK PORCH VERTICAL DATA VALID WIDTH VSYNC FRONT PORCH VERTICAL BLANK DATA SETUP TIME DATA HOLD TIME SYMBOL TCLK FCLK TWCL TWCH TCLKR, TCLKF THP THW THBP THW+ THBP THV THFP THBK TVP TVW TVBP TW TVFP TVBK TDS TDH MIN. TYP. MAX. 25 93 10.7 40 8 46.5 8 46.5 3 490 600 960 36 30 66 480 THP – THW - THBP - THV THP – THV 277 299 544 3 19 272 TVP – TVW - TVBP - TW TVP – TW 5 5 - UNIT NS MHZ NS NS NS TCLK TCLK TCLK TCLK TCLK TCLK TCLK THP THP THP THP THP THP NS NS REMARK MIN 25 8 8 TYP 93 10.7 46.5 46.5 MAX 40 - UNIT NS MHZ NS NS REMARK - - 3 NS 0.55 5 960 NS NS NS TCLK TCLK TCLK THP THP THP NS NS NS DE mode Input signal characteristics, 480 x 272 PARAMETER DCLK PERIOD FREQUENCY LOW LEVEL WIDTH HIGH LEVEL WIDTH RISE, FALL TIME DE DATA DUTY SETUP TIME HOLD TIME RISE, FALL TIME HORIZONTAL PERIOD HORIZONTAL VALID HORIZONTAL BLANK VERTICAL PERIOD VERTICAL VALID VERTICAL BLANK SETUP TIME HOLD TIME RISE, FALL TIME SYMBOL TCLK FCLK TWCL TWCH TCLKR, TCLKF TDES TDEH TDER, TDEF THP THV THBK TVP TW TVBK TDS TDH TDR, TDF 0.45 0.50 5 5 490 600 480 THP – THV 277 299 272 TVP – TW 5 5 - 25 544 3 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Output Signal Characteristics, 480 x 272 PARAMETER SYMBOL VALUE UNIT HCLK FREQUENCY HCLK FREQUENCY NORMAL DUAL FHCLK 1/2FHCLK 1 0.5 FCLK FCLK HCLK PERIOD HCLK PERIOD NORMAL DUAL THCLK 2THCLK 1 2 TCLK TCLK DATA, REV DIO VALID TO HCLK RISING HCLK RISING TO DATA, REV, DIO VALID TSU THD 0.5 0.5 THCLK THCLK POL PULSE WIDTH TPOL 1 THP POL VALID TO LD RISING LD RISING TO POL VALID TPSU TPHD 0.5 THP + 12 THP - TPSU THCLK THCLK STV PULSE WIDTH STV VALID TO CKV RISING TSTV TVSU 1 0.5 THP THP CKV RISING TO STV VALID TVHD 0.5 THP DIO PULSE WIDTH LD PULSE WIDTH TDIOW TLDW 1 4 THCLK THCLK OEV PULSE WIDTH CKV PULSE WIDTH TOEV TCKV 66 0.5 THCLK THP TIME FROM LD TO CKV TIME FROM LD TO DIO TGS TLDO 1 THBK – 6 THCLK THCLK TIME FROM THE LAST DATA TO LD TED 5.5 THCLK AP PULSE WIDTH TIME FROM LD TO AP TAPW TLDAP THP – 40 22 THCLK THCLK 26 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY 9. Built-in Patterns Pattern 00: Black with white cross line, White line boundary. Pattern 04: Black and white checkerboard four pixels Pattern 01: White cross hatch and dot 4 border lines Pattern 05: Black and white checkerboard two pixels Pattern 02: Black cross hatch and dot 4 border lines Pattern 06: Black and white checkerboard one pixel and boundary Pattern 03: Diagonal color Pattern 07: Vertical black and white bar., Coarse. 27 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Pattern 08: 61,62 gray color, dither off 240 ~ 247 gray color, dither on Pattern 12: Dither pattern for green Pattern 09: Vertical gray 8 levels 64 pixels Pattern 13: Dither pattern for blue Pattern 10: Dither pattern for gray Pattern 14: Vertical colors bar. Pattern 11: Dither pattern for red Pattern 15: Horizontal colors bar. 28 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Pattern 16: Black color with white line boundary Pattern 20: Blue with white line boundary Pattern 17: White color with red line boundary Pattern 21: Yellow with white line boundary Pattern 18: Red with white line boundary Pattern 22: Magenta with white line boundary Pattern 19: Green with white line boundary Pattern 23: Cyan with white line boundary 29 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY 10. Waveforms Waveform 1: HSYNC mode input vertical timing - 1 Waveform 2: HSYNC mode input vertical timing - 2 30 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Waveform 3 : HSYNC mode, 800x600, Horizontal timing 1 Waveform 4 : HSYNC mode, 800x600, Horzontal timing 2 31 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Waveform 5 : DE mode, 640x480, Vertical timing Waveform 6 : DE mode, 800x600, Horizontal timing 32 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Waveform 7: input clock, setup/hold time Input clock, Setup/Hold time TCLK : min=20M, typ=33.3M, max=40M (HSYNC) min=25M, typ=27M, max=35M (DE) TCLKr : max=3ns from 10% to 90% DCLK TCLKf : max=3ns from 10% to 90% Clock high go low latch data :::: DCLK R/G/B in Valid TDH : min=10ns :::: DE,HSYNC, VSYNC TDS: min=5ns TDES : min=5ns TDEH : min=5ns 33 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY Waveform 8 : 800 x 600, Output timing – 1 34 DigiTron CY2890-D04 Datasheet Version 1.8 CYT Confidential, DO NOT COPY 11. Package Information LQFP-64 (7x7x1.4mm) 35 DigiTron