ETC CY2890-AFB

13554946866
[email protected]
393298913
MSN: [email protected]
CY2890-AFB/BFA Datasheet Version 1.5
CYT Confidential, DO NOT COPY
Revision History
Version
1.5
DATE
2007/09/15
Description
Preliminary Datasheet
Ordering Information
Part No.
CY2890-AFB
Package
64pin LQFP, Green package
CY2890-BFA
64pin LQFP, Green package
Descriptions
Outline as 10x10x1.4 mm ,
Default resolution as 800x480
Outline as 10x10x1.4 mm ,
Default resolution as 800x600
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CY2890-AFB/BFA Datasheet Version 1.5
CYT Confidential, DO NOT COPY
Content
1.
General Description ...................................................................................................... 4
2.
Features......................................................................................................................... 4
3.
Block Diagram ............................................................................................................... 5
4.
Pin Assignment.............................................................................................................. 6
5.
Pin Description .............................................................................................................. 7
6.
Function Description..................................................................................................... 9
7.
DC Characteristics....................................................................................................... 10
8.
Built-in Patterns........................................................................................................... 11
9.
Package Information................................................................................................... 14
3
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CY2890-AFB/BFA Datasheet Version 1.5
CYT Confidential, DO NOT COPY
1.
General Description
The CY2890- AFB and BFA are digital TFT-LCD timing controllers with built-in “dithering”, “reverse”, “dual”,
“flicker”, “AP” and “pattern generator” functions. The input signal is digital R/G/B with HSYNC/VSYNC or DE.
User can use the MODE pin to select input signal to be either HSYNC mode or DE mode. The R/G/B input is fixed
to 8 bits data width and the output is always 6 bits. The convert from 8 bits RGB to 6 bits RGB can be either
directly truncated or dithering depends on the “DITHER” function is off or on. When DITHER is on, CY2890 will
emulate 8 bits gray level on 6 bits RGB bus. The users will have a more vivid picture with dither function on. The
“Reverse” function is designed for reducing EMI. The key is to lower down the R/G/B transition count. The “dual”
function can set the output HCLK to latch the output data at both edges. Set “dual” on can lower down the HCLK
frequency to half. With the “Reverse” and “dual” functions, the board level system design can be relaxed. We
also have a built-in test pattern generator for users to do a quick final test or aging burning test. The built-in test
pattern generator has 24 very popular patterns. It will be free running when MODE = 1, HSYNC = 1 or MODE = 0,
DE = 1. You can stop the free-running built-in test pattern at any time. The “flicker” function is used to reduce the
flicker phenomenon. For CY2890-AFB and BFA the default panel resolutions are fixed, but they can be changed
by external strap resistors. We support 8 different panel resolutions, which can be selected by external strap
resistors. Through CY2890, all the necessary horizontal and vertical control signals to TFT-LCD are handled
automatically. This includes the polarity invert control. There is a built-in power-on reset circuit in the chip, no
need for user to add external reset circuit. If users want to extend the power-on reset, an external capacitor can
be added.
2. Features
Supporting 8 kinds of different digital TFT-LCD panels
800 x 480 , 640 x 480, 800 x 600, 1024 x 600, 1024 x 768, 720 x 480,320 x 480, 480 x 272
CY2890- AFB default is 800 x 480
CY2890-BFA default is 800 x 600
Support HSYNC mode or DE mode
Advanced 16.7M colors Dither function
FLICKER reduction function
Support DUAL edge function
Support REVERSE function
Support AP function
Built-in test pattern generator with 24 popular patterns
Built-In Power-On reset circuit
Built-in polarity inverted function
Provide source and gate drivers control timing
Master clock frequency: 75 MHz max.
Single supply voltage : +3.0V to +3.6V
Wide temperature operation range -40°C / +95°C
ESD meet class3 critera
HBM 4KV, MM 400V, LATCH-UP 100mA
64 LQFP Green Package
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CY2890-AFB/BFA Datasheet Version 1.5
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3. Block Diagram
5
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CY2890-AFB/BFA Datasheet Version 1.5
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RI1
RI0
DCLK
VSS
VDD
DIO1
HCLK
RO0
RO1
RO2
RO3
RO4
RO5
GO0
GO1
GO2
4. Pin Assignment
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
RI2
49
32
GO3
RI3
50
31
GO4
RI4
51
30
GO5
RI5
52
29
BO0
RI6
53
28
BO1
RI7
54
27
BO2
GI0
55
26
BO3
GI1
56
25
BO4
GI2
57
24
BO5
GI3
58
23
LD
GI4
59
22
REV
GI5
60
GI6
CY2890-AFB
CY2890-BFA
21
POL
61
20
OEV
GI7
62
19
CKV
AP
63
18
STV
17
VSS
BI2
BI3
BI4
BI5
BI6
BI7
9
10
11
12
13
14
15
16
VDD
8
RESETB
7
REVEN
6
DITHERB
5
MODE
4
VSYNC
3
HSYNC
2
DE
1
BI1
64
BI0
DUAL
text
6
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CY2890-AFB/BFA Datasheet Version 1.5
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5. Pin Description
Pin No.
Symbol
I/O
1
2
3
4
5
6
7
8
BI0
BI1
BI2
BI3
BI4
BI5
BI6
BI7
I
I
I
I
I
I
I
I
9
DE / ENPG
I
10
HSYNC /
ENPG
I
11
VSYNC /
TEST
I
12
MODE
I
13
DITHERB
I
14
REVEN
I
15
RESETB
I
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
VDD
VSS
STV
CKV
OEV
POL
REV
LD
BO5
BO4
BO3
BO2
BO1
BO0
GO5
I
I
O
O
O
O
O
O
O
O
O
O
O
O
O
Description
Internal
Blue color data input, bit0 (LSB)
Blue color data input, bit1
Blue color data input, bit2.
Blue color data input, bit3.
Blue color data input, bit4.
Blue color data input, bit5.
Blue color data input, bit6.
Blue color data input, bit7 (MSB).
MODE = H : Data enable signal input, active high
MODE = L : enable built-in pattern generator when
Set to High, Stop when set to Low.
MODE = L : Negative polarity horizontal sync input
MODE = H : enable built-in pattern generator when
Set to High, Stop when set to Low.
Negative polarity vertical sync input
When set to DE mode, this pin must be floating or
connected to ground.
DE / SYNC mode select
H : DE mode
L : SYNC mode
Dithering function enable or disable setting
H : disable
L : enable
Data reverse function enable or disable
H : enable
L : disable
Active low system reset pin
Set low will reset the CY2890.
Power supply voltage.
Power supply ground.
Gate driver start pulse.
Gate driver shift clock.
Gate driver output enable
Source driver polarity select
Source driver data reverse control.
Source driver latch pulse and output enable.
Blue color data output, bit5 (MSB).
Blue color data output, bit4.
Blue color data output, bit3.
Blue color data output, bit2.
Blue color data output, bit1.
Blue color data output, bit0 (LSB).
Green color data output, bit5 (MSB).
7
pull-down
pull-down
pull-down
pull-down
pull-down
pull-up
pull-up
pull-down
pull-up
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CY2890-AFB/BFA Datasheet Version 1.5
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Pin No.
Symbol
I/O
31
32
33
34
GO4
GO3
GO2
GO1
O
O
O
O
35
GO0
I/O
36
37
38
RO5
RO4
RO3
O
O
O
39
RO2
I/O
40
RO1
I/O
41
RO0
I/O
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
HCLK
DIO
VDD
VSS
DCLK
RI0
RI1
RI2
RI3
RI4
RI5
RI6
RI7
GI0
GI1
GI2
GI3
GI4
GI5
GI6
GI7
AP
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
O
64
DUAL
I
Description
Internal
Green color data output, bit4.
Green color data output, bit3.
Green color data output, bit2.
Green color data output, bit1.
Green color data output, bit0 (LSB).
Flicker on/off setting
Red data output, bit5 (MSB).
Red color data output, bit4.
Red color data output, bit3
Red color data output, bit2.
Panel resolution select bit 2, RES[2],
Red color data output, bit1.
Panel resolution select bit 1, RES[1],
Red color data output, bit0.
Panel resolution select bit 0, RES[0],
Source driver clock
Source driver start pulse
Power supply voltage.
Power supply ground.
Clock signal; latch input data at DCLK falling edge.
Red color data input, bit0 (LSB)
Red color data input, bit1.
Red color data input, bit2.
Red color data input, bit3.
Red color data input, bit4.
Red color data input, bit5.
Red color data input, bit6.
Red color data input, bit7 (MSB).
Green color data input, bit0 (LSB)
Green color data input, bit1
Green color data input, bit2.
Green color data input, bit3.
Green color data input, bit4.
Green color data input, bit5.
Green color data input, bit6.
Green color data input, bit7 (MSB).
AP out
DUAL function
H : enable dual (double edge send out data)
L : disable dual (single edge send out data)
8
pull-down
pull-down
pull-down
pull-down
pull-up
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CY2890-AFB/BFA Datasheet Version 1.5
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6. Function Description
CY2890 can support 8 different kind panel resolutions. To select different panel resolution users have to add an
external pull-up resistors at pin39, 40 or 41. At power-on, CY2890 will read in pin39, 40 and 41 as RES[2:0].
In the table below, we mark “x” mean don’t do anything. We mark “pull-down” mean you have to add an external
resistor to GND.
Panel Select Table for CY2890-AFB
RES[2:0]
RESOLUTION
CONNECTED TO PIN EXTERNAL
RESISTOR VALUE
Value
Pin39
Pin40
Pin41
0
x
x
x
800x480
No Resistors
1
x
x
Pull-down
640x480
10K
2
x
Pull-down
X
800x600
10K
3
x
Pull-down
Pull-down
1024x600
10K
4
Pull-down
x
X
1024x768
10K
5
Pull-down
x
Pull-down
720x480
10K
6
Pull-down
Pull-down
x
320x240
10K
7
Pull-down
Pull-down
Pull-down
480x272
10K
RESOLUTION
CONNECTED TO PIN EXTERNAL
RESISTOR VALUE
Panel Select Table for CY2890-BFA
RES[2:0]
Value
Pin39
Pin40
Pin41
0
x
x
x
800x600
No Resistors
1
x
x
Pull-down
640x480
10K
2
x
Pull-down
x
800x480
10K
3
x
Pull-down
Pull-down
1024x600
10K
4
Pull-down
x
x
1024x768
10K
5
Pull-down
x
Pull-down
720x480
10K
6
Pull-down
Pull-down
x
320x240
10K
7
Pull-down
Pull-down
Pull-down
480x272
10K
9
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CY2890-AFB/BFA Datasheet Version 1.5
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7. DC Characteristics
Absolute maximum ratings
PARAMETER
SYMBOL
RATING
UNIT
Power supply
VDD
2.5 to 3.8
V
Input voltage
VIN
-0.3 to VDD +0.3
V
Output voltage
VOUT
-0.3 to VDD +0.3
V
Storage temperature
TSTG
-40 to 125
℃
Recommended operating conditions
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
Power supply
VDD
3.0
3.3
3.6
V
Input voltage
VIN
0
-
VDD
V
Operating temperature
TOPR
-40
-
95
℃
DC Electrical characteristics
PARAMETER
SYMBOL
Input low current
IIL
Input high current
IIH
Tri-state leakage current
IOZ
Logic input low voltage
VIL
Schmitt input low voltage
Logic input high voltage
Schmitt input high
voltage
CONDITION
MIN.
TYP.
MAX.
UNIT
-1
-
1
µA
-1
-
1
µA
-10
-
10
µA
CMOS
-
-
0.3VDD
V
Note 1
VSIL
CMOS
-
-
0.3VDD
V
Note 2
VIH
CMOS
0.7VDD
-
-
V
Note 1
VSIH
CMOS
0.7VDD
-
-
V
Note 2
Output low voltage
VOL
IOL = 4mA
-
-
0.3VDD
V
Note 3
Output high voltage
VOH
IOH = -4mA
0.7VDD
-
-
V
Note 3
Output low voltage
VOL
IOL = 8mA
-
-
0.3VDD
V
Note 4
Output high voltage
Input pull up / down
resistance
VOH
IOH = -8mA
0.7VDD
-
-
V
Note 4
RI
VIL = 0V or VIH = VDD
-
90
-
KΩ
Note 5
No pull-up or
pull-down
No pull-up or
pull-down
REMARK
Note 1: MODE, RI0~RI7, GI0~GI7, BI0~BI7.
Note 2: DCLK, HSYNC, VSYNC, DE, RESETB
Note 3: CKV, POL, REV, LD, DIO, STV, OEV, AP, RO0~RO5, GO0~GO5, BO0~BO5.
Note 4: HCLK
Note 5: RESETB, HSYNC, VSYNC, DE, MODE, REVEN, DITHERB, DUAL, RI0, RI1, GI0, GI1, BI0, BI1
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8. Built-in Patterns
Pattern 00:
Black with white cross line,
White line boundary.
Pattern 04:
Black and white checkerboard
four pixels
Pattern 01:
White cross hatch and dot
4 border lines
Pattern 05:
Black and white checkerboard
two pixels
Pattern 02:
Black cross hatch and dot
4 border lines
Pattern 06:
Black and white checkerboard
one pixel and boundary
Pattern 03:
Diagonal color
Pattern 07:
Vertical black and white bar.,
Coarse.
11
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Pattern 08:
61,62 gray color, dither off
240~247 gray color, dither on
Pattern 12:
dither pattern for green
Pattern 09:
vertical gray 8 levels
64 pixels
Pattern 13:
dither pattern for blue
Pattern 10:
dither pattern for gray
Pattern 14:
Vertical colors bar.
Pattern 11:
dither pattern for red
Pattern 15:
Horizontal colors bar.
12
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Pattern 16:
Black with white line boundary.
Pattern 20:
Blue with white line boundary.
Pattern 17:
White with red line boundary.
Pattern 21:
Yellow with white line boundary.
Pattern 18:
Red with white line boundary.
Pattern 22:
Magenta with white line boundary.
Pattern 19:
Green with white line boundary.
Pattern 23:
Cyan with white line boundary.
13
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9. Package Information
LQFP-64 ( 10x10x1.4 mm )
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