NLAS7222B, NLAS7222C High-Speed USB 2.0 (480 Mbps) DPDT Switches ON Semiconductor’s NLAS7222B and NLAS7222C are part of a series of analog switch circuits that are produced using the company’s advanced sub−micron CMOS technology, achieving industry−leading performance. Both the NLAS7222B and NLAS7222C are 2− to 1−port analog switches. Their wide bandwidth and low bit−to−bit skew allow them to pass high−speed differential signals with good signal integrity. Each switch is bidirectional and offers little or no attenuation of the high−speed signals at the outputs. Industry−leading advantages include a propagation delay of less than 250 ps, resulting from its low channel resistance and low I/O capacitance. Their high channel−to−channel crosstalk rejection results in minimal noise interference. Their bandwidth is wide enough to pass High−Speed USB 2.0 differential signals (480 Mb/s). Features • • • • • • • RON is Typically 8.0 at VCC = 3.3 V Low Crosstalk: −30 dB @ 250 MHz Low Current Consumption: 1.0 A Channel On−Capacitance: 8.0 pF (Typical) VCC Operating Range: 1.65 V to 4.5 V > 700 MHz Bandwidth (or Data Frequency) These are Pb−Free Devices http://onsemi.com MARKING DIAGRAM UQFN10 CASE 488AT 1 XX = M G = = XX M G G Device Code 7222B = AS 7222C = AT Date Code Pb−Free Device (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. Typical Applications • Differential Signal Data Routing • USB 2.0 Signal Routing Important Information • Continuous Current Rating Through Each Switch ±300 mA • 8 kV I/O to GND ESD Protection © Semiconductor Components Industries, LLC, 2011 June, 2011 − Rev. 5 1 Publication Order Number: NLAS7222B/D NLAS7222B, NLAS7222C HSD1− 7 OE 8 VCC 9 HSD2− HSD1+ HSD1− 6 7 6 CONTROL 5 D− 4 GND OE 8 VCC 9 5 HSD2+ 4 HSD2− 3 GND CONTROL S 10 3 1 2 HSD1+ HSD2+ D+ S Figure 1. Pin Connections and Logic Diagram (NLAS7222B, Top View) 1 2 D+ D− Figure 2. Pin Connections and Logic Diagram (NLAS7222C, Top View) Table 1. PIN DESCRIPTION Pin 10 Table 2. TRUTH TABLE Function S Select Input OE OE S HSD1+, HSD1− HSD2+, HSD2− 1 0 0 X 0 1 OFF ON OFF OFF OFF ON Output Enable HSD1+, HSD1−, HSD2+, HSD2−, D+, D− Data Ports MAXIMUM RATINGS Symbol Pins VCC VCC VIS HSD1+, HSD1− HSD2+, HSD2− Parameter Value Unit −0.5 to +5.5 V −0.5 to VCC + 0.3 V Positive DC Supply Voltage Analog Signal Voltage D+, D− VIN S, OE ICC VCC TS −0.5 to +5.5 Control Input Voltage, Output Enable Voltage Positive DC Supply Current Storage Temperature −0.5 to +5.5 V 50 mA −65 to +150 °C IIS_CON HSD1+, HSD1− HSD2+, HSD2−, D+, D− Analog Signal Continuous Current−Closed Switch $300 mA IIS_PK HSD1+, HSD1− HSD2+, HSD2−, D+, D− Analog Signal Continuous Current 10% Duty Cycle $500 mA Control Input Current, Output Enable Current $20 mA IIN S, OE Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. RECOMMENDED OPERATING CONDITIONS Symbol Pins VCC VIS HSD1+, HSD1− HSD2+, HSD2− Parameter Min Max Unit Positive DC Supply Voltage 1.65 4.5 V Analog Signal Voltage GND VCC V D+, D− VIN TA S, OE Control Input Voltage, Output Enable Voltage Operating Temperature Range GND 4.5 GND VCC V −40 +85 °C Minimum and maximum values are guaranteed through test or design across the Recommended Operating Conditions, where applicable. Typical values are listed for guidance only and are based on the particular conditions listed for section, where applicable. These conditions are valid for all values found in the characteristics tables unless otherwise specified in the test conditions. http://onsemi.com 2 NLAS7222B, NLAS7222C ESD PROTECTION Symbol Value Unit ESD Human Body Model − All Pins Parameter 2.0 kV ESD Human Body Model − I/O to GND 8.0 kV DC ELECTRICAL CHARACTERISTICS CONTROL INPUT, OUTPUT ENABLE (Typical: T = 25°C, VCC = 3.3 V) −40°C to +85°C Symbol Pins Parameter Test Conditions VCC (V) Min Typ Max Unit − − V 0.4 0.4 0.5 V ±1.0 A VIH S, OE Control Input, Output Enable HIGH Voltage (See Figure 3) 2.7 3.3 4.2 1.3 1.4 1.6 VIL S, OE Control Input, Output Enable LOW Voltage (See Figure 3) 2.7 3.3 4.2 − IIN S, OE Control Input, Output Enable Leakage Current 1.65 − 4.5 − 0 ≤ VIS ≤ VCC − SUPPLY AND LEAKAGE CURRENT (Typical: T = 25°C, VCC = 3.3 V) −40°C to +85°C VCC (V) Min Typ Max Unit 1.65 − 4.5 − − 1.0 A 3.6 − − 10 A 0 ≤ VIS ≤ VCC 1.65 − 4.5 − − ±1.0 A 0 ≤ VIS ≤ 4.5 V 0 − − ±1.0 A Symbol Pins Parameter ICC VCC Quiescent Supply Current VIS = VCC or GND; IOUT = 0A Test Conditions ICCT VCC Increase in ICC per Control Voltage VIN = 2.6 V IOZ HSD1+, HSD1− HSD2+, HSD2− OFF State Leakage Current IOFF D+, D− Power OFF Leakage Current HIGH SPEED ON RESISTANCE (Typical: T = 25°C, VCC = 3.3 V) −40°C to +85°C Symbol Pins Parameter Test Conditions VCC (V) Min Typ Max Unit RON On−Resistance VIS = 0 V to 0.4 V, ION = 8 mA 2.7 3.3 4.2 − 9.0 8.0 7.0 12 10 8.0 RFLAT On−Resistance Flatness VIS = 0 V to 1.0 V, ION = 8 mA 2.7 3.3 4.2 − 1.6 1.5 1.4 − RON On−Resistance Matching VIS = 0 V to 0.4 V, ION = 8 mA 2.7 3.3 4.2 − 1.05 0.85 0.65 − http://onsemi.com 3 NLAS7222B, NLAS7222C DC ELECTRICAL CHARACTERISTICS (continued) FULL SPEED ON RESISTANCE (Typical: T = 25°C, VCC = 3.3 V) −40°C to +85°C Symbol Pins Parameter Test Conditions VCC (V) Min Typ Max Unit 12 10.5 8.5 RON On−Resistance VIS = 0 V to VCC, ION = 8 mA 2.7 3.3 4.2 9.0 8.5 7.5 RFLAT On−Resistance Flatness VIS = 0 V to 1.0 V, ION = 8 mA 2.7 3.3 4.2 1.6 1.5 1.4 RON On−Resistance Matching VIS = 0 V to VCC, ION = 8 mA 2.7 3.3 4.2 2.20 2.45 2.65 AC ELECTRICAL CHARACTERISTICS TIMING/FREQUENCY (Typical: T = 25°C, VCC = 3.3 V, RL = 50 , CL = 5 pF, f = 1 MHz) −405C to +855C VCC (V) Min Typ Max Unit tON Closed Turn−ON Time to Open 1.65 − 4.5 − 14 30 ns tOFF Open to Turn−OFF Time Closed 1.65 − 4.5 − 10 20 ns 1.65 − 4.5 3.0 4.4 7.0 ns 1.65 − 4.5 − 500 − MHz − 750 − Symbol Pins Parameter tBBM Break−Before−Make Delay BW −3 dB Bandwidth Test Conditions CL = 5 pF CL = 0 pF ISOLATION (Typical: T = 25°C, VCC = 3.3 V, RL = 50 , CL = 5 pF, f = 1 MHz) −405C to +855C Symbol Pins OIRR Open XTALK HSD1+ to HSD1− VCC (V) Min Typ Max Unit OFF−Isolation f = 250 MHz 1.65 − 4.5 − −22 − dB Non−Adjacent Channel Crosstalk f = 250 MHz 1.65 − 4.5 − −30 − dB Parameter Test Conditions NLAS7222B CAPACITANCE (Typical: T = 25°C, VCC = 3.3 V, RL = 50 , CL = 5 pF, f = 1 MHz) −405C to +855C Min Typ Max Unit Control Pin Input Capacitance VCC = 0 V − 3.0 − pF D+ to HSD1+ or HSD2+ ON Capacitance VCC = 3.3 V; OE = 0 V S = 0 V or 3.3 V − 8.0 − pF HSD1n or HSD2n OFF Capacitance VCC = VIS = 3.3 V; OE = 0 V S = 3.3 V or 0 V − 4.5 − pF Symbol Pins CIN S, OE CON COFF Parameter Test Conditions http://onsemi.com 4 NLAS7222B, NLAS7222C NLAS7222C CAPACITANCE (Typical: T = 25°C, VCC = 3.3 V, RL = 50 , CL = 5 pF, f = 1 MHz) −405C to +855C Min Typ Max Unit VCC = 0 V − 3.0 − pF ON Capacitance VCC = 3.3 V; OE = 0 V S = 0 V or 3.3 V − 10 − pF OFF Capacitance VCC = VIS = 3.3 V; OE = 3.3 V S = 3.3 V or 0 V − 5.5 − pF Symbol Pins Parameter CIN S, OE Control Pin, Output Enable Input Capacitance CON D+ to HSD1+ or HSD2+ COFF HSD1n or HSD2n Test Conditions http://onsemi.com 5 NLAS7222B, NLAS7222C 140 120 ICC, (A) 100 80 VCC = 4.2 V 60 VCC = 3.3 V 40 VCC = 2.7 V 20 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 VIN, (V) Figure 3. ICC vs. VIN VCC DUT VCC Input Output GND VOUT 0.1 F 50 35 pF tBMM Output 50 % OF DROOP VOLTAGE DROOP Switch Select Pin Figure 4. tBBM (Time Break−Before−Make) VCC Input DUT VCC 0.1 F 50% 0V Output VOUT Open 50% 50 VOH 90% 35 pF 90% Output VOL Input tON Figure 5. tON/tOFF VCC VCC Input DUT Output 50% 50% 0V 50 VOUT Open tOFF VOH 35 pF Output Input tOFF Figure 6. tON/tOFF http://onsemi.com 6 10% 10% VOL tON NLAS7222B, NLAS7222C 50 Reference DUT Transmitted Input Output 50 Generator 50 Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction. ǒVVOUT Ǔ for VIN at 100 kHz IN VOUT Ǔ for VIN at 100 kHz to 50 MHz VONL = On Channel Loss = 20 Log ǒ VIN VISO = Off Channel Isolation = 20 Log Bandwidth (BW) = the frequency 3 dB below VONL VCT = Use VISO setup and test to all other switch analog input/outputs terminated with 50 Figure 7. Off Channel Isolation/On Channel Loss (BW)/Crosstalk (On Channel to Off Channel)/VONL http://onsemi.com 7 NLAS7222B, NLAS7222C APPLICATIONS INFORMATION (www.usb.org), the industry group responsible for defining the USB certification requirements. The test patterns were generated by a PC and MATLAB software, and were inputted to the analog switch through USB connectors J1 (HSD1) or J2 (HSD2). A USB certified device was plugged into connector J4 to function as a data transceiver. The high speed and full speed tests used a flash memory device, while the low speed tests used a mouse. Test connectors J3 and J5 provide a direct connection of the USB device and were used to verify that the analog switch does not distort the data signals. The low on resistance and capacitance of the NLAS7222B provides for a high bandwidth analog switch suitable for applications such as USB data switching. Results for the USB 2.0 signal quality tests will be shown in this section, along with a description of the evaluation test board. The data for the eye diagram signal quality and jitter tests verifies that the NLAS7222B can be used as a data switch in low, full and high speed USB 2.0 systems. Figures 8, 9 and 10 provide a description of the test evaluation board. The USB tests were conducted per the procedures provided by the USB Implementers Forum Figure 8. Schematic of the NLAS7222B USB Demo Board http://onsemi.com 8 NLAS7222B, NLAS7222C Figure 9. Block Diagram of the NLAS7222B USB Demo Board Figure 10. Photograph of the NLAS7222B USB Demo Board ORDERING INFORMATION Marking Package Shipping† NLAS7222BMUTAG AS UQFN10 (Pb−Free) 3000 / Tape & Reel NLAS7222BMUTBG AS UQFN10 (Pb−Free) 3000 / Tape & Reel NLAS7222CMUTBG AT UQFN10 (Pb−Free) 3000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 9 NLAS7222B, NLAS7222C PACKAGE DIMENSIONS UQFN10, 1.4x1.8, 0.4P CASE 488AT−01 ISSUE A EDGE OF PACKAGE D ÉÉ ÉÉ ÉÉ PIN 1 REFERENCE 2X 2X 0.10 C L1 E 0.10 C EXPOSED Cu A 0.05 C A1 0.05 C A1 C SIDE VIEW 3 9X DETAIL A Bottom View (Optional) B TOP VIEW 10X 5 SEATING PLANE ÉÉ ÉÉ DIM A A1 A3 b D E e L L1 L3 MOLD CMPD A3 DETAIL B Side View (Optional) 1.700 0.0669 0.663 0.0261 6 e 1 0.200 0.0079 10 X L3 b MILLIMETERS MIN MAX 0.45 0.60 0.00 0.05 0.127 REF 0.15 0.25 1.40 BSC 1.80 BSC 0.40 BSC 0.30 0.50 0.00 0.15 0.40 0.60 MOUNTING FOOTPRINT e/2 L 10 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. A 1 0.10 C A B 0.05 C 9X 0.563 0.0221 2.100 0.0827 NOTE 3 BOTTOM VIEW 0.400 0.0157 PITCH 10 X 0.225 0.0089 SCALE 20:1 mm Ǔ ǒinches ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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