NCN9252 High-Speed USB 2.0 (480 Mbps) DP3T Switch for USB/UART/Data Multiplexing http://onsemi.com Brief Description MARKING DIAGRAM 1 AD M G UQFN12 MU SUFFIX CASE 523AE AD = Specific Device Code M = Date Code G = Pb−Free Package APPLICATION DIAGRAM NCN9252 D+ R D− L USB 2.0 Signal Routing −3 dB Bandwidth: 525 MHz RON: 4 W Max @ VCC = 4.2 V CON: < 20 pF @ VCC = 3.3 V OVT Protection up to 5.25 V on Common Pins VCC Range: 1.65 V to 4.5 V 3 kV ESD Protection 1.7 x 2.0 x 0.5 mm UQFN12 Package This is a Pb−Free Device IN[1:0] March, 2011 − Rev. 1 UART XCVR From Baseband ORDERING INFORMATION Device NCN9252MUTAG Package Shipping† UQFN12 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. USB/UART/Data Multiplexing Shared USB Connector Mobile Phones Portable Devices © Semiconductor Components Industries, LLC, 2011 Remote Data Tx Typical Applications • • • • USB XCVR Rx Features • • • • • • • • • D+ D− USB Connector The NCN9252 is a DP3T switch for combined UART and USB 2.0 high−speed data applications. It allows portable systems to use a single external port to transmit and receive signals to and from three separate locations within the portable system. It is comprised of two switches, each with a single common I/O that alternates between 3 terminals. They are operated together to allow three data sources, such as a USB or UART transceiver, to pass differential data through a shared USB connector port. The NCN9252 features low RON− 4 W (max) at 4.2 V VCC, 5 W (typ) at a 3.3 V VCC. It also features low CON, < 30 pF (max) across the supply voltage range. This performance makes it ideal for both USB full−speed and high−speed applications that require both low RON and CON for effective signal transmission. The NCN9252 is capable of accepting control input signals down to 1.4 V, over a range of VCC supply voltages with minimal leakage current. The NCN9252 is offered in a Pb−Free, 12 pin, 1.7 x 2.0 x 0.5 mm, UQFN package. An Evaluation Board specifically designed for the NCN9252 is available and features USB connectors and test points to allow straightforward testing of the device. Please see part number NCN9252MUGEVB. 1 Publication Order Number: NCN9252/D NCN9252 FUNCTIONAL BLOCK DIAGRAM AND PINOUT 1S1 1S2 1 1S3 2 VCC 3 2S3 4 2S2 12 Control Logic 5 6 PIN DESCRIPTIONS IN1 11 10 COM1 9 GND 8 COM2 IN2 7 2S1 Pin# Name Direction 1 1S2 I/O Switch #1 Position 2 Signal Line 2 1S3 I/O Switch #1 Position 3 Signal Line 3 VCC Input 4 2S3 I/O Switch #2 Position 3 Signal Line 5 2S2 I/O Switch #2 Position 2 Signal Line 6 2S1 I/O Switch #2 Position 1 Signal Line 7 IN2 Input 8 COM2 I/O 9 GND Input 10 COM1 I/O 11 IN1 Input 12 1S1 I/O (Top View) Figure 1. Internal Block Diagram Description Power Supply Bit 1 Control Input Select Line Switch #2 Common Signal Line Ground Switch #1 Common Signal Line Bit 0 Control Input Select Line Switch #1 Position 1 Signal Line FUNCTION TABLE IN1 [0] IN2 [1] COM1 Closed to: COM2 Closed to: 0 0 No Connect No Connect 1 0 1S1 2S1 0 1 1S2 2S2 1 1 1S3 2S3 1S1 1S2 COM1 1S3 2S1 COM2 2S2 2S3 IN1 IN2 Control Logic Figure 2. Functional Block Diagram http://onsemi.com 2 NCN9252 OPERATING CONDITIONS MAXIMUM RATINGS Symbol Pins VCC VCC VIS 1Sx, 2Sx Parameter Value Positive DC Supply Voltage Analog Signal Voltage COMx VIN IN1, IN2 Condition Unit −0.5 to +5.5 V −0.5 to VCC + 0.3 V −0.5 to 5.3 Control Input Voltage −0.5 to 4.6 ICC VCC IIS_CON 1Sx, 2Sx COMx Analog Signal Continuous Current $300 Closed Switch mA IIS_PK 1Sx, 2Sx COMx Analog Signal Peak Current $500 10% Duty Cycle mA IIN IN1, IN2 Control Input Current $20 mA −65 to 150 °C TSTG Positive DC Supply Current V 50 Storage Temperature Range mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. RECOMMENDED OPERATING CONDITIONS Symbol Pins VCC VCC VIS 1Sx, 2Sx Parameter Value Positive DC Supply Voltage Analog Signal Voltage COMx VIN IN1, IN2 TA Condition Unit 1.65 to 4.5 V GND to VCC V GND to 4.5 Control Input Voltage Operating Temperature Range GND to VCC V −40 to 85 °C Minimum and maximum values are guaranteed through test or design across the Recommended Operating Conditions, where applicable. Typical values are listed for guidance only and are based on the particular conditions listed for each section, where applicable. These conditions are valid for all values found in the characteristics tables unless otherwise specified in the test conditions. ESD PROTECTION Pins All Pins Description Human Body Model http://onsemi.com 3 Minimum Voltage 3 kV NCN9252 DC ELECTRICAL CHARACTERISTICS CONTROL INPUT (TYPICAL: T = 255C; VCC = 3.3 V) Symbol Pins Parameter Test Conditions VCC Min VIH INx Control Input High Figure 3 2.7 V 3.3 V 4.2 V 1.25 1.35 1.50 VIL INx Control Input Low Figure 3 2.7 V 3.3 V 4.2 V IIN INx Control Input Leakage Typ Max Unit V VIS = GND 0.4 0.4 0.5 V $1.0 mA Max Unit $1.0 mA $1.0 mA SUPPLY CURRENT AND LEAKAGE (TYPICAL: T = 255C; VCC = 3.3 V, VIN = VCC or GND) Symbol Pins INO/NC (OFF) NC, NO OFF State Leakage ICOM (ON) COM ON State Leakage ICC VCC Quiescent Supply VIS = VCC or GND, ID = 0; 1.0 mA Power OFF Leakage VIS = GND 1.0 mA Typ Max Unit 5 4 3.5 6 5 4.5 W 1.3 1.4 1.6 W IOFF Parameter Test Conditions VCC Min Typ VCOM = 3.6 V VNC = 1.0 V ON RESISTANCE (TYPICAL: T = 255C; VCC = 3.3 V) Symbol RON Pins Parameter Test Conditions VCC 1Sx, 2Sx COMx ON Resistance ION = −8 mA, VIS = 0 to VCC; 2.7 V 3.3 V 4.2 V RFLAT 1Sx, 2Sx COMx RON Flatness ION = −8 mA, VIS = 0 to VCC; 2.7 V 3.3 V 4.2 V DRON 1Sx, 2Sx COMx RON Matching ION = −8 mA, VIS = 0 to VCC; 2.7 V 3.3 V 4.2 V http://onsemi.com 4 Min 0.35 W NCN9252 AC ELECTRICAL CHARACTERISTICS TIMING/FREQUENCY (TYPICAL: T = 255C; VCC = 3.3 V, RL = 50 W, CL = 5 pF, f = 1 MHz) Symbol Pins Parameter Test Conditions Min Typ Max Unit BW −3 dB Bandwidth Power level = 0 dBm 525 MHz THD Total Harmonic Distortion 20 Hz to 20 kHz, 1.0 VPP 0.01 % tON 1Sx to 1Sy, 2Sx to 2Sy Turn On Time 13 30 nS tOFF 1Sy to 1Sx, 2Sy to 2Sx Turn Off Time 12 25 nS tBBM 1Sx to 1Sy, 2Sx to 2Sy Break Before Make 2.0 nS CROSSTALK: (TYPICAL: T = 255C; VCC = 3.3V, RL = 50 W, CL = 35 pF, f = 1MHz) Symbol Pins OIRR 1Sx or 2Sx Xtalk Parameter Off Isolation Test Conditions Min VIN = 0 COMx to COMy Non−Adjacent Channel Typ Max Unit −60 dB −60 dB CAPACITANCE (TYPICAL: T = 255C; VCC = 3.3V, RL = 50 W, CL = 5 pF, f = 1 MHz) Symbol Pins CIN INx CON 1Sx or 2Sx to COM COFF Parameter Test Conditions Min Typ Control Input VCC = 0 V 3 Through Switch VCC = 3.3 V, VIN = 0 V 16 VCC = VIN = 3.3 V 8 1Sx, 2Sx COMx Unselected Port http://onsemi.com 5 Max Unit pF 20 pF pF NCN9252 Detailed Description Control Inputs Select Logic The NCN9252 is a DP3T switch designed for applications where a single USB connector is used for multiple data applications within a portable system. Two differential signals from a USB connector can be routed to 3 different end locations. The first, channel 1, is optimized for a high−speed, USB 2.0 transceiver. The second and third, channels 2 and 3, are optimized for UART or remote data applications. The NCN9252 is made up of two, triple−throw switches operating off of the same internal enable signal. For each switch, a signal can pass from the common pin to any of three terminals. Whenever COM1 is closed to terminal 1S2, COM2 will respectively be closed to terminal 2S2. The select logic is controlled by two inputs, IN1 and IN2, connecting the common pins to the terminals according to the function table found on page 2. Since there are four possible control states but only 3 possible terminals, the first combination results in a open connection for all three terminals. VIH and VIL Levels 200 190 180 170 VCC = 4.2 V 160 150 140 130 ICC (mA) 120 110 100 90 V = 3.3 V CC 80 70 60 50 40 30 VCC = 2.7 V 20 10 0 0 0.4 0.8 1.2 1.6 2.0 VIN (V) 2.4 Figure 3. ICC Leakage Current vs. VIN http://onsemi.com 6 2.8 3.2 NCN9252 4.5 5 4.5 85°C 4 4 25°C 3.5 25°C 3 3 −40°C RON (W) RON (W) 3.5 85°C 2.5 2 −40°C 2.5 2 1.5 1.5 1 1 0.5 0.5 0 0 0.5 1 1.5 2 0 2.5 0 0.5 1 1.5 VIN (V) 0 −1 25°C 3 −2 −40°C BW (dB) RON (W) 2.5 2 1.5 −3 −4 −5 1 −6 0.5 0 0 0.5 1 1.5 2 2.5 3 3.5 −7 1E06 4 1E07 Figure 6. On−Resistance vs. Input Voltage @ VCC = 4.2 V 1E09 Figure 7. Bandwidth vs. Frequency 0 0.009 −10 0.008 −20 0.007 −30 0.006 THD (%) −40 −50 −60 0.005 0.004 0.003 −70 −80 0.002 −90 0.001 −100 10000 1E08 FREQUENCY (Hz) VIN (V) MAGNITUDE (dB) 3 Figure 5. On−Resistance vs. Input Voltage @ VCC = 3.3 V 85°C 3.5 2.5 VIN (V) Figure 4. On−Resistance vs. Input Voltage @ VCC = 2.7 V 4 2 100000 1E06 1E07 1E08 1E09 0 10 100 1000 10000 100000 FREQUENCY (Hz) FREQUENCY (Hz) Figure 8. Cross Talk vs. Frequency @ 255C Figure 9. Total Harmonic Distortion vs. Frequency http://onsemi.com 7 NCN9252 Figure 10. Channel 1S1/2S1 USB2.0 Near End Eye Diagram (VCC = 3.3 V, IN1 = 1, IN2 = 0, Temp = 255C) Figure 11. Channel 1S2/2S2 USB2.0 Near End Eye Diagram (VCC = 3.3 V, IN1 = 0, IN2 = 1, Temp = 255C) Figure 12. Channel 1S3/2S3 USB2.0 Near End Eye Diagram (VCC = 3.3 V, IN1 = 1, IN2 = 1, Temp = 255C) Figure 13. Channel 1S1/2S1 USB2.0 Far End Eye Diagram (VCC = 3.3 V, IN1 = 1, IN2 = 0, Temp = 255C) Figure 14. Channel 1S2/2S2 USB2.0 Far End Eye Diagram (VCC = 3.3 V, IN1 = 0, IN2 = 1, Temp = 255C) Figure 15. Channel 1S3/2S3 USB2.0 Far End Eye Diagram (VCC = 3.3 V, IN1 = 1, IN2 = 1, Temp = 255C) http://onsemi.com 8 NCN9252 PACKAGE DIMENSIONS UQFN12 1.7x2.0, 0.4P CASE 523AE−01 ISSUE A ÉÉ ÉÉ ÉÉ D PIN 1 REFERENCE 2X 0.10 C 2X 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 MM FROM TERMINAL TIP. 4. MOLD FLASH ALLOWED ON TERMINALS ALONG EDGE OF PACKAGE. FLASH 0.03 MAX ON BOTTOM SURFACE OF TERMINALS. 5. DETAIL A SHOWS OPTIONAL CONSTRUCTION FOR TERMINALS. A B L1 DETAIL A E NOTE 5 TOP VIEW DIM A A1 A3 b D E e K L L1 L2 DETAIL B A 0.05 C 12X 0.05 C A1 A3 8X C SIDE VIEW SEATING PLANE K 5 7 DETAIL A MOUNTING FOOTPRINT SOLDERMASK DEFINED e 1 12X DETAIL B OPTIONAL CONSTRUCTION MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.127 REF 0.15 0.25 1.70 BSC 2.00 BSC 0.40 BSC 0.20 ---0.45 0.55 0.00 0.03 0.15 REF 11 L 2.00 12X L2 BOTTOM VIEW b 0.10 M C A B 0.05 M C 1 NOTE 3 0.32 2.30 0.40 PITCH 11X 0.22 12X 0.69 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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