DATA SHEET Part No. AN12969A Package Code No. UBGA031-W-3030AEA Publication date: October 2008 SDE00027BEB 1 AN12969A Contents Overview ……………………………………………………………………………………………………………. 3 Features ……………………………………………………………………………………………………………. 3 Applications ………………………………………………………………………………………………………… 3 Package ……………………………………………………………………………………………………………. 3 Type ………………………………………………………………………………………………………………… 3 Application Circuit Example ……………………………………………………………………………………… 4 Pin Descriptions …………………………………………………………………………………………………… 5 Absolute Maximum Ratings ………………………………………………………………………………………. 7 Operating Supply Voltage Range ……………………………………………………………………………….. 7 Electrical Characteristics …………………………………………………………………………………………. 8 Electrical Characteristics (Reference values for design) ……………………………………………………… 10 Technical Data ……………………………………………………………………………………………………. 12 1. I2C-bus Mode …………………………………………………………………………………………………….. 14 2. Operating temperature guarantee of I2C-Bus control ………………………………………………………… 16 3. Usage note of I2C-bus ……………………………………………………………………………………………... 16 4. I/O block circuit diagrams and pin function descriptions …………………………………………………….. 17 5. Power supply and logic sequence ……………………………………………………………………………… 23 6. Explanation on mainly functions ………………………………………………………………………………... 25 7. PD — Ta diagram ……………………………………………………………………………………………….. 29 Usage Note ………………………………………………………………………………………………………… 30 SDE00027BEB 2 AN12969A AN12969A I2C bus control compatible AGC built-in stereo BTL amplifier IC (For driving a piezoelectric speaker) Overview AN12969A has a built-in AGC function in a stereo BTL amplifier for driving a piezoelectric speaker to prevent noise at output clip, and has a built-in a charge-pump power supply for driving speaker output amplifiers. And I2C bus control method is applied in switching of each mode like some Standby function is turned ON/OFF. Features y The piezoelectric speaker can be driven by applying the circuit of high withstand voltage power amplifier. y On level in AGC can be selected by controlling I2C bus. y Attack and recovery times in AGC can be selected by controlling I2C bus. y Resistance and capacitor, which were used for conventional analog AGC aren’t needed anymore. y I2C is controlled almost in the same way as those of AN12959A. y Shut-down function is mounted. y Amplifier gain switching y The input circuit constructs a bus boost circuit easily and improves the sound quality of the piezoelectric speaker. y The supply for speaker output amplifier isn’t needed anymore. Applications y Audio amplifier for mobile, such as a cellular phone Package y 31 pin Plastic Quad 6 Column BGA Package(0.5 mm Pitch) Type y Silicon Monolithic Bi-CMOS IC SDE00027BEB 3 AN12969A Application Circuit Example VBAT = 3.0 V – 4.5 V Charge F1 GND F3 F2 CPOUT VREG_PRED F4 C1P F5 C1N GND_CP F6 2.2 μF E4 1 μF E5 VBAT E6 2.2 μF 0.1 μF 390 Ω D1 GND_SPR +6 dB / 0 dB Gain Select PREOUT_R D4 1 500 pF 10 kΩ INPUT_R INPUT_L +14 dB AGC AGC DET +14 dB AGC 10 kΩ 1 500 pF PREOUT_L C5 C1 ROUT_NEG 22 Ω C2 VCC_SP FB_R D5 FB_L D6 0.1 μF 10 kΩ 22 Ω +14 dB Pump GND D3 0.1 μF 10 kΩ E1 ROUT_POS C3 VREF_SP 1 μF B1 LOUT_NEG 22 Ω +6 dB / 0 dB Gain Select +14 dB GND C4 B4 A6 A1 GND_SPL 1 μF VREF B2 VCC A3 1 μF S.D B3 0.1 μF VCC_D A4 1 μF SDA B5 2.2 kΩ 2.2 kΩ SCL A5 I2C-BUS Control A2 LOUT_POS 22 Ω VCC_D = 1.7 V – 3.3 V Shutdown Operate *2 Diagram of pin names on package bottom face VCC = 2.7 V – 4.5 V 2.96 mm 0.5 mm 0.31 mm 0.23 mm B3 pin Operate voltage VCC_D = 2.6 V F GND Operate > 1.62 V Operate > 2.34 V E ROUT POS Shut-down < 0.18 V Shut-down < 0.26 V D GND SPR C ROUT NEG B A Note) This circuit and these circuit constants show an example and do not guarantee the design as a mass-production set. *2 : The threshold voltage at Pin B3 has the VCC_D dependency. *3 : This block diagram is for explaining functions. The part of the block diagram may be omitted, or it may be simplified. SDE00027BEB CP OUT CP OUT C1P C1N VREG PRED VBAT VBAT GND PRE OUTR FBR VREF SP GND PRE OUTL LOUT NEG VREF SD GND SDA GND LOUT SPL POS VCC VCCD SCL 3 4 5 1 GND CP VCC SP 2 FBL 2.96 mm VCC_D = 1.8 V GND 6 Note) N.C. pin is without a solder ball. 4 AN12969A Pin Descriptions Pin No. Pin name Type Description A1 GND_SPL Ground Grounding (For speaker L-channel) A2 LOUT_POS Output Speaker output L-channel (+) A3 VCC Power Supply Power supply VCC A4 VCC_D Power Supply VCC_D for logic circuit A5 SCL Input A6 GND Ground Grounding B1 LOUT_NEG Output Speaker output L-channel (–) B2 VREF Input Reference voltage pin B3 S.D Input Shut-down pin B4 GND Ground B5 SDA Input / Output SDA B6 N.C. — N.C. C1 ROUT_NEG C2 VCC_SP Power Supply C3 VREF_SP Input C4 GND Ground Grounding C5 PREOUT_L Output First amplifier output L-channel C6 N.C. D1 GND_SPR D2 N.C. — D3 GND Ground Grounding D4 PREOUT_R Output First amplifier output R-channel D5 FB_R Input First amplifier negative feedback input R-channel D6 FB_L Input First amplifier negative feedback input L-channel Output — Ground SCL Grounding Speaker output R-channel (–) VCC_SP for the circuit of speaker output Reference voltage pin for the circuit of speaker output N.C. Grounding (For speaker R-channel) N.C. SDE00027BEB 5 AN12969A Pin Descriptions (continued) Pin No. Pin name Type Output Description E1 ROUT_POS E2 N.C. — N.C. E3 N.C. — N.C. E4 VREG_PRED E5 VBAT Power Supply VBAT for Charge-pump E6 VBAT Power Supply VBAT for Charge-pump F1 GND Ground Grounding F2 CPOUT Output Charge-pump output F3 CPOUT Output Charge-pump output F4 C1P Output Charge pump flying capacitor pin (+) F5 C1N Output Charge pump flying capacitor pin (−) F6 GND_CP Ground Grounding (For charge-pump) Output Speaker output R-channel (+) VREG capacitor pin for charge pump gate-driver SDE00027BEB 6 AN12969A Absolute Maximum Ratings A No. Parameter Symbol Range VCC,VBAT 5.0 VCC_D 3.6 Unit Note V *1 1 Supply voltage 2 Supply current ICC — A — 3 Power dissipation PD 136 mW *2 4 Operating ambient temperature Topr –20 to +70 °C 5 Storage temperature Tstg –55 to +150 °C *3 Note) *1 : The values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *2 : The power dissipation shown is the value at Ta = 70°C for the independent (unmounted) IC package with a heat sink. When using this IC, refer to the y PD-Ta diagram in the Technical Data and design the heat radiation with sufficient margin so that the allowable value might not be exceeded based on the conditions of power supply voltage, load, and ambient temperature. *3 : Except for the power dissipation, operating ambient temperature, and storage temperature, all ratings are for Ta = 25°C. Operating supply voltage range Parameter Supply voltage range Symbol Range VCC 2.7 to 4.5 VCC_D 1.7 to 3.3 VBAT 3.0to 4.5 Unit Note *1 V *1, *2 *1 Note) *1: The values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *2: The I2C bus of this product is designed to correspond to Standard mode(100 Kbps) and Fast mode(400 Kbps) in Philips Corporation I2C specification version 2.1 at VCC_D = 1.7 V to 3.3 V. However, not correspond to High Speed mode ( < 3.4 Mbps). SDE00027BEB 7 AN12969A Electrical Characteristics Note) Unless otherwise specified, Ta = 25°C±2°C, VCC = 3.0 V,VCC_D = 1.8 V, VBAT =3.8 V B No. Parameter Symbol Conditions Limits Min Typ Max Unit Note Circuit Current 1 Circuit current 1A at non-signal IVCC1A Non-signal, STB = OFF, SP_SAVE = OFF, AGC = ON — 0.5 1.0 mA — 2 Circuit current 2A at non-signal IVCC2A Non-signal, STB = OFF, SP_SAVE = OFF, AGC = ON — 28 46 mA — 3 Circuit current 3A at non-signal IVCC3A Non-signal, STB = OFF, SP_SAVE = OFF, AGC = ON — 0.1 10 μA — 4 Circuit current 1B at non-signal IVCC1B Non-signal, STB = ON, SP_SAVE = ON, AGC = ON — 0.1 1.0 μA — 5 Circuit current 2B at non-signal IVCC2B Non-signal, STB = ON, SP_SAVE = ON, AGC = ON — 0.1 1.0 μA — 6 Circuit current 3B at non-signal IVCC3B Non-signal, STB = ON, SP_SAVE = ON, AGC = ON — 0.1 1.0 μA — 7 Circuit current 1C at non-signal IVCC1C Non-signal, STB = OFF, SP_SAVE = ON, AGC = ON — 0.5 1.0 mA — 8 Circuit current 2C at non-signal IVCC2C Non-signal, STB = OFF, SP_SAVE = ON, AGC = ON — 19 23 mA — 9 Circuit current 3C at non-signal IVCC3C Non-signal, STB = OFF, SP_SAVE = ON, AGC = ON — 0.1 10 μA — VSPOL VSPOR VIN = –26.0 dBV, f = 1 kHz, RL = 100 Ω –1.0 0.0 1.0 dBV — I/O Characteristics 10 SP reference output level 11 SP reference output distortion THSPOL THSPOR VIN = –26.0 dBV, f = 1 kHz, RL = 100 Ω, to THD5th — 0.07 0.5 % — 12 SP reference output noise voltage VNSPOL VNSPOR Non-Signal using A curve filter — –75 –68 dBV — 13 Output level at SP Save VSSPOL VSSPOR VIN = –26.0 dBV, f = 1 kHz, RL = 100 Ω using A curve filter — –114 –90 dBV — 14 SP AGC output level 11.6 12.6 13.6 dBV — VIN = –6.0 dBV, f = 1 kHz, VSPOA1L RL = 100 Ω, VBAT = 4.3 V, VSPOA1R AGC – SELECT = [000] SDE00027BEB 8 AN12969A Electrical Characteristics (continued) Note) Unless otherwise specified, Ta = 25°C±2°C, VCC = 3.0 V,VCC_D = 1.8 V, VBAT =3.8 V B No. Parameter Symbol Conditions Limits Min Typ Max Unit Note I2C interface 15 SCL, SDA signal input Low level VIL — –0.5 — 0.3 × VCC_D V — 16 SCL, SDA signal input High level VIH — 0.7 × VCC_D — VCC_D + 0.5 V — 17 SDA signal output Low Level VOL 0 — 0.2 × VCC_D V — 18 SCL, SDA signal input current Ii Input voltage 0.1 V to 1.7 V –10 — 10 μA — 19 Max. frequency of SCL signal allowable to input fSCL — 0 — 400 kHz — Vsdlth — — — 0.1 × VCC_D V — Vsdhth — 0.9 × VCC_D — — V — Open corrector, sync current : 3mA The threshold voltage at Pin B3 20 21 Shut-down input Low level Shut-down input High level SDE00027BEB 9 AN12969A Electrical Characteristics (Reference values for design) Note) Unless otherwise specified, Ta = 25°C±2°C, VCC = 3.0 V,VCC_D = 1.8 V, VBAT =3.8 V The characteristics listed below are reference values for design of the IC and are not guaranteed by inspection. If a problem does occur related to these characteristics, Panasonic will respond in good faith to user concerns. B No. Parameter Symbol Conditions tBUF Reference values Unit Note — μs — Min Typ Max — 1.3 — I2C interface 22 Bus free time between stop and start conditions 23 Setup time of start condition tSU;STA — 0.6 — — μs — 24 Hold time of start condition tHD;STA — 0.6 — — μs — 25 Low period of SCL clock tLow — 1.3 — — μs — 26 High period of SCL clock tHigh — 0.6 — — μs — 27 Rising time of SDA, SCL signal tR — — — 0.3 μs — 28 Falling time of SDA, SCL signal tF — — — 0.3 μs — 29 Data setup time tSU;DAT — 0.1 — — μs — 30 Data hold time tHD;DAT — 0 — 0.9 μs — 31 Setup time of stop condition tSU;STO — 0.6 — — μs — fCP — — 1.25 — MHz — Charge pump 32 Oscillation frequency SDE00027BEB 10 AN12969A Electrical Characteristics (Reference values for design) (Continued) Note) Unless otherwise specified, Ta = 25°C±2°C, VCC = 3.0 V,VCC_D = 1.8 V, VBAT =3.8 V The characteristics listed below are reference values for design of the IC and are not guaranteed by inspection. If a problem does occur related to these characteristics, Panasonic will respond in good faith to user concerns. START CONDITION Repeated START STOP CONDITION CONDITION START CONDITION VIHmin (*2) SDA VILmax(*3) tBUF tR tF tLow tR tSU;DAT tF tHD;STA SCL tHD;STA tHD;DAT tHigh tSU;STA tSU;STO Note) 1. The characteristics listed below are reference values derived from the design of the IC and are not guaranteed by inspection. If a problem does occur related to these characteristics, we will respond in good faith to user concerns. 2. *1: All values are VIHmin (*2) and VILmax (*3) level standard. *2: VIHmin is the minimum limit of the signal input high level is indicated. *3: VILmax is the maximum limit of the signal input low level is indicated. SDE00027BEB 11 AN12969A Technical Data 1. I2C-bus Mode 1) Write Mode SDA SCL SLAVE ADDRESS START CONDITION 1 0 1 1 0 1 1 0 B 6 DATA SUB ADDRESS ACK ACK 0 0 0 0 0 0 0 1 0 1 ACK STOP CONDITION 1 0 0 0 0 0 0 0 8 0 Example of transmission messages Two transmission messages (i.e. the SCL and SDA) are sent in synchronous serial transmission. The SCL is a clock with fixed frequency. The SDA indicates address data for the control of the reception side, and is sent in parallel in synchronization with the SCL. The data is transmitted in 8-bit, 3 octets (bytes) in principle, where every octet has an acknowledge bit. The following description provides information on the structure of the frame. <Start Conditions> When the level of the SDA changes to low from high while the level of the SCL is high, the data reception of the receiver will be enabled. <Stop Conditions> When the level of the SDA changes to high from low while the level of the SCL is high, the data reception of the receiver will be aborted. <Slave Address> The slave address is a specified one unique to each device. When the address of another device is sent, the reception will be aborted. <Sub-Address> The sub-address is a specified one unique to each function. <Data> Data is information under control. <Acknowledge Bit> The acknowledge bit is used to enable the master to acknowledge the reception of data for each octet. The master acknowledges the data reception of the receiver by transmitting a high-level signal to the receiver and receiving a low-level signal returned from the receiver as shown by the dotted lines in the above Fig. The communication will be aborted if the low signal is not returned. The SDA will not change when the level of the SCL is high except start or stop conditions are enabled. SDE00027BEB 12 AN12969A Technical Data (continued) 1. I2C-bus Mode (continued) 1) Write Mode (continued) (a) I2C-bus PROTOCOL x Slave address : 10110110 (B6Hex) x Format (Normal) S Slave address Start condition W A Sub-address A Data byte A Write Acknowledge bit Mode : 0 P Stop condition (b) Auto increment Auto increment mode (When the data is sent in sequence, the sub-address will change one by one and the data will be input.) Auto increment mode S Slave address W A Sub-address A Data 1 A Data 2 A Data n A P (c) Initial condition The initial state of the device is not guaranteed. Therefore, the input of 00Hex resister-D0(Note.1) will be absolutely "0", when the power is turned ON. (d) Sub-address Byte and Data Byte Format Subaddress Data byte MSB D7 D6 D5 D4 *0Hex GAIN 0 → +20 dB 1 → +26 dB 0 (*1) 0 (*1) 0 (*1) *1Hex AGC-ON data bit3 AGC-ON data bit2 AGC-ON data bit1 *2Hex 0 (*1,*2) 0 (*1,*2) 0 (*1,*2) AGC-REC data bit3 0 (*1,*2) LSB D3 D2 D1 D0 0 (*1) AGC 0 → OFF 1 → ON SP Save 0 → ON 1 → OFF All Standby 0 → ON 1 → OFF AGC-REC data bit2 AGC-REC data bit1 AGC-ATT data bit2 0 (*1,*2) 0 (*1,*2) 0 (*1,*2) AGC-ATT data bit1 0 (*1,*2) Note) *1: <00Hex Register> D0, D4, D5, D6 : Always set to "0" D1 : SP and charge-pump standby ON/OFF switch D2 : SP Save ON/OFF switch D3 : AGC ON/OFF switch D7 : GAIN +20 dB / +26 dB selection <01Hex Register> D0, D1: AGC-attack-time selection D2, D3, D4 : AGC-recovery-time selection D5, D6, D7 : AGC-on-level selection <02Hex Register> D0 to D7 : Always set to "0". (test & adjust mode). *2: Please use these bit only Data = "0", because they are used by our company’s final test and fine-tuning AGC-on level. Note that Data = "1" is not shut-down mode. SDE00027BEB 13 AN12969A Technical Data (continued) 1. I2C-bus Mode (continued) 1) Write Mode (continued) (e) AGC-attack-time selection Write 01Hex Register D1 D0 0 0 0 (f) AGC-recovery-time selection Write 01Hex Register Attack time Recovery time D4 D3 D2 0.5 ms 0 0 0 1.0 s 1 1 ms 0 0 1 1.5 s 1 0 2 ms 0 1 0 2.0 s 1 1 4 ms 0 1 1 3.0 s 1 0 0 4.0 s 1 0 1 6.0 s (g) AGC-on-level selection at VCC = 3.0 V, VCC_D = 1.8 V, VBAT = 3.8 V *1 Write 01Hex Register AGC On Level Output (V[p-p]) D7 D6 D5 0 0 0 12.6 dBV 12 V[p-p] 0 0 1 13.2 dBV 13 V[p-p] 0 1 0 13.9 dBV 14 V[p-p] 0 1 1 14.5 dBV 15 V[p-p] 1 0 0 15.1 dBV 16 V[p-p] 1 0 1 15.6 dBV 17 V[p-p] 1 1 0 16.1 dBV 18 V[p-p] 1 1 1 16.6 dBV 19 V[p-p] Note) *1: At the time of VBAT = 3.1 V, output is clipped, excessive clip in AGC OFF can be prevented. (h) Amp. gain selection at VCC = 3.0 V, VCC_D = 1.8 V, VBAT = 3.8 V Write 00Hex Register Gain D7 0 20 dB 1 26 dB SDE00027BEB 14 AN12969A Technical Data (continued) 1. I2C-bus Mode (continued) 2) Read Mode (a) I2C-bus PROTOCOL Slave address 10110111(B7Hex) Format S Slave address R A Data 0 A Data 1 A Data 2 A P Read Mode : 1 Note) At the slave address input, it is sequentially output from Data 0. There is no necessity for inputting the sub-address. (b) Sub-address Byte and Data Byte Format MSB D7 LSB Data byte D6 D5 D4 D3 D2 D1 D0 Data 0 Sub-address Sub-address Sub-address Sub-address Sub-address Sub-address Sub-address Sub-address *0Hex *0Hex *0Hex *0Hex *0Hex *0Hex *0Hex *0Hex Latch data D7 Latch data D6 Latch data D5 Latch data D4 Latch data D3 Latch data D2 Latch data D1 Latch data D0 Data 1 Sub-address Sub-address Sub-address Sub-address Sub-address Sub-address Sub-address Sub-address *1Hex *1Hex *1Hex *1Hex *1Hex *1Hex *1Hex *1Hex Latch data D7 Latch data D6 Latch data D5 Latch data D4 Latch data D3 Latch data D2 Latch data D1 Latch data D0 Data 2 Sub-address Sub-address Sub-address Sub-address Sub-address Sub-address Sub-address Sub-address *2Hex *2Hex *2Hex *2Hex *2Hex *2Hex *2Hex *2Hex Latch data D7 Latch data D6 Latch data D5 Latch data D4 Latch data D3 Latch data D2 Latch data D1 Latch data D0 SDE00027BEB 15 AN12969A Technical Data (continued) 2. Operating temperature guarantee of I2C-bus Control The performance in the ambient temperature of operation is guaranteed theoretically in the design at normal temperature (25°C) by inspecting it at a speed of the clock that is about 50% earlier regarding the operating temperature guarantee of I2C-bus Control. But the following characteristics are logical values derived from the design of the IC and are not guaranteed by inspection. If a problem does occur related to these characteristics, Panasonic will respond in good faith to customer concerns. 3. Usage note of I2C-bus 1. The I2C bus of this product is designed to correspond to Standard mode(100 Kbps) and Fast mode(400 Kbps) in Philips Corporation I2C specification version 2.1. However, not correspond to High Speed mode (< 3.4Mbps). 2. This product operate as a slave device in I2C bus system. 3. This product is not confirmed to operate in multi-master bus system and mixing -speed bus system. And this product is not confirmed connectivity to CBUS receiver. If using this product in these mode, please confirm availability to our company. 4. Purchase of Panasonic I2C components conveys a license to use these components in an I2C systems under the Philips I2C patent right on condition that using condition conform to I2C standard specification approved by Philips Corporation. SDE00027BEB 16 AN12969A Technical Data (continued) 4. I/O block circuit diagram and pin function descriptions Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. Pin No. Waveform and voltage Internal circuit Impedance Description — — Ground pin for L-channel speaker output GND_SPL A1 DC 0 V VCC_SP(6.1 V) LOUT_POS 20k A2 DC 2.7 V A2 4k Output impedance = Equal to or less than 1 Ω L-channel positive speaker output pin GND_SPL VCC A3 — — Power supply pin — — Power supply pin for I2C-BUS 3.0 V(typ.) VCC_D A4 1.8 V(typ.) VCC_D (1.8 V) SCL A5 Input impedance 2 I C-BUS SCL pin = Hi-Z A5 Hi-Z A6 B4 C4 D3 F1 GND — — Ground pin. DC 0 V SDE00027BEB 17 AN12969A Technical Data (continued) 4. I/O block circuit diagram and pin function descriptions (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. Pin No. Waveform and voltage Internal circuit Impedance Description VCC_SP(6.1 V) LOUT_NEG 20k B1 B1 DC 2.7 V Output impedance = Equal to or less than 1 Ω 4k L-channel negative speaker output pin GND_SPL VREG(5 V) VREF B2 DC 2.5 V B2 150k The reference voltage terminal for determining DC bias of the input stage of Input impedance a speaker amplifier system. = About 75 kΩ Please connect an external capacitor to remove a ripple. 150k VCC_D (1.8 V) S.D B3 Hi-Z B3 Shut-down mode pin Input impedance Please do not make it open, because the = Hi-Z open S.D pin is not fixed. SDE00027BEB 18 AN12969A Technical Data (continued) 4. I/O block circuit diagram and pin function descriptions (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. Pin No. Waveform and voltage Internal circuit Impedance Description VCC_D (1.8 V) SDA B5 Input impedance 2 I C-BUS SDA pin = Hi-Z B5 Hi-Z GND B6 C6 D2 E2 E3 N.C. — — N.C. VCC_SP(6.1 V) ROUT_NEG 20k C1 DC 2.7 V C1 4k Output impedance = Equal to or less than 1 Ω R-channel negative speaker output pin — Power supply pin for speaker output. Please connect to F2,F3 Pin (CPOUT), and connect an external capacitor to remove a rippule. GND_SPR VCC_SP C2 — 2×VBAT SDE00027BEB 19 AN12969A Technical Data (continued) 4. I/O block circuit diagram and pin function descriptions (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. Pin No. Waveform and voltage Internal circuit Impedance Description VCC_SP(6.1 V) VREF_SP 10k C3 DC 2.7 V C3 1k 300k The reference voltage terminal for determining DC bias of the output stage Input impedance of a speaker amplifier system. = About 150 kΩ Please connect an external capacitor to remove a ripple. 300k VREG(5 V) Output impedance = Equal to or less than 10 Ω PREOUT_L C5 C5 DC 2.5 V Output terminal of L-channel input amplifier of speaker amplifier system. Please connect external resistance for the gain setting. GND_SPR D1 — — GND pin for R-channel speaker output DC 0 V VREG(5 V) Output impedance = Equal to or less than 10 Ω PREOUT_R D4 D4 DC 2.5 V SDE00027BEB Output terminal of R-channel input amplifier of speaker amplifier system. Please connect external resistance for the gain setting. 20 AN12969A Technical Data (continued) 4. I/O block circuit diagram and pin function descriptions (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. Pin No. Waveform and voltage Internal circuit Impedance Description VREG(5 V) FB_R D5 DC 2.5 V Input impedance = Hi-Z Feedback terminal of R-channel input amplifier of speaker amplifier system. The gain of the R-channel input amplifier can be set by connecting an external resistance between Pin D4 and Pin D5. Input impedance = Hi-Z Feedback terminal of L-channel input amplifier of speaker amplifier system. The gain of the L-channel input amplifier can be set by connecting an external resistance between Pin C4 and Pin C5. D5 GND VREG(5 V) FB_L D6 DC 2.5 V D6 GND VCC_SP(6.1 V) ROUT_POS 20k E1 E1 DC 2.7 V Output impedance = Equal to or less R-channel positive speaker output pin than 1 Ω 4k GND_SPR F2 F3 VREG_PRED E4 75k DC CPOUT * 0.45 25 E4 Output impedance VREG capacitor pin for charge pump = Equal to or less gate-driver than 1 25k GND_CP SDE00027BEB 21 AN12969A Technical Data (continued) 4. I/O block circuit diagram and pin function descriptions (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. Pin No. E5 E6 Waveform and voltage Internal circuit Impedance — — VBAT Power supply pin 3.8 V(typ.) VBAT (3.8 V) F2 F3 Description CPOUT F2 F3 F4 VBAT*2 1Ω ≤ Charge-pump output pin Please connect an external capacitor to remove a ripple. 1Ω ≤ Charge-pump flying capacitor connect pin. 1Ω ≤ Charge-pump flying capacitor connect pin. F5 GND_CP VBAT (3.8 V) F2 F3 C1P F4 F4 1.25MHz VBAT to CPOUT F5 GND_CP VBAT (3.8 V) F2 C1N F3 F4 F5 1.25MHz GND to VBAT F5 GND_CP GND_CP F6 — — Ground pin for charge-pump. DC 0 V SDE00027BEB 22 AN12969A Technical Data (continued) 5. Power supply and logic sequence Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. The timing control of power-ON/OFF and each logic according to the procedure below should be recommended for the best pop performance caused in switching. 1) The sequence of the power supply and each logic Please turn on the power supply first, and then get Standby OFF. The basic procedure at the power-on 1. VBAT, VCC, VCC_D, SD Power supply On On Off Off Off Off On On Standby The power OFF condition. Both the Standby and the SP_Save are in the ON condition. 2. Power ON 3. Standby OFF 4. SP_Save OFF Off Off SP_Save The basic procedure at the power-off On On 30 ms or more *1 After at least 30 ms has passed after the standby off, please off SP_Save. 0 ms or more Please get Standby On simultaneously with or after SP_Save On. 1. The power ON condition. Both the Standby and the SP_Save are in the OFF condition. 2. SP_Save ON (= Standby ON) 3. Standby ON 4. Power OFF Note) *1: This IC contains the pre-charge circuit. It is time until each bias is stabilized from Standby Off. It depends for this time on the capacity value linked to a reference voltage terminal (VREF and VREFSP), and the capacity value and resistance linked to an input terminal (IN_R and IN_L). It is a recommendation value in a constant given in the example of an application circuit (block diagram). 2) The sequence of VBAT and VCC and VCC_D This IC does not have a rising and falling order in VBAT and VCC and VCC_D. Rising and falling times of them are recommended 1 ms or more. On VBAT VCC VCC_D On Off Off 1 ms 以上 1 ms or more 1 ms 以上 1 ms or more SDE00027BEB 23 AN12969A Technical Data (continued) 5. Power supply and logic sequence (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. 3) The sequence of the charge-pump. VBAT, VCC, VCC_D, SD Power supply On Off Off Standby On Off On On Off CPOUT *1 About 2msec : CPOUT rise time More than 5msec *2 About 3msec : CPOUT fall time Note) *1: Charge-pump output CPOUT almost outputs the voltage of VBAT at the time of Standby. Also, it has a built-in discharge circuit of CPOUT pin and operates discharge to CPOUT < (VBAT + 0.9 [V]) at the time of Standby. *2: Please take more than 5msec between Standby Off and next Standby On. SDE00027BEB 24 AN12969A Technical Data (continued) 6. Explanation on mainly functions Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. 6.1 Power supply 1) Power supply for output amplifier The output amplifier operates with voltage applied to VCC_SP. VCC_SP is supplied from built-in charge-pump with output voltage of twice VBAT. AN12969A output maximum amplitude VBAT × 2 − 1.3 V (typ.) 2) Power supply for control system The control system operates with power supply applied to VCC pin. (I2C logic, clock generation circuit, etc.) 3) Power supply for signal system The signal system operates with the internal regulator of 5 V. 5 V, reference voltage of the internal regulator is generated from VCC_SP using VCC power supply. By setting signal voltage at 5 V, the dynamic range of the signal can be secured sufficiently. When the gain of the input amplifier is 0 dB, clip occurs at the amplitude of 3 V[p-p] (typ.) in input signal. 4) Power supply for I2C interface I2C interface operates with power supply applied to VCC_D pin. I2C circuit operates with VCC. 5) High voltage at shut-down pin Please use the power supply applied to VCC_D or apply voltage from the outside. Threshold voltage depends on the voltage to VCC_D. SDE00027BEB 25 AN12969A Technical Data (continued) 6. Explanation on mainly used functions (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. 6.2 Speaker amplifier 1500 pF AGC DET 10 kΩ INPUT_L 0.1 μF 10 kΩ +14 dB LOUT_NEG BTL : +6 dB – + AGC LOUT_POS +6 dB / 0 dB +14 dB 0 dB I2C Logic 1) The gain for a speaker amplifier can be adjusted, as the gain for a input amplifier can be set with an external resistance. Input impedance is also set with the external resistance. When the gain for the input amplifier is set at ±0 dB, the total gain for the speaker amplifier is +26 dB or +20 dB (It can be selected with I2C). When the external resistance for the input amplifier is assumed as R1, R2, R2 R1 Gain = 20 log(R2 / R1) – + Zin = R1 In case of R1 = 10 kΩ, R2 = 10 kΩ with the constants in the above fig, the gain for the input amplifier is ±0 dB and impedance is 10 kΩ. During operation, keep the voltage of R1 and R2 at more than 5 kΩ. 2) With an external capacity added to the input amplifier, LPF, which removes an unwanted high frequency element, can be constructed. C2 When external resistance is assumed as R2, capacity as C2, fc = 1 / (2 π × R2 × C2) R2 – + In case of R2 = 10 kΩ, C2 = 1500 pF with the constants in the above fig, Cut-off frequency, fc is 10.6 kHz. SDE00027BEB 26 AN12969A Technical Data (continued) 6. Explanation on mainly used functions (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. 6.2 Speaker amplifier (continued) 3) With the smaller capacity of the input AC coupling capacitor, HPF, which removes unwanted low frequency element, can be constructed. When input resistance is assumed as R1, and AC coupling capacitor as C1, fc = 1 / (2 π × R1 × C1) R2 C1 0.1 μF R1 – + In case of R1 = 10 kΩ, C1 = 0.1 μF, cut-off frequency, fc is 160 Hz. In case of R1 = 10 kΩ, C1 = 0.022 μF, cut-of frequency, fc is 720 Hz. 4) Bus Boost circuit can be constructed by adding capacity (RBB) and resistance (CBB) to the input amplifier. The frequency to increase 3 dB is assumed as fo Cf fo = 1 / (2 × π × Rf × CBB) Bus Boost Gain 20 log ((Rf + RBB) / Rf) Ao = 20 log ((Rf + RBB) / Rin) RBB Rf CBB CIN RIN – + 6.3 Protection circuit for speaker amplifier 1) Thermal protection circuit The thermal protection circuit operates at the Tj of approximately 150°C. The thermal protection circuit is reset automatically when the temperature drops. 2) Output pin short protection circuit Output pin-power supply line short protection Output-to-output pin short protection Output pin-GND line short protection If short-circuit is no longer detected, it will return automatically. Note) Operation is not guaranteed although the protection circuit is built in. Moreover, hundred percent inspection is not guaranteed. SDE00027BEB 27 AN12969A Technical Data (continued) 6. Explanation on mainly used functions (continued) Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. 6.4 Cautions 1) Cautions about AGC Signal output in the input amplifier is detected and converted to forward current. Compared this forward current with reference voltage, if the forward current is larger, AGC turns ON. When the frequency band of the speaker is narrower than that of the amplifier. If maximum input is made in low frequency band, AGC operates to decrease volume. Namely, low sound part is not heard from a speaker, but AGC reacts to low sound part to turn down the volume. Please carefully design so that the frequency bands is synchronized between the speaker and amplifier. Note) Frequency characteristics should be set not only for the speaker, but in the built-in condition The below Graph shows when the values of resistance and capacity are changed. Frequency Characteristics ＡＮ１２９６９Ａ VccSP=9V Vin=-22dBV AGC OFF 15 Cin=0.039uF Cf=1500pF Rin=10K RF=5.6K CBB=0.015uF RBB=10K Output level （ｄBV) 10 5 Cin=0.1uF Cf=1500pF Rin=10K RF=10K CBB=0 RBB=0 0 -5 -10 -15 0.01 0.1 1 Input Frequency (kHz) 10 100 2) Cautions about shut-down with SD pin During normal operation, when a shut-down pin is turned Low directly, shock noise comes out. As SP_Save is set in mute, first turn ON SP_Save, and then turn ON Standby to stop operation. Finally, set shut-down pin to Low. SDE00027BEB 28 AN12969A Technical Data (continued) 7. PD — Ta diagram SDE00027BEB 29 AN12969A Usage Notes 1. This IC is intended to be used for general electronic equipment [cellular phones]. Consult our sales staff in advance for information on the following applications: x Special applications in which exceptional quality and reliability are required, or if the failure or malfunction of this IC may directly jeopardize life or harm the human body. x Any applications other than the standard applications intended. (1) Space appliance (such as artificial satellite, and rocket) (2) Traffic control equipment (such as for automobile, airplane, train, and ship) (3) Medical equipment for life support (4) Submarine transponder (5) Control equipment for power plant (6) Disaster prevention and security device (7) Weapon (8) Others : Applications of which reliability equivalent to (1) to (7) is required 2. Pay attention to the direction of LSI. When mounting it in the wrong direction onto the PCB (printed-circuit-board), it might smoke or ignite. 3. Pay attention in the PCB (printed-circuit-board) pattern layout in order to prevent damage due to short circuit between pins. In addition, refer to the Pin Description for the pin configuration. 4. Perform a visual inspection on the PCB before applying power, otherwise damage might happen due to problems such as a solderbridge between the pins of the semiconductor device. Also, perform a full technical verification on the assembly quality, because the same damage possibly can happen due to conductive substances, such as solder ball, that adhere to the LSI during transportation. 5. Take notice in the use of this product that it might break or occasionally smoke when an abnormal state occurs such as output pinVCC short (Power supply fault), output pin-GND short (Ground fault), or output-to-output-pin short (load short) . And, safety measures such as an installation of fuses are recommended because the extent of the above-mentioned damage and smoke emission will depend on the current capability of the power supply. 6. When using the LSI for new models, verify the safety including the long-term reliability for each product. 7. When the application system is designed by using this LSI, be sure to confirm notes in this book. Be sure to read the notes to descriptions and the usage notes in the book. 8. Please carry out the thermal design with sufficient margin such that the power dissipation will not be exceeded, based on the conditions of power supply, load and surrounding temperature. Although indicated also in the column of the maximum rating, the maximum rating becomes an instant and the marginal value which must not exceed. It sufficiently evaluates, and I use-wish-do so that it may not exceed certainly. Moreover, don't impress neither voltage nor current to PIN which is not indicated. It may destroy in both cases. 9. Please do not make it open, because the open SD pin (Pin B3) is not fixed. SDE00027BEB 30 Request for your special attention and precautions in using the technical information and semiconductors described in this book (1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) The technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. No license is granted in and to any intellectual property right or other right owned by Panasonic Corporation or any other company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information described in this book. (3) The products described in this book are intended to be used for standard applications or general electronic equipment (such as office equipment, communications equipment, measuring instruments and household appliances). Consult our sales staff in advance for information on the following applications: – Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. – Any applications other than the standard applications intended. (4) The products and product specifications described in this book are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your requirements. (5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company. 20080805