Type IPB023N06N3 G OptiMOS™3 Power-Transistor Product Summary Features • Ideal for high frequency switching and sync. rec. • Optimized technology for DC/DC converters V DS 60 V R DS(on),max 2.3 mΩ ID 140 A • Excellent gate charge x R DS(on) product (FOM) • Very low on-resistance RDS(on) • N-channel, normal level • 100% avalanche tested • Pb-free plating; RoHS compliant • Qualified according to JEDEC1) for target applications • Halogen-free according to IEC61249-2-21 Type IPB023N06N3 G Package PG-TO263-7 Marking 023N06N Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value T C=25 °C2) 140 T C=100 °C 140 Unit A Pulsed drain current3) I D,pulse T C=25 °C 560 Avalanche energy, single pulse4) E AS I D=100 A, R GS=25 Ω 330 mJ Gate source voltage V GS ±20 V Power dissipation P tot 214 W Operating and storage temperature T j, T stg -55 ... 175 °C T C=25 °C IEC climatic category; DIN IEC 68-1 1) 55/175/56 J-STD20 and JESD22 2) Current is limited by bondwire; with an R thJC=0.7 K/W the chip is able to carry 226 A. 3) See figure 3 for more detailed information 4) See figure 13 for more detailed information Rev. 2.2 page 1 2009-12-11 IPB023N06N3 G Parameter Values Symbol Conditions Unit min. typ. max. - - 0.7 minimal footprint - - 62 6 cm² cooling area 5) - - 40 60 - - Thermal characteristics Thermal resistance, junction - case R thJC Thermal resistance, R thJA junction - ambient K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA Gate threshold voltage V GS(th) V DS=V GS, I D=141 µA 2 3 4 Zero gate voltage drain current I DSS V DS=60 V, V GS=0 V, T j=25 °C - 0.1 2 V DS=60 V, V GS=0 V, T j=125 °C - 20 200 V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 1 100 nA Drain-source on-state resistance R DS(on) V GS=10 V, I D=100 A - 1.9 2.3 mΩ Gate resistance RG - 1.4 - Ω Transconductance g fs 83 166 - S |V DS|>2|I D|R DS(on)max, I D=100 A 5) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev. 2.2 page 2 2009-12-11 IPB023N06N3 G Parameter Values Symbol Conditions Unit min. typ. max. - 12000 - 2600 - Dynamic characteristics Input capacitance C iss Output capacitance C oss Reverse transfer capacitance C rss - 87 - Turn-on delay time t d(on) - 31 - Rise time tr - 90 - Turn-off delay time t d(off) - 62 - Fall time tf - 23 - Gate to source charge Q gs - 62 - Gate to drain charge Q gd - 13 - - 38 - V GS=0 V, V DS=30 V, f =1 MHz V DD=30 V, V GS=10 V, I D=100 A, R G=3Ω 16000 pF ns Gate Charge Characteristics 6) V DD=30 V, I D=100 A, V GS=0 to 10 V nC Switching charge Q sw Gate charge total Qg - 149 198 Gate plateau voltage V plateau - 5.1 - Output charge Q oss - 120 160 nC - - 140 A - - 560 - 0.9 1.2 V - 69 - ns - 120 - nC V DD=30 V, V GS=0 V V Reverse Diode Diode continous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD Reverse recovery time t rr Reverse recovery charge Q rr 6) Rev. 2.2 T C=25 °C V GS=0 V, I F=100 A, T j=25 °C V R=30 V, I F=100A , di F/dt =100 A/µs See figure 16 for gate charge parameter definition page 3 2009-12-11 IPB023N06N3 G 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS≥10 V 250 160 200 120 I D [A] P tot [W] 150 80 100 40 50 0 0 0 50 100 150 200 0 50 T C [°C] 100 150 200 T C [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 °C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 103 1 limited by on-state resistance 1 µs 10 µs 0.5 102 Z thJC [K/W] I D [A] 100 µs 1 ms 10 0.2 0.1 0.05 10 ms 1 0.1 0.02 DC 0.01 single pulse 100 10-1 0.01 100 101 102 10-4 10-3 10-2 10-1 100 t p [s] V DS [V] Rev. 2.2 10-5 page 4 2009-12-11 IPB023N06N3 G 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 400 6 6.5 V 10 V 6V 5.5 V 5V 8V 320 6V R DS(on) [mΩ] 4 I D [A] 240 5.5 V 160 6.5 V 8V 2 10 V 5V 80 4.5 V 0 0 0 1 2 3 4 5 0 100 200 300 400 300 400 I D [A] V DS [V] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 400 320 280 320 240 200 I D [A] g fs [S] 240 160 160 120 80 80 175 °C 25 °C 40 0 0 0 2 4 6 8 Rev. 2.2 0 100 200 I D [A] V GS [V] page 5 2009-12-11 IPB023N06N3 G 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=100 A; V GS=10 V V GS(th)=f(T j); V GS=V DS parameter: I D 5 4 3.5 4 1410 µA 141 µA 2.5 3 V GS(th) [V] R DS(on) [mΩ] 3 max typ 2 2 1.5 1 1 0.5 0 0 -60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180 T j [°C] T j [°C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 105 103 Ciss 25 °C 104 175 °C 102 I F [A] Coss C [pF] 175 °C, max 103 25 °C, max 101 Crss 102 101 100 0 20 40 60 V DS [V] Rev. 2.2 0 0.5 1 1.5 2 V SD [V] page 6 2009-12-11 IPB023N06N3 G 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 Ω V GS=f(Q gate); I D=100 A pulsed parameter: T j(start) parameter: V DD 1000 12 30 V 10 12 V 100 48 V 100 °C 150 °C V GS [V] I AS [A] 8 25 °C 10 6 4 2 1 0 1 10 100 1000 0 40 80 120 160 Q gate [nC] t AV [µs] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 70 V GS Qg V BR(DSS) [V] 65 60 V g s(th) 55 Q g(th) Q sw Q gs 50 -60 -20 20 60 100 140 Q g ate Q gd 180 T j [°C] Rev. 2.2 page 7 2009-12-11 IPB023N06N3 G PG-TO263-7 (D²-Pak 7pin) 2) Current is limited by bondwire; with an R thJC=0.7 K/W the chip is able to carry 226 A. 3) See figure 3 for more detailed information 4) See figure 13 for more detailed information Rev. 2.2 page 8 2009-12-11 IPB023N06N3 G Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.2 page 9 2009-12-11