IPA057N08N3 G OptiMOS(TM)3 Power-Transistor Product Summary Features • Ideal for high frequency switching and sync. rec. • Optimized technology for DC/DC converters V DS 80 V R DS(on),max 5.7 mΩ ID 60 A • Excellent gate charge x R DS(on) product (FOM) • N-channel, normal level • 100% avalanche tested • Pb-free plating; RoHS compliant • Qualified according to JEDEC1) for target applications Type IPA057N08N3 G Package PG-TO220-FP Marking 057N08N Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value T C=25 °C2) 60 T C=100 °C 43 Unit A Pulsed drain current3) I D,pulse T C=25 °C 240 Avalanche energy, single pulse4) E AS I D=60 A, R GS=25 Ω 290 mJ Gate source voltage V GS ±20 V Power dissipation P tot 39 W Operating and storage temperature T j, T stg -55 ... 175 °C T C=25 °C IEC climatic category; DIN IEC 68-1 55/175/56 1) J-STD20 and JESD22 Current is limited by package; with an RthJC=1 K/W in a standard TO-220 package the chip is able to carry 119A. 3) See figure 3 for more detailed information 2) 4) Rev. 2.0 See figure 13 for more detailed information page 1 2008-11-20 IPA057N08N3 G Parameter Values Symbol Conditions Unit min. typ. max. - - 3.8 80 - - Thermal characteristics Thermal resistance, junction - case R thJC K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA Gate threshold voltage V GS(th) V DS=V GS, I D=90 µA 2 2.8 3.5 Zero gate voltage drain current I DSS V DS=80 V, V GS=0 V, T j=25 °C - 0.1 1 V DS=80 V, V GS=0 V, T j=125 °C - 10 100 V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 1 100 nA Drain-source on-state resistance R DS(on) V GS=10 V, I D=60 A - 4.9 5.7 mΩ V GS=6 V, I D=30 A - 6.3 9.9 - 2.2 - Ω 45 90 - S Gate resistance RG Transconductance g fs Rev. 2.0 |V DS|>2|I D|R DS(on)max, I D=60 A page 2 2008-11-20 IPA057N08N3 G Parameter Values Symbol Conditions Unit min. typ. max. - 3570 4750 - 963 1280 Dynamic characteristics Input capacitance C iss Output capacitance C oss Reverse transfer capacitance C rss - 36 - Turn-on delay time t d(on) - 17 - Rise time tr - 42 - Turn-off delay time t d(off) - 36 - Fall time tf - 9 - Gate to source charge Q gs - 18 - Gate to drain charge Q gd - 10 - - 18 - V GS=0 V, V DS=40 V, f =1 MHz V DD=40 V, V GS=10 V, I D=60 A, R G=1.6 Ω pF ns Gate Charge Characteristics 5) V DD=40 V, I D=60 A, V GS=0 to 10 V nC Switching charge Q sw Gate charge total Qg - 52 69 Gate plateau voltage V plateau - 5.0 - Output charge Q oss - 70 93 nC - - 60 A - - 240 - 1.0 1.2 V - 64 - ns - 121 - nC V DD=40 V, V GS=0 V V Reverse Diode Diode continous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD Reverse recovery time t rr Reverse recovery charge Q rr 5) Rev. 2.0 T C=25 °C V GS=0 V, I F=60 A, T j=25 °C V R=40 V, I F=I S, di F/dt =100 A/µs See figure 16 for gate charge parameter definition page 3 2008-11-20 IPA057N08N3 G 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS≥10 V 50 80 40 60 I D [A] P tot [W] 30 40 20 20 10 0 0 0 50 100 150 200 0 50 100 T C [°C] 150 200 T C [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 °C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 103 101 limited by on-state resistance 1 µs 0.5 10 µs 102 100 100 µs Z thJC [K/W] 0.2 I D [A] 1 ms 10 ms DC 101 0.1 0.05 10-1 0.02 0.01 single pulse 100 10 10-2 -1 10 0 10 1 10 2 V DS [V] Rev. 2.0 10-5 10-4 10-3 10-2 10-1 100 101 t p [s] page 4 2008-11-20 IPA057N08N3 G 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 240 8V 20 6.5 V 7V 10 V 200 16 R DS(on) [mΩ] I D [A] 4.5 V 6V 160 120 5.5 V 6V 5.5 V 5V 12 8 6.5 V 80 7V 8V 5V 10 V 4 40 4.5 V 0 0 0 1 2 3 4 5 0 40 80 V DS [V] 120 160 200 240 I D [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 180 160 150 120 g fs [S] I D [A] 120 90 80 60 175 °C 40 25 °C 30 0 0 0 2 4 6 8 Rev. 2.0 0 40 80 120 160 I D [A] V GS [V] page 5 2008-11-20 IPA057N08N3 G 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=60 A; V GS=10 V V GS(th)=f(T j); V GS=V DS parameter: I D 12 4 10 3 900 µA 90 µA max V GS(th) [V] R DS(on) [mΩ] 8 6 typ 2 4 1 2 0 0 -60 -20 20 60 100 140 -60 180 -20 20 60 100 140 180 T j [°C] T j [°C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 103 Ciss Coss 102 102 175 °C 175 °C, 98% 25 °C, 98% 101 Crss 101 100 0 20 40 60 80 V DS [V] Rev. 2.0 25 °C I F [A] C [pF] 103 0 0.5 1 1.5 2 V SD [V] page 6 2008-11-20 IPA057N08N3 G 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 Ω V GS=f(Q gate); I D=60 A pulsed parameter: T j(start) parameter: V DD 100 12 40 V 10 150 °C 100 °C 20 V 25 °C 60 V V GS [V] I AV [A] 8 10 6 4 2 1 0 0.1 1 10 100 1000 0 20 t AV [µs] 40 60 Q gate [nC] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 90 V GS Qg 85 V BR(DSS) [V] 80 75 V g s(th) 70 65 Q g(th) Q sw Q gs 60 -60 -20 20 60 100 140 Q g ate Q gd 180 T j [°C] Rev. 2.0 page 7 2008-11-20 IPA057N08N3 G PG-TO-220-3-31 Rev. 2.0 page 8 2008-11-20 IPA057N08N3 G Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.0 page 9 2008-11-20