19-3257; Rev 2; 8/09 KIT ATION EVALU E L B AVAILA 4A Ultra-Low-Input-Voltage LDO Regulators The MAX8556/MAX8557 low-dropout linear regulators operate from input voltages as low as 1.425V and are able to deliver up to 4A of continuous output current with a typical dropout voltage of only 100mV. The output voltage is adjustable from 0.5V to VIN - 0.2V. Designed with an internal p-channel MOSFET pass transistor, the MAX8556/MAX8557 maintain a low 800µA typical supply current, independent of the load current and dropout voltage. Using a p-channel MOSFET eliminates the need for an additional external supply or a noisy internal charge pump. Other features include a logic-controlled shutdown mode, built-in soft-start, short-circuit protection with foldback current limit, and thermal-overload protection. The MAX8556 features a POK output that transitions high when the regulator output is within ±10% of its nominal output voltage. The MAX8557 offers a power-on reset output that transitions high 140ms after the output has achieved 90% of its nominal output voltage. Features o 1.425V to 3.6V Input Voltage Range o Guaranteed 4A Output Current o ±1% Output Accuracy Over Load/Line/ Temperature o 100mV Dropout at 4A Load (typ) o Built-In Soft-Start o 800µA (typ) Operating Supply Current o 150µA (max) Shutdown Supply Current o Short-Circuit Current Foldback Protection o Thermal-Overload Protection o ±10% Power-OK (MAX8556) o 140ms Power-On Reset Output (MAX8557) o Fast Transient Response o 16-Pin Thin QFN (5mm x 5mm) Package The MAX8556/MAX8557 are available in a 16-pin thin QFN 5mm x 5mm package with exposed paddle. Applications Ordering Information TEMP RANGE PART Servers and Storage Devices Base Stations -40°C to +85°C 16 Thin QFN-EP* POK POK -40°C to +85°C 16 Thin QFN-EP* POR MAX8557ETE+ Optical Modules FEATURE MAX8556ETE/V+ -40°C to +85°C 16 Thin QFN-EP* MAX8556ETE+ Networking PINPACKAGE +Denotes a lead(Pb)-free/RoHS-compliant package. /V Denotes an automotive qualified part. *EP = Exposed pad. Point-of-Load Supplies ATE Pin Configuration GND N.C. 13 14 N.C. 15 EN 16 + OUT OUT 11 10 9 MAX8556 (MAX8557) EP 1 2 3 4 IN POK (POR) FB GND 12 IN MAX8556 (MAX8557) EN FB OUT OUT IN IN VOUT 0.5V TO VIN - 0.2V VIN 1.425V TO 3.6V IN TOP VIEW POK (POR) Typical Operating Circuit 8 OUT 7 OUT 6 IN 5 IN THIN QFN 5mm x 5mm ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX8556/MAX8557 General Description MAX8556/MAX8557 4A Ultra-Low-Input-Voltage LDO Regulators ABSOLUTE MAXIMUM RATINGS IN, EN, POK, POR to GND .......................................-0.3V to +4V FB, OUT to GND ..........................................-0.3V to (VIN + 0.3V) Output Short-Circuit Duration.....................................Continuous Continuous Power Dissipation (TA = +70°C) 16-Pin Thin QFN (derate 33.3mW/°C above +70°C) (Note 1)............................................2666.7mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Note 1: Maximum power dissipation is obtained using JEDEC JESD51-5 and JESD51-7 standards. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VEN = VIN = 1.8V, VOUT = 1.5V, IOUT = 2mA, TA = -40°C to +85°C, typical values are at TA = +25°C, unless otherwise noted.) (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS 3.600 V IN Input Voltage Range Input Undervoltage Lockout 1.425 VIN rising, 70mV hysteresis 1.30 1.35 1.40 VIN falling 1.23 1.28 1.33 V OUT Output Voltage Range 0.5 Load Regulation IOUT = 2mA to 4A Line Regulation VIN = 1.425V to 3.6V, VOUT = 1.225V Dropout Voltage VIN = 1.425V, IOUT = 4A, VFB = 480mV Regulated Output-Voltage Current Limit VIN = 3.6V, VOUT = 3V, VFB = 460mV 5 Load Capacitance ESR < 50mA 16 FB Threshold Accuracy (Note 3) VOUT = 1.225V to 3V, VIN = VOUT + 0.2V to 3.6V, IOUT = 2mA to 4A 495 FB Input Bias Current VFB = 0.5V, VIN = 3.6V 3.4 0.1 -0.15 V %/A 0 +0.15 %/V 100 200 mV 7 9 A 120 µF 500 505 mV 0.001 1 µA VIN = 1.425V to 3.6V, VOUT = 1.225V 800 1600 Dropout, VIN = 3.6V, VFB = 480mV 1000 2000 FB GND GND Supply Current GND Shutdown Current VIN = 3.6V, EN = GND 150 µA µA POK FB Power-OK Fault Threshold FB moving out of regulation, VIN = 1.425V to 3.6V, 10mV hysteresis POK Output Voltage, Low VFB = 0.4V or 0.6V, IPOK = 2mA 2 FB high 540 550 560 FB low 440 450 460 25 200 _______________________________________________________________________________________ mV mV 4A Ultra-Low-Input-Voltage LDO Regulators (VEN = VIN = 1.8V, VOUT = 1.5V, IOUT = 2mA, TA = -40°C to +85°C, typical values are at TA = +25°C, unless otherwise noted.) (Note 2) PARAMETER CONDITIONS POK Output Current, High VPOK = 3.6V VFB = 0.5 POK Delay Time From FB rising to POK high MIN 25 TYP MAX UNITS 0.001 1 µA 50 100 µs EN Enable Input Threshold VIN = 1.425V to 3.6V Enable Input Bias Current VEN = 0V or 3.6V EN rising 1.25 EN falling V 0.4 -1 +1 µA THERMAL SHUTDOWN Thermal-Shutdown Threshold Output on and off TJ rising +160 TJ falling +115 °C POR FB Power-On Reset Fault Threshold FB falling, VIN = 1.425V to 3.6V, 10mV hysteresis POR Output Voltage, Low POR Output Current, High POR Rising Delay Time FB rising to POR high impedance 440 450 460 mV VFB = 0.4V, IPOR = 2mA 25 200 mV VPOR = 3.6V, VFB = 0.5V 0.001 1 µA 140 200 ms 100 SOFT-START Soft-Start Time 100 µs Note 2: Specifications to TA = -40°C are guaranteed by design and not production tested. Note 3: Minimum supply voltage for output accuracy must be at least 1.425V. Typical Operating Characteristics (VEN = VIN = +1.8V, VOUT = +1.5V, IOUT = 4A, COUT = 20µF, CIN = 20µF, and TA = +25°C, unless otherwise noted.) 1.45 1.40 1.35 MAX8556 toc02 TA = +25°C 1.5015 1.5010 1.5005 TA = +85°C 1.5000 1.4995 1.4990 TA = -40°C 1.4980 ILOAD = 2A 1.8 2.4 INPUT VOLTAGE (V) 3.0 3.6 800 ILOAD = 2A 700 600 500 ILOAD = 0A 400 300 100 0 1.4975 1.2 ILOAD = 4A 900 200 1.4985 1.30 1000 GND CURRENT (µA) TA = -25°C TA = -40°C 1.5020 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 1.50 MAX8556 toc01 TA = -85°C GND CURRENT vs. INPUT VOLTAGE OUTPUT VOLTAGE vs. LOAD CURRENT 1.5025 MAX8556 toc03 OUTPUT VOLTAGE vs. INPUT VOLTAGE 1.55 0 1 2 LOAD CURRENT (A) 3 4 0 1.2 2.4 3.6 INPUT VOLTAGE (V) _______________________________________________________________________________________ 3 MAX8556/MAX8557 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (continued) (VEN = VIN = +1.8V, VOUT = +1.5V, IOUT = 4A, COUT = 20µF, CIN = 20µF, and TA = +25°C, unless otherwise noted.) DROPOUT VOLTAGE vs. LOAD CURRENT GND CURRENT vs. TEMPERATURE 700 ILOAD = 2A 600 500 400 80 DROPOUT VOLTAGE (mV) 800 ILOAD = 0A 300 70 30 10 0 0 35 60 VIN 40 100 10 2.5V 50 20 -15 MAX8556 toc06 1.8V 60 200 -40 LINE-TRANSIENT RESPONSE MAX8556 toc05 90 MAX8556 toc04 900 GND CURRENT (µA) MAX8556/MAX8557 4A Ultra-Low-Input-Voltage LDO Regulators VOUT (AC-COUPLED) VIN = 1.5V 0 85 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 100µs/div LOAD CURRENT (A) TEMPERATURE (°C) 4A LOAD-TRANSIENT RESPONSE 2A LOAD-TRANSIENT RESPONSE MAX8556 toc07 VOUT (AC-COUPLED) MAX8556 toc08 50mV/div IOUT 2A/div VOUT (AC-COUPLED) 50mV/div IOUT 40µs/div 1A/div 40µs/div ENABLE WAVEFORMS SHORT-CIRCUIT WAVEFORMS MAX8556 toc09 MAX8556 toc10 VIN 3.6V 2V/div VOUT 1V/div IOUT 5A/div 2V/div VEN 1V/div VOUT 100µs/div 4 10mV/div 200µs/div _______________________________________________________________________________________ 4A Ultra-Low-Input-Voltage LDO Regulators PSRR vs. FREQUENCY STARTUP WAVEFORMS MAX8556 toc12 MAX8556 toc11 90 80 70 2V/div PSRR (dB) 60 VIN 2A/div 50 40 IIN 30 1V/div 20 VOUT VIN = 2.5V ILOAD = 1A 10 0 1 10 1000 100 100µs/div FREQUENCY (kHz) EXPOSED PADDLE TEMPERATURE vs. AMBIENT TEMPERATURE FB REGULATION vs. TEMPERATURE 90 80 MAX8556 toc14 0.510 MAX8556 toc13 0.505 70 FB (V) 60 50 0.500 40 30 0.495 20 DATA TAKEN USING MAX8556 EVALUATION KIT 10 ILOAD = 50mA 0.490 0 0 17 34 51 68 -40 85 -15 10 35 60 AMBIENT TEMPERATURE (°C) TEMPERATURE (°C) FOLDBACK CURRENT-LIMIT WAVEFORMS CURRENT-LIMIT THRESHOLD vs. TEMPERATURE MAX8556 toc15 7.8 VOUT 500mV/div IOUT 5A/div 85 MAX8556 toc16 8.0 CURRENT-LIMIT THRESHOLD (A) EXPOSED PADDLE TEMPERATURE (°C) 100 7.6 7.4 7.2 7.0 6.8 6.6 6.4 6.2 6.0 100µs/div -40 -15 10 35 60 85 TEMPERATURE (°C) _______________________________________________________________________________________ 5 MAX8556/MAX8557 Typical Operating Characteristics (continued) (VEN = VIN = +1.8V, VOUT = +1.5V, IOUT = 4A, COUT = 20µF, CIN = 20µF, and TA = +25°C, unless otherwise noted.) 4A Ultra-Low-Input-Voltage LDO Regulators MAX8556/MAX8557 Pin Description PIN NAME FUNCTION 1–6 IN LDO Input. Connect to a 1.425V to 3.6V input voltage. Bypass with a 22µF ceramic capacitor to GND. 7–11 OUT LDO Output. Bypass with 2 x 10µF ceramic capacitors to GND. A smaller capacitance can be used if the maximum load current is less than 4A. POK (MAX8556) Power-OK Output. Open-drain output that pulls low when VOUT is outside ±10% of the expected regulation voltage or when EN is low. POK is high impedance when VOUT is within ±10% of the nominal output voltage. Connect a resistor from POK to a logic supply of less than 3.6V. POR (MAX8557) Power-On Reset. Open-drain output goes high impedance 140ms after the output is above 90% of its nominal regulation voltage. POR pulls low immediately after an output fault or when EN is low. Connect a resistor from POR to a logic supply of less than 3.6V. 12 Feedback Input. VFB is regulated to 0.5V. Connect to the center tap of a resistor-divider from output to GND to set the desired output voltage. 13 FB 14 GND Ground 15 N.C. Connect to GND or Leave Unconnected 16 EN Enable Input. Connect to GND or a logic low to shut down the device. Connect to IN or a logic high for normal operation. — EP Exposed Paddle. Connect to GND and to a ground plane for heatsinking. Block Diagram IN THRESHOLD THERMALOVERLOAD PROTECTION 0.50V REF UNDERVOLTAGE LOCKOUT ERROR AMP P 0.45V 0.55V EN SHUTDOWN LOGIC CURRENTLIMIT COMPARATOR OUT FB POK (POR) MAX8556 (MAX8557) POK (POR) CIRCUITRY GND 6 _______________________________________________________________________________________ N 4A Ultra-Low-Input-Voltage LDO Regulators The MAX8556/MAX8557 low-dropout linear regulators are capable of delivering up to 4A from low-input voltage supplies ranging from 1.425V to 3.6V with only 200mV of dropout (max). The pMOS output stage can be driven from input voltages down to 1.425V without sacrificing stability or transient performance. Supply current is not a significant function of load or input headroom because this regulator has a pMOS output device. The MAX8556/MAX8557 are fully protected from an output short circuit by current-limiting and thermal-overload circuitry. The low-power shutdown mode reduces supply current to 0.2µA (typ) to maximize battery life in portable applications. The MAX8556 includes an opendrain power-OK signal (POK) that goes high when the regulator output is within ±10% of its nominal output voltage. The MAX8557 includes an open-drain poweron-reset output (POR) that goes high 140ms after the output has risen above 90% of its nominal value. Shutdown Mode The MAX8556/MAX8557 feature a low-power shutdown mode that reduces quiescent current to 0.2µA (typ). Drive EN low to disable the voltage reference, error amplifier, gate-drive circuitry, and pass transistor, and pull the output low with 5kΩ impedance. Drive EN high or connect to IN for normal operation. Power-OK Output (POK, MAX8556 Only) The MAX8556 features a power-OK (POK) output to indicate the status of the output. POK is high impedance when the regulator output is within ±10% of its nominal output voltage. If the output voltage falls/rises outside this range or the IC experiences thermal fault, POK is internally pulled low. This open-drain output requires an external pullup resistor to VIN or another logic supply below 3.6V. For glitch immunity, an internal delay circuit prevents the output from switching for 50µs (typ) after the trip threshold is initially reached. POK is low when the IC is in shutdown mode. Internal p-Channel Pass Transistor Power-On Reset (POR, MAX8557 Only) The MAX8556/MAX8557 feature a 25mΩ p-channel MOSFET pass transistor. Unlike similar designs using pnp pass transistors, p-channel MOSFETs require no base drive, which reduces quiescent current; pnpbased regulators also waste considerable current in dropout when the pass transistor saturates, and use high base-drive currents under large loads. The MAX8556/MAX8557 do not suffer from these problems and consume only 800µA (typ) of quiescent current under heavy loads, as well as in dropout. The MAX8557 features a power-on reset output that goes high impedance 140ms (typ) after the output reaches 90% of its nominal value. This open-drain output requires an external pullup resistor to VIN or another logic supply less than 3.6V. When the output falls below 90% of the nominal output voltage or the IC experiences a thermal fault, POR immediately transitions low. POR is low when the IC is in shutdown mode. Short-Circuit/Thermal Fault Protection The MAX8556/MAX8557 are fully protected from output short circuits through current-limiting and thermal-overload circuitry. When the output is shorted to ground, the output current is foldback limited to 3A (max). Under these conditions, the device quickly heats up. When the junction temperature reaches +160°C, the thermaloverload circuitry turns off the output, allowing the device to cool. When the junction cools to +115°C, the output turns back on and attempts to establish regulation. Current limiting and thermal protection continue until the fault is removed. Operating Region and Power Dissipation The maximum power dissipation depends on the thermal resistance of the IC package and the circuit board, the temperature difference between the die junction and ambient air, and the rate of ambient airflow. The power dissipated by the IC is P = IOUT x (VIN - VOUT). Proper PCB layout can increase the allowed power dissipation by dissipating heat in the board instead of the package. See the Thermal Considerations in PCB Layout section for more details. _______________________________________________________________________________________ 7 MAX8556/MAX8557 Detailed Description MAX8556/MAX8557 4A Ultra-Low-Input-Voltage LDO Regulators Applications Information Output Voltage Selection The MAX8556/MAX8557 feature an adjustable output voltage from 0.5V to 3.4V. Set the output voltage using an external resistor-divider from the output to GND with FB connected to the center tap as shown in Figures 1 and 2. Choose R3 ≤ 1kΩ for light-load stability. Determine R2 using the following equation: ⎛V ⎞ R2 = R 3 x ⎜ OUT − 1⎟ ⎝ VFB ⎠ VIN 1.425V TO 3.6V C1 2 x 10µF 1–6 U1 R1 100kΩ Capacitors are required at the MAX8556/MAX8557 inputs and outputs for stable operation over the full temperature range and with load currents up to 4A. Connect 2 x 10µF capacitors between IN and GND and 2 x 10µF low equivalent-series-resistance (ESR) capacitors between OUT and GND. The input capacitor (CIN) lowers the source impedance of the input supply. If the MAX8556/MAX8557s’ input is close to the output of the source supply, a smaller input capacitance can be used. Otherwise, 2 x 10µF ceramic input capacitors are recommended. The output capacitor’s (C OUT ) ESR affects output noise and may affect output stability. Use output capacitors with an ESR of 0.05Ω or less to ensure stability and optimum transient dropout. For good output transient performance, use the following formula to select a minimum output capacitance: COUT = IOUT(MAX) x 1µF/200mA R2 1.4kΩ MAX8556 12 POK POK FB C2 2 x 10µF 13 R3 1kΩ ENABLED 18 SHUTDOWN EN GND 14 N.C. where VOUT is the desired output voltage and VFB is 0.5V. Capacitor Selection and Regulator Stability OUT IN VOUT 1.2V AT 4A 7–11 15 Figure 1. MAX8556 Typical Application Circuit VIN 1.7V TO 3.6V C1 2 x 10µF 1–6 OUT IN U2 R1 100kΩ R2 2kΩ MAX8557 12 POR POR FB C2 2 x 10µF 13 R3 1kΩ ENABLED 18 SHUTDOWN VOUT 1.5V AT 4A 7–11 EN GND 14 N.C. 15 Noise, PSRR, and Transient Response The MAX8556/MAX8557 are designed to operate with low-dropout voltages and low quiescent currents while still maintaining low noise, good transient response, and high AC rejection (see the Typical Operating Characteristics for a plot of Power-Supply Rejection Ratio (PSRR) vs. Frequency). When operating from noisy sources, improved supply-noise rejection and transient response can be achieved by increasing the values of the input and output bypass capacitors and through passive filtering techniques. The MAX8556/ MAX8557 load-transient response graphs (see the 8 Figure 2. MAX8557 Typical Application Circuit Typical Operating Characteristics) show two components of the output response: a DC shift from the output impedance due to the load current change, and the transient response. A typical transient overshoot for a step change in the load current from 40mA to 4A is 40mV. Use an output capacitance from 20µF to 120µF to attenuate the overshoot. _______________________________________________________________________________________ 4A Ultra-Low-Input-Voltage LDO Regulators How much power the package can dissipate strongly depends on the mounting method of the IC to the PCB and the copper area for cooling. Using the JEDEC test standard, the maximum power dissipation allowed in the package is 2667mW. This data is obtained with +70°C ambient temperature and +150°C maximum junction temperature. The test board has dimensions of 3in x 3in with four layers of 2oz copper and FR-4 material with 62mil finished thickness. Nine thermal vias are used under the thermal paddle with a diameter of 12mil and 1mil plated copper thickness. Top and bottom layers are used to route the traces. Two middle layers are solid copper and isolated from the nine thermal vias. More power dissipation can be handled by the package if great attention is given during PCB layout. For example, using the top and bottom copper as a heatsink and connecting the thermal vias to one of the middle layers (GND) transfers the heat from the package into the board more efficiently, resulting in lower junction temperature at high power dissipation in some MAX8556/MAX8557 applications. Furthermore, the solder mask around the IC area on both top and bottom layers can be removed to radiate the heat directly into the air. The maximum allowable power dissipation in the IC is as follows: PMAX = where TJ(MAX) is the maximum junction temperature (+150°C), T A is the ambient air temperature, θ JC (1.7°C/W for the 16-pin TQFN) is the thermal resistance from the junction to the case, and θCA is the thermal resistance from the case to the surrounding air through the PCB, copper traces, and the package materials. θCA is directly related to system level variables and can be modified to increase the maximum power dissipation. The TQFN package has an exposed thermal pad on its underside. This pad provides a low thermal resistance path for heat transfer into the PCB. This low thermally resistive path carries a majority of the heat away from the IC. The PCB is effectively a heatsink for the IC. The exposed paddle should be connected to a large ground plane for proper thermal and electrical performance. The minimum size of the ground plane is dependent upon many system variables. To create an efficient path, the exposed paddle should be soldered to a thermal landing, which is connected to the ground plane by thermal vias. The thermal landing should be at least as large as the exposed paddle and can be made larger depending on the amount of free space from the exposed paddle to the other pin landings. A sample layout is available on the MAX8556 evaluation kit to speed designs. (TJ(MAX) − TA ) θJC + θCA Chip Information TRANSISTOR COUNT: 3137 PROCESS: BiCMOS Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 16 TQFN-EP T1655+2 21-0140 _______________________________________________________________________________________ 9 MAX8556/MAX8557 Thermal Considerations in PCB Layout MAX8556/MAX8557 4A Ultra-Low-Input-Voltage LDO Regulators Revision History REVISION NUMBER REVISION DATE 0 4/04 Initial release — 1 8/08 Revised Pin Configuration. 1 2 8/09 Added automotive version of the MAX8556. 1 DESCRIPTION PAGES CHANGED Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.