SDZS004A − NOVEMBER 1989 − REVISED MAY 1990 • • • • • • DW OR NT PACKAGE 100K Compatible (T0P VIEW) ECL and TTL Control Inputs Y1 Y2 Y3 Y4 1 24 2 23 3 22 4 21 VCC GND GND GND Y5 Y6 Y7 Y8 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 Noninverting Outputs Flow-Through Architecture Optimizes PCB Layout Center Pin VCC, VEE, and GND Configurations Minimize High-Speed Switching Noise Package Options Include “Small Outline” Packages and Standard Plastic 300-mil DIPs A1 A2 A3 A4 OE2 (TTL) VEE GND OE1 (ECL) A5 A6 A7 A8 description logic symbol† This octal ECL-to-TTL translator is designed to provide a efficient translation between a 100K ECL signal environment to a TTL signal environment. This device is designed specifically to improve the performance and density of ECL-to-TTL CPU/bus-oriented functions such as memory-address drivers, clock drivers, and bus-oriented receivers and transmitters. OE1 OE2 17 EN 20 A1 24 23 A2 22 A3 21 A4 16 A5 15 A6 14 A7 13 A8 Two output-enable pins, OE1 and OE2 are provided. These control inputs are ANDed together with OE1 being ECL compatible and OE2 being TTL compatible. This offers the choice of controlling the outputs of the device from either a TTL or ECL signal environment. The SN100KT5541 is characterized for operation from 0°C to 85°C. ECL/TTL & ECL/TTL 1 Y1 2 Y2 3 Y3 4 Y4 9 Y5 10 Y6 11 Y7 12 Y8 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. FUNCTION TABLE OUTPUT DATA OUTPUT ENABLE INPUT (TTL) OE1 OE2 A Y X H X Z H X X Z L L L L L L H H Copyright 1990, Texas Instruments Incorporated ! "#$ ! %#&'" ($) (#"! " !%$""! %$ *$ $! $+! !#$! !(( ,-) (#" %"$!!. ($! $"$!!'- "'#($ $!. '' %$$!) • DALLAS, TEXAS 75265 • HOUSTON, TEXAS 77251−1443 POST OFFICE BOX 655303 POST OFFICE BOX 1443 1 SDZS004A − NOVEMBER 1989 − REVISED MAY 1990 logic diagram (positive logic) A1 A2 A3 A4 OE1 (ECL) OE2 (TTL) A5 A6 2 24 23 22 21 17 ECL/TTL ECL/TTL ECL/TTL ECL/TTL 1 2 3 4 Y1 Y2 Y3 Y4 ECL/TTL 20 16 15 A7 14 A8 13 ECL/TTL ECL/TTL ECL/TTL ECL/TTL • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 9 10 Y5 Y6 11 Y7 12 Y8 SDZS004A − NOVEMBER 1989 − REVISED MAY 1990 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Supply voltage range, VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −8 V to 0 V Input voltage range (TTL) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −1.2 V to 7 V Input voltage range (ECL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VEE to 0 V Voltage applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC Voltage applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 5.5 V Input current range (TTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −30 mA to 5 mA Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 85°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The TTL input voltage ratings may be exceeded provided the input current ratings are observed. recommended operating conditions MIN NOM MAX VCC VEE TTL supply voltage 4.5 5 5.5 V ECL supply voltage −4.2 −4.5 −4.8 V VIH VIL TTL high-level input voltage VIH VIL ECL high-level input voltage‡ ECL low-level input voltage‡ IIK IOH 2 TTL low-level input voltage UNIT V 0.8 V −1150 −840 mV −1810 −1490 mV TTL input clamp current −18 mA High-level output current −15 mA IOL Low-level output current 48 mA TA Operating free-air temperature 0 85 °C ‡ The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet for logic levels only. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 3 SDZS004A − NOVEMBER 1989 − REVISED MAY 1990 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK II OE2 only IIH IIL OE2 only IIH IIL Data inputs and OE1 TEST CONDITIONS MIN TYP† VCC = 4.5 V, VCC = 5.5 V, VEE = − 4.2 V, VEE = − 4.8 V, II = − 18 mA VI = 7 V VCC = 5.5 V, VCC = 5.5 V, VEE = − 4.8 V, VEE = − 4.8 V, VI = 2.7 V VI = 0.5 V VCC = 5.5 V, VCC = 5.5 V, VEE = − 4.8 V, VEE = − 4.8 V, VIH = − 840 mV VIL = − 1810 mV VOH VCC = 4.5 V, VCC = 4.5 V, VEE = − 4.5 V ± 0.3 V, VEE = − 4.5 V ± 0.3 V, IOH = − 3 mA IOH = − 15 mA VOL IOZH VCC = 4.5 V, VCC = 5.5 V, VEE = − 4.5 V ± 0.3 V, VEE = − 4.8 V, IOL = 48 mA VO = 2.7 V IOZL IOS‡ VCC = 5.5 V, VCC = 5.5 V, VEE = − 4.8 V, VEE = − 4.8 V, VO = 0.5 V VO = 0 V ICCH ICCL VCC = 5.5 V, VCC = 5.5 V, VEE = − 4.8 V VEE = − 4.8 V 64 ICCZ IEE VCC = 5.5 V, VCC = 5.5 V, VEE = − 4.8 V VEE = − 4.8 V Ci VCC = 5 V, VCC = 5 V, VEE = 4.5 V VEE = 4.5 V OE2 only OE2 only Data inputs and OE1 MAX V 0.1 mA 20 µA −0.5 mA 350 µA µA 0.50 2.4 3.3 2 3.1 0.38 V 0.55 V 50 µA −50 µA −225 mA 97 mA 80 120 mA 77 116 mA −22 −33 mA −100 Co † All typical values are at VCC = 5 V, VEE = − 4.5 V, TA = 25°C. ‡ Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. UNIT −1.2 5 pF 7 pF switching characteristics over recommended ranges of supply voltage and operating free-air temperature (see Figure 1) FROM TO (INPUT) (OUTPUT) tPLH tPHL A Y tPZH tPZL OE1 Y tPHZ tPLZ OE1 Y tPZH tPZL OE2 Y tPHZ tPLZ OE2 Y PARAMETER § All typical values are at VCC = 5 V, VEE = − 4.5 V, TA = 25°C. 4 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω MIN TYP§ MAX 1.7 4 6.2 1.6 4 6.2 2.6 4.7 6.7 3.2 5.9 8.5 2.9 5.4 7.8 1.9 4.9 7.8 1.7 4 6.2 2.5 5.1 7.7 2.1 4.3 6.4 1.1 3.7 6.3 UNIT ns ns ns ns ns SDZS004A − NOVEMBER 1989 − REVISED MAY 1990 THERMAL INFORMATION Rθ JA − Junction-to-Ambient Thermal Resistance −° C /W In digital system designs utilizing 100KT’ or 10KHT’ series logic level translators, good thermal management is an important consideration for proper circuit performance and extended reliability. The size of the “small outline” package makes thermal management even more important due to the increased board and thermal densities. Junction-to-Ambient Thermal Resistance vs Air Velocity 100 The thermal resistances in Figure 1 can be used to approximate typical and maximum virtual junction temperatures for the SN100KT’ and SN10KHT’ translators. The junction temperature of these devices may be estimated using Equation 1. 24-Pin DW Package 28-Pin DW Package 80 60 40 20 24-Pin NT Package 28-Pin NT Package 0 0 TJ = RΘJA (VCC • ICC + VEE • IEE + PDRIVER) + TA 200 400 600 800 1000 Air Velocity − linear ft/min (1) where TJ = virtual junction temperature TA = ambient air temperature RΘJA = thermal resistance, junction to ambient air ICC = TTL level supply current (from the databook) IEE = ECL supply current VCC = TTL level suply voltage (5 V for typical, 5.5 V for maximum) VEE = ECL level supply voltage: SN10KHT’ − (−5.2 V Typ, −5.46 V Max) SN100KHT’ − (−54.5 V Typ, −4.80 V Max) PDRIVER = total power consumed by the output driver • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 5 SDZS004A − NOVEMBER 1989 − REVISED MAY 1990 PARAMETER MEASUREMENT INFORMATION 7V SWITCH POSITION TABLE R1 From Output Under Test Test Point CL (See Note A) S1 Open Open Open Closed Open Closed TEST tPLH tPHL tPZH tPZL tPHZ tPLZ Open S1 R2 LOAD CIRCUIT tr ECL Input (See Note B) 20% tf 80% 50% −950 mV 80% 50% 20% −1690 mV tPHL tPLH VOH In-Phase TTL Output 1.5 V 1.5 V VOL ECL- INPUT PROPAGATION DELAY TIMES −950 mV ECL Output Control (Low-level enabling) 50% 50% −1690 mV tPZL Output Waveform 1 (See Note D) tPLZ 3.5 V 3V 1.5 V 1.5 V 0 tPLZ 3.5 V Output Waveform 1 (See Note D) 50% 0.3 V TTL Output Control (Low-level enabling) (See Note B) tPZL 50% VOL 0.3 V VOL Output Waveform 2 (See Note D) tPZH tPHZ tPZH Output Waveform 2 (See Note D) VOH 0.3 V 50% tPHZ 0.3 V VOH 50% 0 0 TTL ENABLE AND DISABLE TIMES ECL ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. For TTL inputs, input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. C. For ECL inputs, input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 1.5 ns, tf ≤ 1.5 ns. D. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 6 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • PACKAGE OPTION ADDENDUM www.ti.com 24-Jun-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN100KT5541DW OBSOLETE SOIC DW 24 TBD Call TI Call TI SN100KT5541NT OBSOLETE PDIP NT 24 TBD Call TI Call TI SN100KT5541NT OBSOLETE PDIP NT 24 TBD Call TI Call TI Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. 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