TI SN74ABT162827

SCBS248B − JULY 1993 − REVISED DECEMBER 1994
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SN54ABT162827 . . . WD PACKAGE
SN74ABT162827 . . . DGG OR DL PACKAGE
(TOP VIEW)
Output Ports Have Equivalent 25-Ω Series
Resistors, So No External Resistors Are
Required
Members of the Texas Instruments
Widebus  Family
State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
Typical VOLP (Output Ground Bounce)
< 1 V at VCC = 5 V, TA = 25°C
Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes
PCB Layout
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
1OE1
1Y1
1Y2
GND
1Y3
1Y4
VCC
1Y5
1Y6
1Y7
GND
1Y8
1Y9
1Y10
2Y1
2Y2
2Y3
GND
2Y4
2Y5
2Y6
VCC
2Y7
2Y8
GND
2Y9
2Y10
2OE1
description
The ′ABT162827 are noninverting 20-bit buffers
composed of two 10-bit buffers with separate
output-enable signals. For either 10-bit buffer, the
two output-enable (1OE1 and 1OE2 or 2OE1 and
2OE2) inputs must both be low for the
corresponding Y outputs to be active. If either
output-enable input is high, the outputs of that
10-bit buffer are in the high-impedance state.
1
56
2
55
3
54
4
53
5
52
6
51
7
50
8
49
9
48
10
47
11
46
12
45
13
44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
25
32
26
31
27
30
28
29
1OE2
1A1
1A2
GND
1A3
A14
VCC
1A5
1A6
1A7
GND
1A8
1A9
1A10
2A1
2A2
2A3
GND
2A4
2A5
2A6
VCC
2A7
2A8
GND
2A9
2A10
2OE2
The outputs, which are designed to source or sink
up to 12 mA, include 25-Ω series resistors to
reduce overshoot and undershoot.
To ensure the high-impedance state during power up or power down, OE inputs should be tied to VCC through
a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74ABT162827 is available in TI’s shrink small-outline package (DL), which provides twice the I/O pin
count and functionality of standard small-outline packages in the same printed-circuit-board area.
The SN54ABT162827 is characterized for operation over the full military temperature range of −55°C to 125°C.
The SN74ABT162827 is characterized for operation from − 40°C to 85°C.
Widebus and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.
Copyright  1994, Texas Instruments Incorporated
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1
SCBS248B − JULY 1993 − REVISED DECEMBER 1994
FUNCTION TABLE
(each 10-bit buffer)
INPUTS
OE1
OE2
A
OUTPUT
Y
L
L
L
L
H
L
L
H
H
X
X
Z
X
H
X
Z
logic symbol†
1OE1
1OE2
2OE1
2OE2
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
1A9
1A10
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
2A9
2A10
1
logic diagram (positive logic)
&
56
28
54
EN2
1A1
&
29
55
EN1
1OE1
1OE2
1
2
1
3
52
5
51
6
49
8
48
9
47
10
45
12
44
13
43
14
42
15
41
1
2
16
40
17
38
19
37
20
36
21
34
23
33
24
31
26
30
27
1
56
55
1Y1
1Y1
To Nine Other Channels
1Y2
1Y3
2OE1
2OE2
1Y4
1Y5
28
29
1Y6
1Y7
2A1
42
15
2Y1
1Y8
1Y9
To Nine Other Channels
1Y10
2Y1
2Y2
2Y3
2Y4
2Y5
2Y6
2Y7
2Y8
2Y9
2Y10
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
2
2
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SCBS248B − JULY 1993 − REVISED DECEMBER 1994
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the high state or power-off state, VO . . . . . . . . . . . . . −0.5 V to 5.5 V
Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −18 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 2): DGG package . . . . . . . . . . . . . . . . . . 1 W
DL package . . . . . . . . . . . . . . . . . . 1.4 W
Operating free-air temperature range, TA: SN54ABT162827 . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
SN74ABT162827 . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.
For more information, refer to the Package Thermal Considerations application note in the 1994 ABT Advanced BiCMOS Technology
Data Book, literature number SCBD002B.
recommended operating conditions (see Note 3)
SN54ABT162827
MIN
MAX
MIN
MAX
4.5
5.5
4.5
5.5
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
IOH
IOL
High-level output current
VCC
−12
Low-level output current
High-level input voltage
2
0
Control inputs
Input transition rise or fall rate
∆t /∆VCC
Power-up ramp rate
2
0.8
Input voltage
∆t /∆V
SN74ABT162827
Data inputs
−55
V
V
0.8
V
VCC
−12
V
mA
12
12
mA
9
9
10
10
200
TA
Operating free-air temperature
NOTE 3: Unused or floating inputs must be held high or low.
UNIT
0
µs / V
200
125
−40
ns / V
85
°C
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&!+*6) %. $"#&%*"*') !)#) /.%$'&# 4"!%' *%"&)2
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3
SCBS248B − JULY 1993 − REVISED DECEMBER 1994
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V,
II = −18 mA
IOH = − 1 mA
VCC = 5 V,
IOH = − 1 mA
IOH = − 3 mA
VCC = 4.5 V
VOL
VCC = 4.5 V
II
VCC = 0 to 5.5 V,
VI = VCC or GND
IOZPU
MIN
TA = 25°C
TYP†
MAX
SN54ABT162827
MIN
−1.2
IOH = − 12 mA
IOL = 8 mA
MAX
SN74ABT162827
MIN
−1.2
−1.2
2.5
2.5
2.5
3
3
3
2.4
2.4
2.4
2
2
0.4
0.8
MAX
UNIT
V
V
2
0.8
0.65
IOL = 12 mA
0.8
V
±1
±1
±1
µA
VCC = 0 to 2.1 V,
VO = 0.5 V to 2.7 V, OE = X
± 50
± 50
± 50
µA
IOZPD
VCC = 2.1 V to 0,
VO = 0.5 V to 2.7 V, OE = X
± 50
± 50
± 50
µA
IOZH‡
VCC = 2.1 V to 5.5 V,
VO = 2.7 V,
OE ≥ 2 V
10
10
10
µA
IOZL‡
VCC = 2.1 V to 5.5 V,
VO = 0.5 V,
OE ≥ 2 V
−10
−10
−10
µA
Ioff
ICEX
VCC = 0,
VCC = 5.5 V,
VI or VO ≤ 4.5 V
VO = 5.5 V
±100
µA
VCC = 5.5 V,
VO = 2.5 V
Outputs high
IO§
ICC
±100
50
−25
−75
−100
50
−25
−100
−25
µA
mA
Outputs high
2
2
2
Outputs low
32
32
32
2
2
2
Outputs enabled
1
1.5
1
Outputs disabled
0.05
1
0.05
1.5
1.5
1.5
Outputs
disabled
Data inputs
∆ICC¶
Control inputs
VCC = 5.5 V,
IO = 0,
VI = VCC or GND
VCC = 5.5 V,
One input at
3.4 V,
Other inputs at
VCC or GND
VCC = 5.5 V,
One input at 3.4 V,
Other inputs at VCC or GND
Ci
VI = 2.5 V or 0.5 V
3.5
Co
VO = 2.5 V or 0.5 V
8
† All typical values are at VCC = 5 V.
‡ The parameters IOZH and IOZL include the input leakage current.
§ Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
¶ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
, "*-%.(+"%* &%*&).*# /.%$'&# "* !) -%.(+"7) %.
$)#"6* /!+#) %- $)7)1%/()*2 ,!+.+&)."#"& $++ +*$ %!).
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&!+*6) %. $"#&%*"*') !)#) /.%$'&# 4"!%' *%"&)2
4
50
−100
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mA
mA
pF
pF
SCBS248B − JULY 1993 − REVISED DECEMBER 1994
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
Y
tPZH
tPZL
OE
Y
tPHZ
tPLZ
OE
Y
PARAMETER
VCC = 5 V,
TA = 25°C
MIN TYP†
MAX
SN54ABT162827
SN74ABT162827
MIN
MAX
MIN
MAX
1
2.1
3.6
1
4.1
1
3.9
1.1
2.8
4.2
1.1
5
1.1
4.7
1.5
3.4
6.3
1.5
7.2
1.5
6.9
1.6
3.5
7.3
1.6
6.6
1.6
6.3
2.1
4.1
6.5
2.1
6.8
2.1
6.6
1.5
3.5
5.9
1.5
7.3
1.5
6.3
UNIT
ns
ns
ns
† All typical values are at VCC = 5 V.
, "*-%.(+"%* &%*&).*# /.%$'&# "* !) -%.(+"7) %.
$)#"6* /!+#) %- $)7)1%/()*2 ,!+.+&)."#"& $++ +*$ %!).
#/)&"-"&+"%*# +.) $)#"6* 6%+1#2 )3+# *#.'()*# .)#).7)# !) ."6! %
&!+*6) %. $"#&%*"*') !)#) /.%$'&# 4"!%' *%"&)2
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5
SCBS248B − JULY 1993 − REVISED DECEMBER 1994
PARAMETER MEASUREMENT INFORMATION
7V
S1
500 Ω
From Output
Under Test
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
7V
Open
LOAD CIRCUIT FOR OUTPUTS
3V
Timing Input
1.5 V
0V
tw
tsu
3V
Input
1.5 V
th
3V
1.5 V
Data Input
1.5 V
1.5 V
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
1.5 V
Input
0V
Output
1.5 V
VOL
tPLH
tPHL
Output
Waveform 2
S1 at Open
(see Note B)
VOH
Output
1.5 V
1.5 V
0V
tPLZ
Output
Waveform 1
S1 at 7 V
(see Note B)
VOH
1.5 V
1.5 V
tPZL
tPHL
tPLH
3V
Output
Control
1.5 V
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
1.5 V
tPZH
3.5 V
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH − 0.3 V
VOH
[0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
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PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN74ABT162827DGGR
OBSOLETE
TSSOP
DGG
56
TBD
Call TI
Call TI
SN74ABT162827DL
OBSOLETE
SSOP
DL
56
TBD
Call TI
Call TI
SN74ABT162827DLR
OBSOLETE
SSOP
DL
56
TBD
Call TI
Call TI
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
0,50
48
0,08 M
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
1
0,25
24
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
48
56
64
A MAX
12,60
14,10
17,10
A MIN
12,40
13,90
16,90
DIM
4040078 / F 12/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold protrusion not to exceed 0,15.
Falls within JEDEC MO-153
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MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
0.0135 (0,343)
0.008 (0,203)
48
0.005 (0,13) M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
1
0°–ā8°
24
0.040 (1,02)
A
0.020 (0,51)
Seating Plane
0.110 (2,79) MAX
0.004 (0,10)
0.008 (0,20) MIN
PINS **
28
48
56
A MAX
0.380
(9,65)
0.630
(16,00)
0.730
(18,54)
A MIN
0.370
(9,40)
0.620
(15,75)
0.720
(18,29)
DIM
4040048 / E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
Falls within JEDEC MO-118
POST OFFICE BOX 655303
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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
Data Converters
DSP
Clocks and Timers
Interface
Logic
Power Mgmt
Microcontrollers
RFID
RF/IF and ZigBee® Solutions
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lprf
Applications
Audio
Automotive
Broadband
Digital Control
Medical
Military
Optical Networking
Security
Telephony
Video & Imaging
Wireless
www.ti.com/audio
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/medical
www.ti.com/military
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
www.ti.com/wireless
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