SLLS456B − NOVEMBER 2000 − REVISED APRIL 2005
D Designed for TIA/EIA-485, TIA/EIA-422, and
D
D
D
D
D
D
D
ISO 8482 Applications
Signaling Rate† Exceeding 50 Mbps
Fail-Safe in Bus Short-Circuit, Open-Circuit,
and Idle-Bus Conditions
ESD Protection on Bus Inputs
Exceeds 6 kV
Common-Mode Bus Input Range
–7 V to 12 V
Propagation Delay Times <16 ns
Low Standby Power Consumption <20 µA
Pin-Compatible Upgrade for AM26LS32,
DS96F173, LTC488, and SN75173
SN65LBC173A (Marked as 65LBC173A)
SN75LBC173A (Marked as 75LBC173A)
D or N PACKAGE
(TOP VIEW)
1B
1A
1Y
G
2Y
2A
2B
GND
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
4B
4A
4Y
G
3Y
3A
3B
logic diagram
G
description
G
The SN65LBC173A and SN75LBC173A are
quadruple differential line receivers with 3-state
outputs, designed for TIA/EIA-485 (RS-485),
TIA/EIA-422 (RS-422), and ISO 8482 (Euro
RS-485) applications.
These devices are optimized for balanced
multipoint bus communication at data rates up to
and exceeding 50 million bits per second. The
transmission media may be twisted-pair cables,
printed-circuit board traces, or backplanes. The
ultimate rate and distance of data transfer is
dependent upon the attenuation characteristics of
the media and the noise coupling to the
environment.
1A
1B
1Y
2A
2B
2Y
3A
3B
3Y
4A
4B
4Y
Each receiver operates over a wide range of positive and negative common-mode input voltages, and features
ESD protection to 6 kV, making it suitable for high-speed multipoint data transmission applications in harsh
environments. These devices are designed using LinBiCMOSt, facilitating low power consumption and
robustness.
The G and G inputs provide enable control logic for either positive- or negative-logic enabling all four drivers.
When disabled or powered off, the receiver inputs present a high-impedance to the bus for reduced system
loading.
The SN75LBC173A is characterized for operation over the temperature range of 0°C to 70°C. The
SN65LBC173A is characterized over the temperature range from −40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinBiCMOS is a trademark of Texas Instruments.
†The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
Copyright 2001, Texas Instruments Incorporated
!"# $ %&'# "$ (&)*%"# +"#',
+&%#$ %! # $('%%"#$ (' #-' #'!$ '."$ $#&!'#$
$#"+"+ /""#0, +&%# (%'$$1 +'$ # '%'$$"*0 %*&+'
#'$#1 "** (""!'#'$,
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1
SLLS456B − NOVEMBER 2000 − REVISED APRIL 2005
FUNCTION TABLE
(each receiver)
ENABLES
DIFFERENTIAL INPUTS
A – B (VID)
G
G
H
X
X
L
H
X
X
L
H
X
X
L
L
H
OPEN
OPEN
H
X
X
L
H
X
VID ≤ −0.2 V
−0.2 V < VID < −0.01 V
−0.01 V ≤ VID
X
Short circuit
Open circuit
H = high level, L = low level,
? = indeterminate
OUTPUT
Y
L
?
H
Z
H
H
X = irrelevant, Z = high impedance (off),
AVAILABLE OPTIONS
PACKAGE
TA
PLASTIC
SMALL OUTLINE†
(JEDEC MS-012)
PLASTIC
DUAL-IN-LINE
(JEDEC MS-001)
0°C to 70°C
SN75LBC173AD
SN75LBC173AN
−40°C to 85°C
SN65LBC173AD
SN65LBC173AN
† Add an R suffix for taped and reeled
equivalent input and output schematic diagrams
A Input
B Input
VCC
16 V
100 kΩ
VCC
4 kΩ
18 kΩ
Input
Input
16 V
G Input
4 kΩ
16 V
18 kΩ
4 kΩ
16 V
G Input
VCC
100 kΩ
4 kΩ
VCC
Y Output
VCC
100 kΩ
1 kΩ
Input
100 kΩ
8V
2
Input
8V
1 kΩ
5Ω
8V
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8V
Output
8V
SLLS456B − NOVEMBER 2000 − REVISED APRIL 2005
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V
Voltage range at any bus input (DC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −10 V to 15 V
Voltage range at any bus input (transient pulse through 100 Ω, see Figure 5) . . . . . . . . . . . . . . −30 V to 30 V
Voltage input range at G and G, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Receiver output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA
Electrostatic discharge:
Human body model (see Note 2):
A and B to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 kV
All pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 kV
Charged-device model (see Note 3): All pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
Continuous power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Power Dissipation Rating Table
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential I/O bus voltages, are with respect to GND, and are steady-state (unless otherwise specified).
2. Tested in accordance with JEDEC Standard 22, Test Method A114-A.
3. Tested in accordance with JEDEC Standard 22, Test Method C101.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR‡
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
D
1080 mW
8.7 mW/°C
690 mW
560 mW
N
1150 mW
9.2 mW/°C
736 mW
598 mW
‡ This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air
flow.
recommended operating conditions
Supply voltage, VCC
Voltage at any bus terminal
High-level input voltage, VIH
Low-level input voltage, VIL
Output current
Operating free-air temperature, TA
A, B
G, G
MIN
NOM
MAX
UNIT
4.75
5
5.25
V
−7
12
V
2
VCC
0.8
V
0
Y
−8
8
SN75LBC173A
0
70
SN65LBC173A
−40
85
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
mA
°C
3
SLLS456B − NOVEMBER 2000 − REVISED APRIL 2005
electrical characteristics over recommended operating conditions
PARAMETER
TEST CONDITIONS
VIT+
VIT−
Positive-going differential input voltage threshold
VHYS
VIK
Hysteresis voltage (VIT+ − VIT−)
VOH
High-level output voltage
Negative-going differential input voltage threshold
−7 V ≤ VCM ≤ 12 V (VCM = (VA + VB )/2)
TYP†
MAX
−80
−10
−200
−120
II = −18 mA
VID = 200 mV,
IOH = −8 mA
−1.5
−0.8
2.7
4.8
mV
V
See Figure 1
VOL
Low-level output voltage
VID = −200 mV,
IOL = 8 mA
IOZ
High-impedance-state output current
VO = 0 V to VCC
II
Line input current
Other input at 0 V,
VCC = 0 V or 5 V
IIH
IIL
High-level input current
RI
Input resistance
ICC
Supply current
V
0.2
−1
VI = 12 V
VI = −7 V
0.4
1
A, B inputs
VID = 5 V
No load
µA
0.9
mA
−0.7
100
Enable inputs G, G
UNIT
mV
40
Input clamp voltage
Low-level input current
MIN
µA
−100
µA
12
kΩ
20
µA
11
16
mA
TYP†
MAX
G at 0 V, G at VCC
G at VCC, G at 0 V
† All typical values are at VCC = 5 V and 25°C.
switching characteristics over recommended operating conditions
PARAMETER
TEST CONDITIONS
MIN
UNIT
tr
tf
Output rise time
2
4
ns
Output fall time
2
4
ns
tPLH
tPHL
Propagation delay time, low-to-high level output
9
12
16
ns
9
12
16
ns
tPZH
tPHZ
Propagation delay time, high-impedance to high-level output
27
38
ns
tPZL
tPLZ
Propagation delay time, high-impedance to low level output
tsk(p)
tsk(o)
Pulse skew (| (tPLH – tPHL) |)
VID = −3 V to 3 V, See Figure 2
Propagation delay time, high-to-low level output
Propagation delay time, high-level to high-impedance output
Propagation delay time, low-level to high-impedance output
See Figure 3
See Figure 4
Output skew (see Note 4)
7
16
ns
29
38
ns
12
16
ns
0.2
1
ns
2
ns
tsk(pp)
Part-to-part skew (see Note 5)
2
ns
† All typical values are at VCC = 5 V and 25°C.
NOTES: 4. Outputs skew (tsk(o)) is the magnitude of the time delay difference between the outputs of a single device with all of the inputs
connected together.
5. Part-to-part skew (tsk(pp)) is the magnitude of the difference in propagation delay times between any specified terminals of two
devices when both devices operate with the same input signals, the same supply voltages, at the same temperature, and have
identical packages and test circuits.
4
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SLLS456B − NOVEMBER 2000 − REVISED APRIL 2005
PARAMETER MEASUREMENT INFORMATION
VA
IO
VID
VB
VO
Figure 1. Voltage and Current Definitions
50 Ω
Generator
Input B
A
3V
1.5 V
Y
1.5 V
Input A
B
0V
tPLH
CL = 15 pF
(Includes Probe and
Jig Capacitance)
50 Ω
Generator
tPHL
1.5 V
Output Y
90%
10%
tr
VOH
90%
10%
VOL
tf
Generators: PRR = 1 MHz, 50% Duty Cycle,
tr <6 ns, Zo = 50 Ω
Figure 2. Switching Test Circuit and Waveforms
VCC
1.5 V
A
1 kΩ
Y
B
CL = 15 pF
(Includes Probe and
Jig Capacitance)
3V
G
1.5 V
0V
tPHZ
tPZH
G
Generator
50 Ω
G
Y
VCC
1.5 V
1.5 V
VOH
VOH −0.5 V
GND
Generators: PRR = 1 MHz, 50% Duty Cycle,
tr <6 ns, Zo = 50 Ω
Figure 3. Test Circuit Waveforms, tPZH and tPHZ
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SLLS456B − NOVEMBER 2000 − REVISED APRIL 2005
PARAMETER MEASUREMENT INFORMATION
VCC
A
−1.5 V
Y
1 kΩ
B
CL = 15 pF
(Includes Probe and
Jig Capacitance)
3V
G
1.5 V
1.5 V
0V
tPLZ
tPZL
G
Generator
50 Ω
VCC
G
Y
1.5 V
VCC
VOL + 0.5 V
VOL
Generators: PRR = 1 MHz, 50% Duty Cycle,
tr <6 ns, Zo = 50 Ω
Figure 4. Test Circuit Waveforms, tPZL and tPLZ
100 Ω
VTEST
0V
Pulse Generator,
15 µs Duration,
1% Duty Cycle
15 µs
1.5 ms
Figure 5. Test Circuit and Waveform, Transient Over-Voltage Test
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
VTEST
SLLS456B − NOVEMBER 2000 − REVISED APRIL 2005
TYPICAL CHARACTERISTICS
BUS INPUT CURRENT
vs
BUS INPUT VOLTAGE
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
800
6
VCC = 5 V
TA = 25°C
600
5
400
VO − Output Voltage − V
Bus Input Current −µ A
VCC = 0 V
VCC = 5 V
200
0
−200
VIC = −7 V
VIC = 0 V
VIC = 12 V
4
VIC = −7 V
VIC = 0 V
VIC = 12 V
3
2
1
−400
−600
−10
−5
0
5
10
0
−150
15
−100
Bus Input Voltage − V
−50
0
50
Differential Input Voltage − mV
Figure 6
Figure 7
SUPPLY CURRENT
vs
SIGNALING RATE (ALL FOUR CHANNELS)
PROPAGATION DELAY TIME
vs
FREE-AIR TEMPERATURE
60
13.5
Propagation Delay Time − ns
I CC − Supply Current − mA
50
40
VCC = 5.25 V, CL = 15 pF
30
VCC = 5 V, CL = 15 pF
VCC = 4.75 V, CL = 15 pF
20
10
13
tPLH
12.5
tPHL
12
11.5
VCC = 5 V, No Load
0
1
10
100
Signaling Rate (All Four Channels) − Mbps
11
−40
−20
0
20
40
60
80
TA − Free-Air Temperature − °C
Figure 8
Figure 9
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7
SLLS456B − NOVEMBER 2000 − REVISED APRIL 2005
TYPICAL CHARACTERISTICS
500 mV
A, B
−500 mV
20 ns
5V
Y
0V
Figure 10. Receiver Inputs and Outputs, 50 Mbps Signaling Rate
8
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SLLS456B − NOVEMBER 2000 − REVISED APRIL 2005
APPLICATION INFORMATION
TMS320F243
DSP
(Controller)
SN65LBC174A
SN65LBC173A
SPISIMO
TMS320F241
DSP
(Embedded
Application)
SPISIMO
IOPA1
(Enable)
SPISTE
SPISTE
IOPA1
IOPA2
SPICLK
SPICLK
IOPA2
(Enable)
IOPA0
(Handshake
/Status)
IOPA0
SPISOMI
SPISOMI
Figure 11. Typical Application Circuit, DSP-to-DSP Link via Serial Peripheral Interface
Motion Controller
Servo
Drive
SN65LBC173A
Encoder Phase A
Encoder Phase B
Encoder Index
Status Bit
Figure 12. Typical Application Circuit, High-Speed Servomotor Encoder Interface
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9
SLLS456B − NOVEMBER 2000 − REVISED APRIL 2005
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
14
0.010 (0,25) M
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°−ā 8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.069 (1,75) MAX
0.010 (0,25)
0.004 (0,10)
PINS **
0.004 (0,10)
8
14
16
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MIN
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
DIM
4040047 / D 10/96
NOTES: A.
B.
C.
D.
10
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
Falls within JEDEC MS-012
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SLLS456B − NOVEMBER 2000 − REVISED APRIL 2005
MECHANICAL DATA
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PINS SHOWN
PINS **
14
16
18
20
A MAX
0.775
(19,69)
0.775
(19,69)
0.920
(23,37)
0.975
(24,77)
A MIN
0.745
(18,92)
0.745
(18,92)
0.850
(21,59)
0.940
(23,88)
DIM
A
16
9
0.260 (6,60)
0.240 (6,10)
1
8
0.070 (1,78) MAX
0.035 (0,89) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gauge Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.430 (10,92) MAX
0.010 (0,25) M
14/18 PIN ONLY
4040049/D 02/00
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (20-pin package is shorter than MS-001).
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11
PACKAGE OPTION ADDENDUM
www.ti.com
22-Mar-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN65LBC173AD
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN65LBC173ADG4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN65LBC173ADR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN65LBC173ADRG4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN65LBC173AN
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN65LBC173ANE4
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN75LBC173AD
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75LBC173ADG4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75LBC173ADR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75LBC173ADRG4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75LBC173AN
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN75LBC173ANE4
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
22-Mar-2006
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Jun-2007
TAPE AND REEL INFORMATION
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
Device
16-Jun-2007
Package Pins
Site
Reel
Diameter
(mm)
Reel
Width
(mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SN65LBC173ADR
D
16
FMX
330
0
6.5
10.3
2.1
8
16
Q1
SN75LBC173ADR
D
16
FMX
330
0
6.5
10.3
2.1
8
16
Q1
TAPE AND REEL BOX INFORMATION
Device
Package
Pins
Site
Length (mm)
Width (mm)
Height (mm)
SN65LBC173ADR
D
16
FMX
342.9
336.6
28.58
SN75LBC173ADR
D
16
FMX
342.9
336.6
28.58
Pack Materials-Page 2
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improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
Customers should obtain the latest relevant information before placing orders and should verify that such information is current and
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s
standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this
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Products
Applications
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amplifier.ti.com
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www.ti.com/audio
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dataconverter.ti.com
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www.ti.com/automotive
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dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
RFID
www.ti-rfid.com
Telephony
www.ti.com/telephony
Low Power
Wireless
www.ti.com/lpw
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www.ti.com/video
Wireless
www.ti.com/wireless
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