VI BRICK® PFM® PF175B480C033FP-00 Actual Size: 1.92 x 1.91 x 0.37 in 48,7 x 48,6 x 9,5 mm S ® US C C NRTL US Isolated AC-DC Converter with PFC Features Typical Applications • Isolated AC-to-DC converter with PFC • Telecom (WiMAX, Power Amplifiers, Optical Switches) • Low profile • Automatic Test Equipment (ATE) • Power Density: 243 W/in3 • LED lighting 2 330 W in 3.67 in footprint • High Efficiency Server Power • High efficiency (~93%) over world-wide AC mains ° • Office equipment (Printers, Copiers, Projectors) Rectified 85 – 264 VAC • Industrial Equipment (Process Controllers, Material • Secondary-side energy storage Handling, Factory Automation) • Simplified mounting and thermal management • Switch Mode Power Supplies (SMPS) • SELV 48 V Output ° Efficient power distribution to POL converters ° 3,000 VAC / 4,242 VDC isolation Product Overview The VI BRICK® PFM® Isolated AC-DC Converter with PFC is an AC-toDC converter, operating from a rectified universal AC input to generate an isolated 48 Vdc output bus with power factor correction. With its ZVS high frequency Adaptive Cell™ topology, the VI BRICK PFM converter consistently delivers high efficiency across worldwide AC mains. Modular PFM converters and downstream DC-DC VI BRICK products support secondary-side energy storage and efficient power distribution at 48 V, providing superior power system performance and connectivity from the wall plug to the point-of-load. • PFC (THD) exceeds EN61000-3-2 requirements • ZVS high frequency (MHz) switching • Low profile, high density filtering • 100°C baseplate operation Major Specifications VIN 85 – 264 VAC (rectified) VOUT 48 VDC (isolated) POUT 330 W Nomenclature Function Input Voltage Designator P 1 F 7 5 Universal (85-264 Vac) Package Size Output Voltage Vout (V) (x10) B 4 Grade C= T= M= 8 Temperature Grade 0 Operating -20 to 100°C -40 to 100°C -55 to 100°C C Output Power Pout (W) (÷10) 0 Storage -40 to 125°C -40 to 125°C -65 to 125°C VI BRICK® PFM® Rev 1.3 vicorpower.com Page 1 of 20 1/2013 800 735.6200 3 3 Baseplate Pin Style F P Revision – F = Slotted Flange P = Through hole 0 0 PF175B480C033FP-00 Typical Application: Universal AC Input, Quad Output, 300W Power Supply PRM® Regulator 85 264 Vac +OUT +IN Rectifier, Filter, Transient Protection PFM® +OUT Converter -IN 48 V -OUT PRM® Regulator -OUT Cool-Power® ZVS Buck 24 V 7A 3.3V 6A Cool-Power® ZVS Buck 1.8V 8A VTM® Transformer 1.0V 100A 1.0 ABSOLUTE MAXIMUM RATINGS The Absolute Maximum Ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to device. Electrical specifications do not apply when operating beyond rated operating conditions. Positive pin current represents current flowing out of the pin. 1.0 Absolute Maximum Ratings PARAMETER MIN MAX UNIT NOTES Input voltage (+In to -In) Input voltage (+In to -In) Input voltage slew rate RSV1 to –IN EN to –IN RSV3 to –IN Output voltage (+Out to -Out) Output current 0 0 -25 -0.3 -0.3 -0.3 -0.5 0.0 600 385 25 5.3 5.3 5.3 57.0 10.2 Vpk Vpk V/µs VDC VDC VDC VDC A 1 ms max Continuous Common Mode and Differential Mode -55 -20 -40 -55 -40 -40 -65 125 100 100 100 125 125 125 °C °C °C °C °C °C °C TEMPERATURE Operating junction Operating temperature Storage temperature DIELECTRIC WITHSTAND Dielectric Withstand Input – Output Dielectric Withstand Input – Base Dielectric Withstand Output – Base 3000 1500 1500 VRMS VRMS VRMS VI BRICK® PFM® Rev 1.3 vicorpower.com Page 2 of 20 1/2013 800 735.6200 Do not connect to this pin 5 V tolerant 3.3 V logic Do not connect to this pin Worst case semiconductor C-Grade; baseplate T-Grade; baseplate M-Grade; baseplate C-Grade T-Grade M-Grade PF175B480C033FP-00 2.0 ELECTRICAL CHARACTERISTICS Specifications apply over all line and load conditions, 50 Hz and 60 Hz line frequencies, TC= 25°C, unless otherwise noted. Boldface specifications apply over the temperature range of the specified product grade. COUT is 6800 µF +/- 20% unless otherwise specified. 2.0 Electrical Characteristics ATTRIBUTE POWER INPUT SPECIFICATION Input voltage range, continuous operation Input voltage range, transient, non-operational (peak) Input voltage cell reconfiguration low-to-high threshold Input voltage cell reconfiguration high-to-low threshold Input voltage slew rate Input current (peak) Source line frequency range Power factor Input inductance, maximum SYMBOL CONDITIONS / NOTES VIN VIN 1 ms VIN-CR+ 145 VIN-CRdVIN /dt IINRP fline PF LIN 132 Common Mode and Differential Mode CIN NO LOAD SPECIFICATION Input power – no load, maximum Input power – disabled, maximum PNL PQ EN floating, see Figure 6 EN pulled low, see Figure 7 POWER OUTPUT SPECIFICATION Output voltage set point VOUT Output voltage range (transient) VOUT Output power POUT Efficiency h Output voltage ripple, switching frequency VOUT-PP-HF Output voltage ripple line frequency Output capacitance (external) VOUT-PP-LF Output turn-on delay Vin = 230 Vrms, 10% Load Over all operating steady state line conditions Non-faulting abnormal line and load transient conditions See Figure 1, SOA VIN = 230 V, full load, exclusive of input rectifier losses 85 V < VIN < 264 V, full load, exclusive of input rectifier losses 85 V < VIN < 264 V, 75% load, exclusive of input rectifier losses Over all operating steady-state line and load conditions, 20 MHz BW, measured at C3, Figure 29 Over all operating steady-state line and load conditions, 20 MHz BW COUT-EXT TON Start-up setpoint aquisition time Tss Cell reconfiguration response time TCR Voltage deviation (transient) %VOUT-TRANS Recovery time TTRANS Line regulation %VOUT-LINE Load regulation %VOUT-LOAD Output current (continuous) IOUT -25 VI BRICK® PFM® Rev 1.3 vicorpower.com Page 3 of 20 1/2013 800 735.6200 264 VRMS 600 V 148 VRMS VRMS 1 V/µs A Hz mH 1.5 µF 1.1 1.5 1.6 W W 47.5 49 50.5 V 46 51.5 55 V 55 V 330 W 0.9 30 92 93.5 % 91 % 92 % 100 300 mV 3.8 5 V 12000 µF 400 1000 ms 400 5.5 500 11 8 500 1 1 6.9 ms ms % ms % % A 250 0.5 0.5 Full load 10% to 100% load See Figure 1, SOA UNIT 25 12 63 6000 From VIN applied, EN floating From EN pin release, VIN applied Full load Full load MAX 135 47 Input capacitance, maximum VOUT-NL TYP 85 Input power >100 W Differential mode inductance, common mode inductance may be higher After bridge rectifier, between +IN and - IN Output voltage, no load MIN PF175B480C033FP-00 2.0 ELECTRICAL CHARACTERISTICS (CONT.) 2.0 Electrical Characteristics (Continued) ATTRIBUTE SYMBOL CONDITIONS / NOTES MIN TYP MAX UNIT 10.2 A 13.5 µC POWER OUTPUT SPECIFICATION (CONTINUED) Output current (transient) Output switching cycle charge QTOT Output inductance (parasitic) LOUT-PAR Output capacitance (internal) Output capacitance (internal ESR) COUT-INT RCOUT POWERTRAIN PROTECTIONS Input undervoltage turn-on Input undervoltage turn-off Input overvoltage turn-on Input overvoltage turn-off Output overvoltage threshold Upper start / restart temperature threshold (case) Overtemperature shutdown threshold (internal) Overtemperature shutdown threshold (case) Undertemperature shutdown threshold (case) Lower start / restart temperature threshold (case) Overcurrent blanking time Input overvoltage response time Input undervoltage response time Output overvoltage response time Short circuit response time Fault retry delay time Output power limit Frequency @ 1 MHz, simulated J-lead model Effective value at nominal output voltage VIN-UVLO+ VIN-UVLOVIN-OVLOVIN-OVLO+ VOUT-OVLO+ See Timing Diagram See Timing Diagram 65 265 Instantaneous, latched shutdown 55.3 83 283 59.0 VRMS VRMS VRMS VRMS V °C TCASE-OTP+ T, C Grades M Grade T, C Grades M Grade Based on line frequency TCASE-UTPTCASE-UTP+ TOC TPOVP TUVLO TSOVP TSC TOFF PPROT 400 Based on line frequency Powertrain on Powertrain on, operational state See Timing Diagram 240 3.00 180 2.00 120 1.00 60 0.00 0 Input Voltage (V) Current 220 240 260 Efficiency (%) 4.00 Output Power (W) 300 200 °C -61 -73 -52 -65 460 °C 39 120 60 10 °C 550 6 51 180 120 93.0 92.5 92.0 91.5 91.0 85 100 115 130 145 160 175 190 205 220 235 250 265 Input Voltage (VRMS) Power Figure 1 — DC output safe operating area ms µs ms µs µs s W Full Load Efficiency vs. Line Voltage 5.00 180 27 60 110 330 93.5 160 74 71 270 273 56.6 130 360 140 µF mΩ TJ-OTP+ 6.00 120 7 0.5 °C 94.0 100 nH 100 420 80 1 TCASE-OTP- DC Safe Operating Area 7.00 Output Current (A) 20 ms duration, average power ≤POUT, max IOUT-PK TCASE: 100°C 25°C Figure 2 — Full load efficiency vs. line voltage VI BRICK® PFM® Rev 1.3 vicorpower.com Page 4 of 20 1/2013 800 735.6200 -40°C PF175B480C033FP-00 3.0 SIGNAL CHARACTERISTICS Specifications apply over all line and load conditions, 50 Hz and 60 Hz line frequencies, TC= 25°C, unless otherwise noted. Boldface specifications apply over the temperature range of the specified product grade. COUT is 6800 µF +/- 20% unless otherwise specified. 3.0 Signal Characteristics • The EN pin enables and disables the PFM® converter; when held below 0.8 V the unit will be disabled. • The EN pin can reset the PFM converter after a latching OVP event. SIGNAL TYPE STATE Startup DIGITAL INPUT Standby ATTRIBUTE ENABLE : EN • The EN pin voltage is 3.3 V during normal operation. • The EN pin is referenced to the –IN pin of the converter. SYMBOL CONDITIONS / NOTES EN enable threshold EN disable time EN disable threshold VEN_EN tEN_DIS VEN_DIS From any point in line cycle EN resistance to disable REN_EXT Max allowable resistance to -IN required to disable the module MIN TYP MAX UNIT 2.31 9 16 0.99 V ms V 4.28 kΩ RESERVED : RSV1, RSV3 No connections are required to these pins. In noisy enviornments, it is beneficial to add a 0.1 µF capacitor between each reserved pin and -IN. VI BRICK® PFM® Rev 1.3 vicorpower.com Page 5 of 20 1/2013 800 735.6200 PF175B480C033FP-00 4.0 FUNCTIONAL BLOCK DIAGRAM +IN Adaptive Cell™ topology Primary & Secondary Powertrain Q1T Q3T CIN-T Top Cell Cell Configuration Controller Q2T Q4T S1 +OUT S3 VIN-B COUT-INT -OUT Q1B Q3B S2 CIN-B Bottom Cell Q2B Q4B -IN 3.3 V Primary-side Voltage Sense VIN-B RSV1 49.9 kΩ Modulator EN RSV3 Powertrain Enable -IN VEAO -IN -IN Micro controller Auto Ranger Control Fault Latch & Reset Logic Enable Microcontroller: Fault monitoring Output OVP Fault Monitoring Output and OCP/SCP PFC Input UVP & OVP Internal OTP / UTP PFC Control Error Amplifier -IN VEAO Output Voltage with Offset Figure 3 — Functional block diagram VI BRICK® PFM® Rev 1.3 vicorpower.com Page 6 of 20 1/2013 800 735.6200 -IN Reference Voltage with Ripple Twice the Supply Frequency PF175B480C033FP-00 5.0 HIGH LEVEL FUNCTIONAL STATE DIAGRAM Conditions that cause state transitions are shown along arrows. Sub-sequence activities are listed inside the state bubbles. Application of VIN VIN > VIN-UVLO+ EN = True and No Faults STARTUP SEQUENCE Line Frequency Acquisition tON Expiry Powertrain: Stopped RNG: Auto STANDBY EN = False or VIN Out of Range Powertrain: Stopped RNG: High OPERATIONAL VOUT Ramp Up (tss) Regulates VOUT EN = False or VIN Out of Range No Faults NON LATCHED FAULT tOFF delay Powertrain: Active RNG: Auto PFC: Auto Overtemp, Output Short, or Overload Powertrain: Stopped RNG: High Output OVP EN Falling Edge LATCHED FAULT Powertrain: Stopped RNG: High Figure 4 — State diagram VI BRICK® PFM® Rev 1.3 vicorpower.com Page 7 of 20 1/2013 800 735.6200 PF175B480C033FP-00 6.0 TIMING DIAGRAMS Module inputs are shown in blue; Module outputs are shown in brown; Timing diagram assumes resistive load, adjusted as shown in the diagram, except in the case of output OVP. 1 Input Power On & UV Turn-on 2 3 Full 10% Load Load Applied Applied 7 8 Input Input OV OV Turn-off Turn-on 6 Range Change LO to HI 5 4 EN EN Forced High Low VIN-OVLO+ 9 Range Change HI to LO 10 Load Dump 12 11 Load Input Power Off & UV Step Turn-off VIN-OVLOVIN-CR- VIN-CR+ VIN-UVLO+ Input VIN-RMS VIN-UVLO- ≈30VRMS EN VOUT-NL tON VOUT tEN-DIS tCR tCR tPOVP tON tON VOUT tSS tSS Output tUVLO tTRANS (2 places) ILOAD 13 Input Power ON & UV Turn-on 14 Output OC Fault 15 Output OC Recovery 16 Output OVP Fault 19 Recycle Input Power (Output OVP Recovery) 18 Output OVP Fault )) )) VIN-UVLO+ Input 17 Toggle EN (Output OVP Recovery) 20 Output SC Fault 21 Output SC Recovery 23 22 24 Line OT Fault Input Drop-Out Power & Recovery Off & UV Turn-off VIN-UVLO+ VIN-UVLO- VIN-RMS )) )) )) )) )) )) EN tOC VOUT tON tSS Output tOC VOUT-OVLO+ tOFF+tON tON tON tOC tOFF+tON tOFF+tON )) )) tSOVP tSC tOFF+tON ≥tOFF+tON ILOAD )) * )) * Figure 5 — Timing diagram - * Negative current is externally forced and shown for the purpose of OVP protection scenario. VI BRICK® PFM® Rev 1.3 vicorpower.com Page 8 of 20 1/2013 800 735.6200 PF175B480C033FP-00 7.0 APPLICATION CHARACTERISTICS The following figures present typical performance at TC = 25ºC, unless otherwise noted. See associated figures for general trend data. No Load Power Dissipation vs. Line, Module Enabled - Nominal VOUT No Load Power Dissipation vs. Line, Module Disabled, PC = Low 3.0 2.5 Power Dissipation (W) Power Dissipation (W) 3 2 1.5 1 0.5 0 85 100 115 130 145 160 175 190 205 220 235 250 265 Input Voltage (VRMS) TCASE: 100°C 25°C 2.5 2.0 1.5 1.0 0.5 0.0 85 100 115 130 145 160 175 190 205 220 235 250 265 Input Voltage (V) -40°C Figure 6 – Typical no load power dissipation vs. VIN , module enabled. Figure 7 – No load power dissipation trend vs. VIN , module disabled. Figure 8 – Typical switching frequency output voltage ripple waveform, TCASE = 30ºC, VIN = 230 V, IOUT = 6.9 A, no external ceramic capacitance. Figure 9 – Typical line frequency output voltage ripple waveform, TCASE = 30ºC, VIN = 230 V, IOUT = 6.9 A, COUT = 6,800 µF. Measured at C3, Fig 29. Figure 10 – Typical output voltage transient response, TCASE = 30ºC, VIN = 230 V, IOUT = 1.0 A to 6.7 A, COUT = 6,800 µF. Figure 11 – Typical startup waveform, application of VIN , RLOAD = 7.1 Ω, COUT = 6,800 µF. VI BRICK® PFM® Rev 1.3 vicorpower.com Page 9 of 20 1/2013 800 735.6200 PF175B480C033FP-00 7.0 APPLICATION CHARACTERISTICS (CONTINUED) The following figures present typical performance at TC = 25ºC, unless otherwise noted. See associated figures for general trend data. Figure 12 – Typical startup waveform, EN pin release, VIN = 240 V, RLOAD = 7.1 Ω, COUT = 6,800 µF. Figure 13 – Line drop out, 50 Hz, 0° phase, VIN = 230 V, ILOAD = 6.8A, COUT = 6,800 µF. Figure 14 – Line drop out, 50 Hz, 90° phase, VIN = 230 V, ILOAD = 6.8A, COUT = 6,800 µF. Figure 15 – Typical conducted emissions, full load, 3x0.47uF X caps +IN to -IN, no CM filter. COUT = 6,800 µF, -Out grounded. Input Current Harmonics vs. Input Voltage 800 Current [mA] 700 600 500 400 300 200 100 0 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 230 V, 50 Hz 1/3x EN61000-3-2, Class A EN61000-3-2, Class D Figure 16 – Typical line current waveform, VIN = 120 V, PLOAD = 330 W. Figure 17 – Typical input current harmonics, full load vs. VIN. VI BRICK® PFM® Rev 1.3 vicorpower.com Page 10 of 20 1/2013 800 735.6200 PF175B480C033FP-00 7.0 APPLICATION CHARACTERISTICS (CONTINUED) The following figures present typical performance at TC = 25ºC, unless otherwise noted. See associated figures for general trend data. 0.96 Efficiency (%) Power Factor 0.94 0.92 0.90 0.88 0.86 0.84 0.82 0.80 96 40 94 36 92 32 90 28 88 24 86 20 84 16 82 12 80 8 78 4 76 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 0 0.5 1 100 V, 60 Hz VIN: 120 V, 60 Hz 240 V, 50 Hz 3.5 4 4.5 5 5.5 6 6.5 7 0 100 V Power Diss 240 V Eff 115 V Eff 100 V Eff 115 V Power Diss 240 V Power Diss Figure 19 – VIN to VOUT efficiency and power dissipation vs. VIN and IOUT, TCASE = -40ºC. Figure 18 – Typical power factor vs. VIN and IOUT. Efficiency & Power Dissipation TCASE = 25°C Efficiency & Power Dissipation TCASE = 100°C 40 94 36 94 36 92 32 92 32 90 28 90 28 88 24 88 24 86 20 86 20 84 16 84 16 82 12 82 12 80 8 80 8 78 4 78 4 76 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 Efficiency (%) 96 Power Dissipation (W) 40 96 Efficiency (%) 2.5 3 Load Current (A) Load Current (A) VIN: 1.5 2 76 0 0.5 1 1.5 2 Load Current (A) VIN: 100 V Eff 100 V Power Diss 115 V Power Diss 3.5 4 4.5 5 5.5 6 6.5 7 0 120 100 80 60 40 20 3.0 100 115 130 145 160 175 190 205 220 235 250 265 240 V Power Diss Effective internal input (CIN_INT) capacitance vs. applied voltage 2.5 2.0 1.5 1.0 0.5 0.0 0 240 V Eff 115 V Eff 115 V Power Diss Figure 21 – VIN to VOUT efficiency and power dissipation vs. VIN and IOUT , TCASE = 100ºC. Effective capacitance (µF) 140 100 V Eff 100 V Power Diss 240 V Power Diss Powertrain Equivalent Input Resistance (rEQ_IN) vs. Input Voltage Input Resistance (Ω) 2.5 3 Load Current (A) VIN: 240 V Eff 115 V Eff Figure 20 – VIN to VOUT efficiency and power dissipation vs. VIN and IOUT , TCASE = 25ºC. 85 Power Dissipation (W) Efficiency & Power Dissipation TCASE = -40°C Power Factor vs. Load and VIN TCASE = 25°C 85 100 115 130 145 160 175 190 205 220 235 250 265 Input Voltage (V) Input Voltage ( VRMS ) Parallel Mode (Low) Series Mode (High) Figure 22 – Dynamic input resistance vs. VIN , IOUT = 6.9 A. Figure 23 – Effective input capacitance vs. VIN. VI BRICK® PFM® Rev 1.3 vicorpower.com Page 11 of 20 1/2013 800 735.6200 Power Dissipation (W) 0.98 PF175B480C033FP-00 8.0 GENERAL CHARACTERISTICS Specifications apply over all line and load conditions, TC = 25°C, unless otherwise noted. 8.0 General Characteristics ATTRIBUTE MECHANICAL Length Width Height Volume Weight Pin material Underplate SYMBOL CONDITIONS / NOTES MIN L W H Vol W MAX 48.6 / [1.91] 48.7 / [1.92] 9.50 / [0.37] 22.5 / [1.37] 57.5 / [2.03] C10200 copper, full hard Nickel Pure matte tin, whisker resistant chemistry Pin finish TYP UNIT mm / [in] mm / [in] mm / [in] cm3 / [in3] g / [oz] 100 150 200 300 -20 -40 -55 100 µin THERMAL Operating baseplate (case) temperature Any operating condition TC Thermal resistance, baseplate to sink, flat greased surface Thermal resistance, baseplate to sink, thermal pad (36964) Thermal capacity Thermal design C Grade T Grade M Grade °C 0.22 °C / W 0.19 °C / W 44.5 Ws / °C See Section 10.9 ASSEMBLY ESDHBM ESD rating ESDMM ESDCDM Human Body Model, “JEDEC JESD 22-A114C.01” Machine Model, “JEDEC JESD 22-A115B” Charged Device Model, “JEDEC JESD 22-C101D” 1000 N/A V 400 SOLDERING Soldering Methods and Procedure for Vicor Power Modules » See application note SAFETY & RELIABILITY Telecordia Issue 2 Method I Case 1; Ground Benign, Controlled MIL-HDBK-217 Plus Parts Count - 25°C ground Benign, Stationary cTUVus, UL /cUL, EN, IEC 60950-1 CE, Low Voltage Directive; 2006/95/EC MTBF Agency approvals / standards 2.51 MHrs 4.93 MHrs CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable EMI/EMC COMPLIANCE EN61000-3-2: 2009, Harmonic Current Emisions – Class A Harmonics VI BRICK® PFM® Rev 1.3 vicorpower.com Page 12 of 20 1/2013 800 735.6200 PF175B480C033FP-00 9.0 PRODUCT OUTLINE DRAWING AND RECOMMENDED PCB FOOTPRINT 9.1 Module Outline Figure 24 — Product outline drawing; Product outline drawings are available in .pdf and .dxf formats. 3D mechanical models are available in .pdf and .step formats. See http://www.vicorpower.com/cms/home/technical_resources/Mechanical_Drawings/Modules for more details. VI BRICK® PFM® Rev 1.3 vicorpower.com Page 13 of 20 1/2013 800 735.6200 PF175B480C033FP-00 9.0 PRODUCT OUTLINE DRAWING AND RECOMMENDED PCB FOOTPRINT (CONT.) 9.2 PCB Mounting Specifications Figure 25 — Recommended PCB pattern; Product outline drawings are available in .pdf and .dxf formats. 3D mechanical models are available in .pdf and .step formats. See http://www.vicorpower.com/cms/home/technical_resources/Mechanical_Drawings/Modules for more details. VI BRICK® PFM® Rev 1.3 vicorpower.com Page 14 of 20 1/2013 800 735.6200 PF175B480C033FP-00 10.0 PRODUCT DETAILS AND DESIGN GUIDELINES 10.1 Building Blocks and System Designs Full Wave Rectifier EMI/TVS Filter Approximately 48 Vdc +IN +OUT DC/DC Converter -OUT -IN 85 V – 264 Vac LOAD PFM® +OUT Converter -OUT (Optional) Figure 26 – 300 W Universal AC to DC Supply The VI BRICK® PFM® Isolated AC-DC Converter with PFC is a high efficiency AC-to-DC converter, operating from a rectified universal AC input to generate an isolated SELV 48 VDC output bus with power factor correction. It is a component of an AC to DC power supply system such as the one shown in Figure 26 above. The input to the PFM converter is a rectified, sinusoidal AC source with a power factor maintained by the converter with harmonics conforming to IEC 61000-3-2. Upstream filtering enables compliance with the standards relevant to the application (Surge, EMI, etc.). The PFM converter uses secondary-side energy storage (at the SELV 48 V bus) and optional PRM™ regulators to maintain output hold up through line dropouts and brownouts. Downstream regulators also provide tighter voltage regulation, if required. The PF175B480C033FP-00 is designed for standalone operation; however, it may be part of a system that is paralleled by downstream DC/DC converters. Please contact Vicor Sales or refer to our website, www.vicorpower.com, for higher power applications. 10.2 Power Factor Correction The converter provides power factor correction over worldwide AC mains. Power factor correction is disabled in low power mode to improve efficiency. It is disabled in transient mode to allow quicker recovery upon input transients. Load transients that approach the line frequency should be filtered or avoided as these may reduce PFC. 10.3 Small Signal Characteristics Figure 28 shows the small signal model of the converter. Because of its internal feedback loop and PFC modulation, within its regulation bandwidth (dynamic response shown in figure 10) the converter’s output can be effectively modeled with two sources in series and a passive filter: • A constant, 49 Vdc voltage generator. • A dependent voltage source, VRIPPLE, which outputs a variable amplitude sinewave at a frequency twice the input line. • A first order filter, ROUT COUT_INT. + + VIN 49V CIN_INT rEQ_IN + Vripple - - ROUT COUT_INT + RCOUT VOUT RLOAD COUT_EXT - Figure 28 – PF175B480C033FP-00 AC small signal model 10.1.1 Traditional PFC Topology Full Wave Rectifier 10.1.2 Adaptive Cell™ Topology With its single stage Adaptive Cell™ topology, the PFM converter enables consistently high efficiency conversion from worldwide AC mains to a 48 V bus and efficient secondaryside power distribution. EMI/TVS Filter Isolated DC / DC 48 V Bus Converter Figure 27 – Traditional PFC AC to DC supply To cope with input voltages across worldwide AC mains (85-264 Vac), traditional AC-DC power supplies (Figure 27) use 2 power conversion stages: 1) a PFC boost stage to step up from a rectified input as low as 85 Vac to ~380 Vdc; and 2) a DC-DC down converter from 380 Vdc to a 48 V bus. The efficiency of the boost stage and of traditional power supplies is significantly compromised operating from worldwide AC lines as low as 85 Vac. Output voltage stability is guaranteed as long as hold up capacitance COUT and load fall within the specified ranges. Input line stability needs to be verified at system design level. Magnitude of the dynamic input impedance rEQ_IN is provided in Figure 22. The input line impedance can be modeled as a series RLINELLINE circuit. Ceramic decoupling capacitors will not significantly damp the network because of their low ESR; therefore in order to guarantee stability the following conditions must be verified: RLINE > LLINE (CIN_INT + CIN_EXT ) • rEQ_IN RLINE << rEQ_IN (1) (2) It is critical that the line source resistance be at least an octave lower than the converter’s dynamic input impedance, (2). However, RLINE cannot be made arbitrarily low otherwise equation (1) is violated and the system will show instability, due to under-damped RLC input network. VI BRICK® PFM® Rev 1.3 vicorpower.com Page 15 of 20 1/2013 800 735.6200 PF175B480C033FP-00 10.0 PRODUCT DETAILS AND DESIGN GUIDELINES (CONT.) 10.4 Input Fuse Selection VI BRICK® products are not internally fused in order to provide flexibility in configuring power systems. Input line fusing is recommended at system level, in order to provide thermal protection in case of catastrophic failure. The fuse shall be selected by closely matching system requirements with the following characteristics: • Current rating (usually greater than the VI BRICK® PFM® converter’s maximum current) • Maximum voltage rating (usually greater than the maximum possible input voltage) • Ambient temperature • Breaking capacity per application requirements 2 • Nominal melting I t • Recommended fuse: ≤ 5 A, 216 Series Littelfuse 10.5 Fault Handling 10.5.1 Input Undervoltage (UV) Fault Protection The converter’s input voltage (proportional to VIN-B as shown in Figure 3) is monitored by the micro-controller to detect an input under voltage condition. When the input voltage is less than the VIN-UVLO-, a fault is detected, the fault latch and reset logic disables the modulator, the modulator stops powertrain switching, and the output voltage of the unit falls. After a time tUVLO, the unit shuts down. Faults lasting less than tUVLO may not be detected. Such a fault does not go through an autorestart cycle. Once the input voltage rises above VIN-UVLO+, the unit recovers from the input UV fault, the powertrain resumes normal switching after a time tON and the output voltage of the unit reaches the set point voltage within a time tSS. 10.5.2 Input Overvoltage (OV) Fault Protection The input voltage (proportional to VIN-B, as shown in Figure 3) is monitored by the micro-controller to detect an input over voltage condition. When the input voltage is more than the VIN-OVLO-, a fault is detected, the reset logic disables the modulator, the modulator stops powertrain switching, and the output voltage of the converter falls. After a time tPOVP, the converter shuts down. Faults lasting less than tPOVP may not be detected. Such a fault does not go through an auto-restart cycle. Once the input voltage falls below VIN-OVLO-, the unit recovers from the input OV fault, the powertrain resumes normal switching after a time tON and the output voltage reaches the set point voltage within a time tSS. modulator stops powertrain switching, and the output voltage of the converter falls after a time tOC. As long as the fault persists, the converter goes through an auto-restart cycle with off time equal to tOFF + tON and on time equal to tOC. Faults shorter than a time tOC may not be detected. Once the fault is cleared, the converter follows its normal start up sequence after a time tOFF. 10.5.4 Short Circuit (SC) Fault Protection The microcontroller determines a short circuit on the output of the unit by measuring its primary sensed output voltage and VEAO (shown in Figure 3). Most commonly, a drop in the primary-sensed output voltage triggers a short circuit event. The converter responds to a short circuit event within a time tSC. The converter then goes through an auto restart cycle, with an off time equal to tOFF + tON and an on time equal to tSC, for as long as the short circuit fault condition persists. Once the fault is cleared, the unit follows its normal start up sequence after a time tOFF. Faults shorter than a time tSC may not be detected. 10.5.5 Temperature Fault Protection The microcontroller monitors the temperature within the converter. If this temperature exceeds TJ-OTP+, an over temperature fault is detected, the reset logic block disables the modulator, the modulator stops the powertrain switching and the output voltage of the PFM converter falls. Once the case temperature falls below TCASE-OTP-, after a time greater than or equal to tOFF, the converter recovers and undergoes a normal restart. Faults shorter than a time tOTP may not be detected. If the temperature falls below TCASE-UTP-, an under temperature fault is detected, the reset logic disables the modulator, the modulator stops powertrain switching and the output voltage of the unit falls. Once the case temperature rises above TCASEUTP, after a time greater than or equal to tOFF, the unit recovers and undergoes a normal restart. 10.5.6 Output Overvoltage Protection (OVP) The microcontroller monitors the primary sensed output voltage (as shown in Figure 3) to detect output OVP. If the primary sensed output voltage exceeds VOUT-OVLO+, a fault is latched, the logic disables the modulator, the modulator stops powertrain switching, and the output voltage of the converter falls after a time tSOVP.Faults shorter than a time tSOVP may not be detected. This type of fault is a latched fault and requires that 1) the EN pin be toggled or 2) the input power be recycled in to recover from the fault. 10.5.3 Overcurrent (OC) Fault Protection The unit’s output current, determined by VEAO, VIN-B and the primary-side sensed output voltage, (as shown in Figure 3) is monitored by the microcontroller to detect an output OC condition. If the output current exceeds its current limit, a fault is detected, the reset logic disables the modulator, the VI BRICK® PFM® Rev 1.3 vicorpower.com Page 16 of 20 1/2013 800 735.6200 PF175B480C033FP-00 10.0 PRODUCT DETAILS AND DESIGN GUIDELINES (CONT.) 10.6 Hold up Capacitance The VI BRICK® PFM® converter uses secondary-side energy storage (at the SELV 48 V bus) and optional PRM® regulators to maintain output hold up through line dropouts and brownouts. The PFM converter’s output bulk capacitance can be sized to achieve the required hold up functionality. Hold up time depends upon the output power drawn from the PFM converter based AC-to-DC front-end and the input voltage range of downstream DC-to-DC converters. The following formula can be used to calculate hold up capacitance for a system comprised of PFM converter based AC front-end and a PRM regulator: 2 2 C = 2*POUT*(0.005+td) / (V2 – V1 ) (3) where: C C3 C4 C5 F1 L1 L2 R1 R2 3.3µF (TDK C4532X7R1H335MT) 6800uF 63V (Panasonic UVR1J682MRD) 100uF 63V (Nichicon UVY1J101MPD) 5A, 216 Series Littlefuse 15µH (TDK MLF2012C150KT, Vicor PN 37052-601) 600µH (Vicor 37052-601) 6.8Ω 2.2Ω 10.7.1 Line Frequency Filtering Output line frequency ripple depends upon output bulk capacitance. Output bulk capacitor values should be calculated based on line frequency voltage ripple. High-grade electrolytic capacitors with adequate ripple current ratings, low ESR and a minimum voltage rating of 63 V are recommended. PFM converter’s output bulk capacitance in farads lPK td Hold up time in seconds POUT PFM converter’s output power in watts V2 Output voltage of PFMTM converter in volts V1 PRM regulator undervoltage turn off (volts) lPK/2 loutDC –OR– lfLINE POUT / IOUT-PK, whichever is greater. 10.7 Output Filtering The converter requires an output bulk capacitor in the range of 6000 µF to 12000 µF for proper operation of the PFC front-end. The output voltage has the following two components of voltage ripple: 1) Line frequency voltage ripple: 2*fLINE Hz component 2) Switching frequency voltage ripple: 1 MHz converter switching frequency component C2 +IN +OUT PFM® Converter -OUT -IN R2 +OUT +OUT C5 L2 CM C3 C4 -OUT -OUT R1 C1 L1 Figure 30 – Output current waveform Based on the output current waveform, as seen in Figure 30, the following formula can be used to determine peak-to-peak line frequency output voltage ripple: VPP1 ~ = 0.2 * POUT / (VOUT * fLINE * C) where: VPP1 Output voltage ripple Peak-to-peak line frequency POUT Average output power VOUT Output voltage set point, nominally 48 V fLINE Frequency of line voltage C Output bulk capacitance IDC Maximum average output current IPK Peak-to-peak line frequency output current ripple Figure 29 – Typical filter schematic (positive output) Where, in the schematic: C1 2.2nF (Murata GA355DR7GF222KW01L) C2 4.7nF (Murata GA355DR7GF472KW01L) VI BRICK® PFM® Rev 1.3 vicorpower.com Page 17 of 20 1/2013 800 735.6200 (4) PF175B480C033FP-00 10.0 PRODUCT DETAILS AND DESIGN GUIDELINES (CONT.) In certain applications, the choice of bulk capacitance may be determined by hold up requirements and low frequency output voltage filtering requirements. Such applications may use the greater capacitance value determined from these requirements. The ripple current rating for the bulk capacitors can be determined from the following equation: ~ (5) Iripple = 0.8 * POUT / VOUT 10.7.2 Switching Frequency Filtering Output switching frequency voltage ripple is the function of the output bypass ceramic capacitor. Output bypass ceramic capacitor values should be calculated based on switching frequency voltage ripple. Normally bypass capacitors with low ESR are used with a sufficient voltage rating. Output bypass ceramic capacitor value for allowable peak-topeak switching frequency voltage ripple can be determined by: (6) C3 = QTOT / VOUT-PP-HF – COUT-INT where: VOUT-PP-HF Allowable peak to peak output switching frequency voltage ripple in volts QTOT The total output charge per switching cycle at full load, maximum 13.5 µC COUT_INT The module internal effective capacitance C3 Required output bypass ceramic capacitor 10.8 EMI Filtering and Transient Voltage Suppression 10.8.1 EMI Filtering The PFM® Isolated AC-DC Converter with PFC is designed such that it will comply with EN 55022 Class B with moderate upstream filtering and output to earth Y-capacitance. If one of the outputs is connected to earth ground, an additional small output common mode choke is also required. In such a situation, the output switching ripple shown in figure 8 should be expected at the output of the filter. In cases where other means are used to control radiated emissions, and more ripple can be tolerated, the output filter can be simplified by removal of the common mode inductor, and C5, which is used to reduce the Q of the LC resonant tank. The emissions spectrum without input filtering is shown in Figure 15 in Section 7.0. 10.8.2 Transient Voltage Suppression In order to comply with line transient specifications such as those for surge (i.e. EN 61000-4-5) and fast transient (i.e. EN 61000-4-4 fast transient / “burst”), an upstream transient voltage suppression circuit is needed. Consult factory for more information. 10.9 Thermal Design Thermal management of internally dissipated heat should maximize heat removed from the baseplate surface, since the baseplate represents the lowest aggregate thermal impedance to internal components. The baseplate temperature should be maintained below 100°C. Cooling of the system PCB should be provided to keep the leads below 100°C, and to control maximum PCB temperatures in the area of the converter. 10.10 Powering a Constant Power Load When the output voltage of the PFM converter is applied to the input of the PRM® regulator, the regulator turns on and acts as a constant-power load. When the PFM converter’s output voltage reaches the input undervoltage turn on of the regulator, the regulator will attempt to start. However, the current demand of the PRM regulator at the undervoltage turn on point and the hold up capacitor charging current may force the PFM converter into current limit. In this case, the unit may shut down and restart repeatedly. In order to prevent this multiple restart scenario, it is necessary to delay enabling a constant-power load when powered up by the PFM converter based upstream AC to 48 V frontend until after the output set point of the PFM converter is reached. This can be achieved by 1) keeping the downstream constant-power load off during power up sequence and 2) turning the downstream constant-power load on after the output voltage of the converter reaches 48 V steady state. After the initial startup, the output of the PFM converter can be allowed to fall to 30 V during a line dropout at full load. In this case, the circuit should not disable the PRM regulator if the input voltage falls after it is turned on; therefore, some form of hysteresis or latching is needed on the enable signal for the constant power load. The output capacitance of the PFM converter should also be sized appropriately for a constant power load to prevent collapse of the output voltage of the PFM converter during line dropout (see Section 10.6, Hold up Capacitance). A constant-power load can be turned off after completion of the required hold up time during the powerdown sequence or can be allowed to turn off when it reaches its own undervoltage shutdown point. The timing diagram in Figure 31 shows the output voltage of the PFM converter and the PC pin voltage and output voltage of the PRM regulator for the power up and power down sequence. It is recommended to keep the time delay approximately 10 to 20 ms. VI BRICK® PFM® Rev 1.3 vicorpower.com Page 18 of 20 1/2013 800 735.6200 PF175B480C033FP-00 10.0 PRODUCT DETAILS AND DESIGN GUIDELINES (CONT.) PFM™ Converter VOUT 49V – 3% PRM UV Turn on PRM™ Regulator tDELAY PC PRM™ Regulator VOUT tHOLD-UP Figure 31 – PRM® Enable Hold off Waveforms Special care should be taken when enabling the constantpower load near the auto-ranger threshold, especially with an inductive source upstream of the PFM® converter. A load current spike may cause a large input voltage transient, resulting in a range change which could temporarily reduce the available power (see Section 10.11, Adaptive Cell™ Topology). 10.11 Adaptive Cell™ Topology The Adaptive Cell topology utilizes magnetically coupled “top” and “bottom” primary cells that are adaptively configured in series or parallel by a configuration controller comprised of an array of switches. A microcontroller monitors operating conditions and defines the configuration of the top and bottom cells through a range control signal. A comparator inside the microcontroller monitors the line voltage and compares it to an internal voltage reference. If the input voltage of the PFM converter crosses above the positive going cell reconfiguration threshold voltage, the output of the comparator transitions, causing switches S1 and S2 to open and switch S3 to close (see Figure 3). With the top cell and bottom cell configured in series, the unit operates in “high” range and input capacitances CIN-T and CIN-B are in series. If the peak of input voltage of the unit falls below the negative-going range threshold voltage for two line cycles, the cell configuration controller opens switch S3 and closes switches S1 and S2. With the top cell and bottom cells configured in parallel, the unit operates in “low” range and input capacitances CIN-T and CIN-B are in parallel. Power processing is held off while transitioning between ranges and the output voltage of the unit may temporarily droop. External output hold up capacitance should be sized to support power delivery to the load during cell reconfiguration. The minimum specified external output capacitance of 6000 µF is sufficient to provide adequate ride-through during cell reconfiguration for typical applications. VI BRICK® PFM® Rev 1.3 vicorpower.com Page 19 of 20 1/2013 800 735.6200 PF175B480C033FP-00 Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power systems. Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves the right to make changes to any products, specifications, and product descriptions at any time without notice. Information published by Vicor has been checked and is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies. Testing and other quality controls are used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. Specifications are subject to change without notice. Vicor’s Standard Terms and Conditions All sales are subject to Vicor’s Standard Terms and Conditions of Sale, which are available on Vicor’s webpage or upon request. Product Warranty In Vicor’s standard terms and conditions of sale, Vicor warrants that its products are free from non-conformity to its Standard Specifications (the “Express Limited Warranty”). This warranty is extended only to the original Buyer for the period expiring two (2) years after the date of shipment and is not transferable. UNLESS OTHERWISE EXPRESSLY STATED IN A WRITTEN SALES AGREEMENT SIGNED BY A DULY AUTHORIZED VICOR SIGNATORY, VICOR DISCLAIMS ALL REPRESENTATIONS, LIABILITIES, AND WARRANTIES OF ANY KIND (WHETHER ARISING BY IMPLICATION OR BY OPERATION OF LAW) WITH RESPECT TO THE PRODUCTS, INCLUDING, WITHOUT LIMITATION, ANY WARRANTIES OR REPRESENTATIONS AS TO MERCHANTABILITY, FITNESS FOR PARTICULAR PURPOSE, INFRINGEMENT OF ANY PATENT, COPYRIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT, OR ANY OTHER MATTER. This warranty does not extend to products subjected to misuse, accident, or improper application, maintenance, or storage. Vicor shall not be liable for collateral or consequential damage. Vicor disclaims any and all liability arising out of the application or use of any product or circuit and assumes no liability for applications assistance or buyer product design. Buyers are responsible for their products and applications using Vicor products and components. Prior to using or distributing any products that include Vicor components, buyers should provide adequate design, testing and operating safeguards. Vicor will repair or replace defective products in accordance with its own best judgment. For service under this warranty, the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the product was defective within the terms of this warranty. Life Support Policy VICOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF VICOR CORPORATION. As used herein, life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. Per Vicor Terms and Conditions of Sale, the user of Vicor products and components in life support applications assumes all risks of such use and indemnifies Vicor against all liability and damages. Intellectual Property Notice Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the products described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Interested parties should contact Vicor's Intellectual Property Department. The products described on this data sheet are protected by the following U.S. Patents Numbers: 5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917; 7,166,898; 7,187,263; 7,361,844; D496,906; D505,114; D506,438; D509,472; and for use under 6,975,098 and 6,984,965. Vicor Corporation 25 Frontage Road Andover, MA, USA 01810 Tel: 800-735-6200 Fax: 978-475-6715 email Customer Service: [email protected] Technical Support: [email protected] VI BRICK® PFM® Rev 1.3 vicorpower.com Page 20 of 20 1/2013 800 735.6200