Data Sheet

VTM™ Current Multiplier
VTM48Ex160y015A00
S
C
NRTL
US
High Efficiency, Sine Amplitude Converter™
FEATURES
• 48 Vdc to 16 Vdc 15 A current multiplier
- Operating from standard 48 V or 24 V PRM™ Regulators
• High efficiency (>95%) reduces system power
consumption
• High density (51 A/in3)
• “Full Chip” VI Chip® package enables surface mount,
low impedance interconnect to system board
• Contains built-in protection features against:
-
Overvoltage Lockout
Overcurrent
Short Circuit
Overtemperature
• Provides enable / disable control,
internal temperature monitoring
• ZVS / ZCS resonant Sine Amplitude Converter topology
• Less than 50ºC temperature rise at full load
in typical applications
TYPICAL APPLICATIONS
• High End Computing Systems
• Automated Test Equipment
• High Density Power Supplies
• Communications Systems
DESCRIPTION
The VI Chip® current multiplier is a high efficiency (>95%)
Sine Amplitude Converter™ (SAC) operating from a
26 to 55 Vdc primary bus to deliver an isolated output. The
Sine Amplitude Converter offers a low AC impedance beyond
the bandwidth of most downstream regulators; therefore
capacitance normally at the load can be located at the input to
the Sine Amplitude Converter. Since the K factor of the
VTM48EF160T015A00 is 1/3, the capacitance value can be
reduced by a factor of 9, resulting in savings of board area,
materials and total system cost.
The VTM48EF160T015A00 is provided in a VI Chip package
compatible with standard pick-and-place and surface mount
assembly processes. The co-molded VI Chip package provides
enhanced thermal management due to a large thermal
interface area and superior thermal conductivity. The high
conversion efficiency of the VTM48EF160T015A00 increases
overall system efficiency and lowers operating costs compared
to conventional approaches.
The VTM48EF160T015A00 enables the utilization of Factorized
Power Architecture™ which provides efficiency and size
benefits by lowering conversion and distribution losses and
promoting high density point of load conversion.
VIN = 26 to 55 V
IOUT = 15 A (NOM)
VOUT = 8.7 to 18.3 V (NO LOAD)
K = 1/3
PART NUMBERING
PART NUMBER
PACKAGE STYLE
VTM48 E x 160 y 015A00 F = J-Lead
T = Through hole
T = -40 to 125°C
M = -55 to 125°C
For Storage and Operating Temperatures see Section 6.0 General Characteristics
TYPICAL APPLICATION
Regulator
Voltage Transformer
VC
SG
OS
CD
PR
PC
TM
IL
PRODUCT GRADE
TM
VC
PC
™
VTM
Transformer
™
PRM
Regulator
+In
+Out
-In
-Out
+In
+Out
-In
-Out
VIN
Factorized Power ArchitectureTM
VTM™ Current Multiplier
Rev 1.3
vicorpower.com
Page 1 of 18
09/2015
800 927.9474
L
O
A
D
(See Application Note AN:024)
VTM48Ex160y015A00
1.0 ABSOLUTE MAXIMUM VOLTAGE RATINGS
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent
damage to the device.
MIN
MAX
UNIT
MIN
MAX
UNIT
+ IN to - IN . . . . . . . . . . . . . . . . . . . . . . .
-1.0
60
VDC
VC to - IN . . . . . . . . . . . . . . . . . . . . . . . .
PC to - IN . . . . . . . . . . . . . . . . . . . . . . . .
-0.3
20
VDC
+ IN / - IN to + OUT / - OUT (hipot) . . .
TM to -IN . . . . . . . . . . . . . . . . . . . . . . . .
-0.3
7
VDC
+ OUT to - OUT.......................................
-0.3
-0.5
20
VDC
2250
VDC
30
VDC
2.0 ELECTRICAL CHARACTERISTICS
Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature
range of -40°C < TJ < 125 °C (T-Grade); All other specifications are at TJ = 25ºC unless otherwise noted.
ATTRIBUTE
Input voltage range
VIN slew rate
SYMBOL
VIN
CONDITIONS / NOTES
No external VC applied
VC applied
dVIN /dt
No Load power dissipation
PNL
Inrush current peak
IINRP
IIN_DC
K
VOUT
K = VOUT / VIN, IOUT = 0 A
VOUT = VIN • K - IOUT • ROUT, Section 11
DC input current
Transfer ratio
Output voltage
Output current (average)
Output current (peak)
Output power (average)
Efficiency (ambient)
Efficiency (hot)
Efficiency (over load range)
Output resistance (cold)
Output resistance (ambient)
Output resistance (hot)
Switching frequency
Output ripple frequency
VIN_UV
IOUT_AVG
IOUT_PK
POUT_AVG
hAMB
hHOT
h20%
ROUT_COLD
ROUT_AMB
ROUT_HOT
FSW
FSW_RP
Output voltage ripple
VOUT_PP
Output inductance (parasitic)
LOUT_PAR
Output capacitance (internal)
COUT_INT
Output capacitance (external)
COUT_EXT
PROTECTION
Overvoltage lockout
Overvoltage lockout
response time constant
Output overcurrent trip
Short circuit protection trip current
Output overcurrent
response time constant
Short circuit protection response time
Thermal shutdown setpoint
Reverse inrush current protection
TYP
26
0
Module latched shutdown,
No external VC applied, IOUT = 15A
VIN = 48 V
VIN = 26 V to 55 V
VIN = 48 V, TC = 25 ºC
VIN = 26 V to 55 V, TC = 2 ºC
VC enable, VIN = 48 V, COUT = 800 µF,
RLOAD = 1040 mΩ
VIN UV turn off
MIN
TPEAK < 10 ms, IOUT_AVG ≤ 15 A
IOUT_AVG ≤ 15 A
VIN = 48 V, IOUT = 15 A
VIN = 26 V to 55 V, IOUT = 15 A
VIN = 48 V, IOUT = 7.5 A
VIN = 48 V, TC = 100°C, IOUT = 15 A
3 A < IOUT < 15 A
TC = -40°C, IOUT = 15 A
TC = 25°C, IOUT = 15 A
TC = 100°C, IOUT = 15 A
19
3
4.3
13
Module latched shutdown
TOVLO
Effective internal RC filter
IOCP
ISCP
Effective internal RC filter (Integrative).
TSCP
From detection to cessation
of switching (Instantaneous)
TJ_OTP
VTM™ Current Multiplier
Rev 1.3
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Page 2 of 18
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800 927.9474
V
8.5
10
5.6
7
W
20
A
5.5
A
V/V
V
A
A
W
55.1
VDC
95.3
%
94.8
95.0
22.1
26.6
30.2
1.65
3.30
31.0
33.0
35.0
1.74
3.48
%
%
mΩ
mΩ
mΩ
MHz
MHz
250
350
mV
pH
4.1
58.9
µF
800
µF
60.0
V
7.8
125
Reverse Inrush protection disabled for this product.
26
600
16
35
TOCP
V/µs
15
18.8
240
94.5
90.0
93.8
94.4
82.0
11.0
19
24.0
1.56
3.12
UNIT
55
55
1
1/3
COUT = 0 F, IOUT = 15 A, VIN = 48 V,
20 MHz BW, Section 12
Frequency up to 30 MHz,
Simulated J-lead model
Effective Value at 16 VOUT
VTM Standalone Operation.
VIN pre-applied, VC enable
VIN_OVLO+
MAX
31
µs
44
A
A
7.7
ms
1
µs
130
135
ºC
VTM48Ex160y015A00
3.0 SIGNAL CHARACTERISTICS
Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the
temperaturerange of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25°C unless otherwise noted.
• Used to wake up powertrain circuit.
• A minimum of 11.5 V must be applied indefinitely for VIN < 26 V
to ensure normal operation.
• VC slew rate must be within range for a succesful start.
SIGNAL TYPE
STATE
ATTRIBUTE
External VC voltage
VC current draw
VTM CONTROL : VC
• PRM™ VC can be used as valid wake-up signal source.
• Internal Resistance used in “Adaptive Loop” compensation
• VC voltage may be continuously applied
SYMBOL
VVC_EXT
IVC
Steady
ANALOG
INPUT
VC internal diode rating
VC internal resistor
VC internal resistor
temperature coefficient
VC start up pulse
VC slew rate
VC inrush current
CONDITIONS / NOTES
Required for start up, and operation
below 26 V. See Section 7.
VC = 11.5 V, VIN = 0 V
VC = 11.5 V, VIN > 26 V
VC = 16.5 V, VIN > 26 V
Fault mode. VC > 11.5 V
MIN
TYP
11.5
16.5
115
0
0
60
100
2.0
DVC_INT
RVC-INT
MAX UNIT
TVC_COEFF
150
mA
V
kΩ
900 ppm/°C
Tpeak <18 ms
20
Required for proper start up;
0.02
0.25
VC = 16.5 V, dVC/dt = 0.25 V/µs
1
V
pre-applied,
PC
floating,
IN
VC to VOUT turn-on delay
TON
500
VC enable, CPC = 0 µF
Transitional
VC = 11.5 V to PC high, VIN = 0 V,
VC to PC delay
Tvc_pc
75
125
dVC/dt = 0.25 V/µs
VC = 0 V
3.2
Internal VC capacitance
CVC_INT
PRIMARY CONTROL : PC
• The PC pin enables and disables the VTM.
• Module will shutdown when pulled low with an impedance
When held below 2 V, the VTM will be disabled.
less than 400 Ω.
• PC pin outputs 5 V during normal operation. PC pin is equal to 2.5 V
• In an array of VTMs, connect PC pin to synchronize start up.
during fault mode given VIN > 26 V or VC > 11.5 V.
• PC pin cannot sink current and will not disable other modules
• After successful start up and under no fault condition, PC can be used as
during fault mode.
a 5 V regulated voltage source with a 2 mA maximum current.
Start Up
SIGNAL TYPE
ANALOG
OUTPUT
STATE
Steady
Start Up
Enable
DIGITAL
INPUT / OUPUT
Disable
Transitional
ATTRIBUTE
PC voltage
PC source current
PC resistance (internal)
PC source current
PC capacitance (internal)
PC resistance (external)
PC voltage
PC voltage (disable)
PC pull down current
PC disable time
PC fault response time
VVC_SP
dVC/dt
IINR_VC
SYMBOL
VPC
IPC_OP
RPC_INT
IPC_EN
CPC_INT
RPC_S
VPC_EN
VPC_DIS
IPC_PD
TPC_DIS_T
TFR_PC
V
CONDITIONS / NOTES
Internal pull down resistor
Rev 1.3
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µs
µF
TYP
MAX UNIT
4.7
5.0
50
50
150
100
5.3
2
400
300
1100
60
2
2.5
5.1
VTM™ Current Multiplier
µs
MIN
Section 7
From fault to PC = 2 V
V
V/µs
A
5
100
3
2
V
mA
kΩ
µA
pF
kΩ
V
V
mA
µs
µs
VTM48Ex160y015A00
TEMPERATURE MONITOR : TM
• The TM pin monitors the internal temperature of the VTM controller IC
• The TM pin has a room temperature setpoint of 3 V
within an accuracy of ±5°C.
and approximate gain of 10 mV/°C.
• Can be used as a "Power Good" flag to verify that the VTM is operating.
• Output drives Temperature Shutdown comparator
SIGNAL TYPE
STATE
ANALOG
OUTPUT
ATTRIBUTE
TM voltage
TM source current
TM gain
Steady
Disable
DIGITAL OUTPUT
(FAULT FLAG)
Transitional
SYMBOL
VTM_AMB
ITM
ATM
TM voltage ripple
VTM_PP
TM voltage
TM resistance (internal)
TM capacitance (external)
TM fault response time
VTM_DIS
RTM_INT
CTM_EXT
TFR_TM
CONDITIONS / NOTES
TJ controller = 27°C
MIN
TYP
MAX UNIT
2.95
3.00
3.05
100
V
µA
mV/°C
200
mV
50
50
V
kΩ
pF
µs
10
CTM = 0 F, VIN = 48 V,
IOUT = 15 A
120
Internal pull down resistor
25
From fault to TM = 1.5 V
0
40
10
4.0 TIMING DIAGRAM
ISEC
6
7
ISEC
ISEC
1
2 3
VC
4
8
d
5
b
VVC-EXT
a
VOVLO
VPRI
NL
≥ 26 V
c
e
f
VSEC
TM
VTM-AMB
PC
g
5V
3V
a: VC slew rate (dVC/dt)
b: Minimum VC pulse rate
c: TOVLO_PIN
d: TOCP_SEC
e: Secondary turn on delay (TON)
f: PC disable time (TPC_DIS_T)
g: VC to PC delay (TVC_PC)
1. Initiated VC pulse
2. Controller start
3. VPRI ramp up
4. VPRI = VOVLO
5. VPRI ramp down no VC pulse
6. Overcurrent, Secondary
7. Start up on short circuit
8. PC driven low
Notes:
– Timing and voltage is not to scale
– Error pulse width is load dependent
VTM™ Current Multiplier
Rev 1.3
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800 927.9474
VTM48Ex160y015A00
5.0 APPLICATION CHARACTERISTICS
The following values, typical of an application environment, are collected at TC = 25ºC unless otherwise noted. See associated figures
for general trend data.
ATTRIBUTE
SYMBOL
No load power dissipation
Efficiency (ambient)
Efficiency (hot)
Output resistance (cold)
Output resistance (ambient)
Output resistance (hot)
PNL
hAMB
hHOT
ROUT_COLD
ROUT_AMB
ROUT_HOT
Output voltage ripple
VOUT_PP
VOUT transient (positive)
VOUT_TRAN+
VOUT transient (negative)
VOUT_TRAN-
CONDITIONS / NOTES
TYP
UNIT
VIN = 48 V, PC enabled
VIN = 48 V, IOUT = 15 A
VIN = 48 V, IOUT = 15 A, TC = 100ºC
VIN = 48 V, IOUT = 15 A, TC = -40ºC
VIN = 48 V, IOUT = 15 A
VIN = 48 V, IOUT = 15 A, TC = 100ºC
COUT = 0 F, IOUT = 15 A, VIN = 48 V,
20 MHz BW, Section 12
IOUT_STEP = 0 A TO 15 A, VIN = 48 V,
ISLEW = 13 A /us
IOUT_STEP = 15 A to 0 A, VIN = 48 V
ISLEW = 52 A /us
4.4
95.5
95.2
24.5
29.1
33.4
W
%
%
mΩ
mΩ
mΩ
233
mV
700
mV
700
mV
No Load Power Dissipation vs. Line
Full Load Efficiency vs. TCASE
96
Full Load Efficiency (%)
8
7
6
5
4
3
2
94
92
1
26
29
32
35
38
41
43
46
49
52
-40
55
-20
0
-40°C
25°C
VIN
100°C
60
80
100
26 V
:
48 V
55 V
Figure 2 — Full load efficiency vs. temperature
Figure 1 — No load power dissipation vs. VIN
Efficiency & Power Dissipation -40°C Case
Efficiency & Power Dissipation 25°C Case
27
97
27
94
24
94
24
91
21
91
21
88
18
88
18
85
15
85
15
82
12
82
12
79
9
79
9
76
6
PD
73
3
70
0
0
2
4
6
8
10
12
14
Efficiency (%)
97
Power Dissipation (W)
Efficiency (%)
40
Case Temperature (C)
Input Voltage (V)
TCASE:
20
76
26 V
48 V
55 V
3
0
70
16
0
2
4
6
Load Current (A)
VIN:
6
PD
73
Power Dissipation (W)
Power Dissipation (W)
9
8
10
12
14
16
Load Current (A)
26 V
48 V
Figure 3 — Efficiency and power dissipation at –40°C
55 V
VIN:
26 V
48 V
55 V
26 V
48 V
Figure 4 — Efficiency and power dissipation at 25°C
VTM™ Current Multiplier
Rev 1.3
vicorpower.com
Page 5 of 18
09/2015
800 927.9474
55 V
VTM48Ex160y015A00
ROUT vs. TCASE at VIN = 48 V
94
24
91
21
88
18
85
15
82
12
79
9
6
76
PD
73
3
40
36
ROUT (mW))
27
Power Dissipation (W)
Efficiency
Efficiency & Power Dissipation 100°C Case
97
0
2
4
6
8
10
12
14
28
24
20
0
70
32
-40
16
-20
0
26 V
48 V
55 V
40
60
80
100
Case Temperature (C)
Load Current (A)
VIN:
20
26 V
48 V
55 V
Full Load
Figure 6 — ROUT vs. temperature
Figure 5 — Efficiency and power dissipation at 100°C
Output Voltage Ripple vs. Load
Safe Operating Area
300
24
Output Current (A)
VRipple (mVPK-PK)
250
200
150
100
50
0
2
4
6
8
10
12
14
16
26 V
48 V
16
Continuous
12
8
4
0
0
Load Current (A)
VIN :
10ms Max
20
4
8
12
Output Voltage (V)
55 V
Figure 7 — VRIPPLE vs. IOUT ; No external COUT. Board mounted
module, scope setting : 20 MHz analog BW
Figure 8 — Safe operating area
Figure 9 — Full load ripple, 100 µF CIN; No external COUT. Board
mounted module, scope setting : 20 MHz analog BW
Figure 10 — Start up from application of VIN;
VC pre-applied COUT = 800 µF
VTM™ Current Multiplier
Rev 1.3
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800 927.9474
16
20
VTM48Ex160y015A00
Figure 11 — Start up from application of VC;
VIN pre-applied COUT = 800 µF
Figure 12 – 0 A– Full load transient response:
CIN = 100 µF, no external COUT
Figure 13 — Full load – 0 A transient response:
CIN = 100 µF, no external COUT
VTM™ Current Multiplier
Rev 1.3
vicorpower.com
Page 7 of 18
09/2015
800 927.9474
VTM48Ex160y015A00
6.0 GENERAL CHARACTERISTICS
Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature
range of -40ºC < TJ < 125ºC (T-Grade); All Other specifications are at TJ = 25°C unless otherwise noted.
ATTRIBUTE
MECHANICAL
Length
Width
Height
Volume
Weight
SYMBOL
L
W
H
Vol
W
CONDITIONS / NOTES
MIN
32.25 / [1.270]
21.75 / [0.856]
6.48 / [0.255]
No heat sink
Nickel
Palladium
Gold
Lead finish
TYP
32.5 / [1.280]
22.0 / [0.866]
6.73 / [0.265]
4.81 / [0.294]
15.0 / [0.53]
MAX
UNIT
32.75 / [1.289]
22.25 / [0.876]
6.98 / [0.275]
mm/[in]
mm/[in]
mm/[in]
cm3/[in3]
g/[oz]
0.51
0.02
0.003
2.03
0.15
0.051
µm
-40
-55
-40
-55
125
125
125
125
°C
°C
°C
°C
THERMAL
Operating temperature
Thermal resistance
VTM48EF160T015A00 (T-Grade)
VTM48EF160M015A00 (M-Grade)
VTM48ET160T015A00 (T-Grade)
VTM48ET160M015A00 (M-Grade)
Isothermal heat sink and
isothermal internal PCB
TJ
fJC
Thermal capacity
ASSEMBLY
Peak compressive force
applied to case (Z-axis)
Storage temperature
TST
ESDHBM
ESDCDM
SOLDERING
Peak temperature during reflow
Peak time above 217°C
Peak heating rate during reflow
Peak cooling rate post reflow
MTBF
Agency approvals / standards
°C/W
5
Ws/°C
6
5.41
125
125
125
125
Supported by J-lead only
ESD withstand
SAFETY
Isolation voltage (hipot)
Isolation capacitance
Isolation resistance
1
VTM48EF160T015A00 (T-Grade)
VTM48EF160M015A00 (M-Grade)
VTM48ET160T015A00 (T-Grade)
VTM48ET160M015A00 ( M-Grade)
Human Body Model,
"JEDEC JESD 22-A114-F"
Charge Device Model,
"JEDEC JESD 22-C101-D"
-40
-65
-40
-65
1000
VDC
400
MSL 4 (Datecode 1528 and later)
VHIPOT
CIN_OUT
RIN_OUT
2250
2500
10
Unpowered unit
lbs
lbs / in2
°C
°C
°C
°C
60
1.5
1.5
245
90
3
6
°C
s
°C/s
°C/s
3200
3800
VDC
pF
MΩ
MIL-HDBK-217 Plus Parts Count;
25ºC Ground Benign, Stationary,
3.8
Indoors / Computer Profile
Telcordia Issue 2 - Method I Case 1;
5.6
Ground Benign, Controlled
cTUVus
CE Marked for Low Voltage Directive and ROHS Recast Directive, as applicable
VTM™ Current Multiplier
Rev 1.3
vicorpower.com
Page 8 of 18
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800 927.9474
MHrs
MHrs
VTM48Ex160y015A00
7.0 USING THE CONTROL SIGNALS VC, PC, TM, IM
The VTM Control (VC) pin is an input pin which powers the
internal VCC circuitry when within the specified voltage range
of 11.5 V to 16.5 V. This voltage is required for VTM current
multiplier start up and must be applied as long as the input is
below 26 V. In order to ensure a proper start, the slew rate of
the applied voltage must be within the specified range.
Some additional notes on the using the VC pin:
• In most applications, the VTM module will be powered by an
upstream PRM™ regulator which provides a 10 ms
VC pulse during start up. In these applications the VC pins
of the PRM regulator and VTM current multiplier should be
tied together.
• The VC voltage can be applied indefinitely allowing for
continuous operation down to 0 VIN.
• The fault response of the VTM module is latching. A positive
edge on VC is required in order to restart the unit. If VC is
continuously applied the PC pin may be toggled to restart
the VTM module.
Primary Control (PC) pin can be used to accomplish the
following functions:
• Delayed start: Upon the application of VC, the PC pin will
source a constant 100 µA current to the internal RC
network. Adding an external capacitor will allow further
delay in reaching the 2.5 V threshold for module start.
• Auxiliary voltage source: Once enabled in regular
operational conditions (no fault), each VTM PC provides a
regulated 5 V, 2 mA voltage source.
• Output disable: PC pin can be actively pulled down in order
to disable the module. Pull down impedance shall be lower
than 400 Ω.
• Fault detection flag: The PC 5 V voltage source is internally
turned off as soon as a fault is detected. It is important to
notice that PC doesn’t have current sink capability. Therefore,
in an array, PC line will not be capable of disabling
neighboring modules if a fault is detected.
• Fault reset: PC may be toggled to restart the unit if VC
is continuously applied.
Temperature Monitor (TM) pin provides a voltage
proportional to the absolute temperature of the converter
control IC.
It can be used to accomplish the following functions:
• Monitor the control IC temperature: The temperature in
Kelvin is equal to the voltage on the TM pin scaled
by 100. (i.e. 3.0 V = 300 K = 27ºC). If a heat sink is applied,
TM can be used to thermally protect the system.
• Fault detection flag: The TM voltage source is internally
turned off as soon as a fault is detected. For system
monitoring purposes (microcontroller interface) faults are
detected on falling edges of TM signal.
8.0 START UP BEHAVIOR
Depending on the sequencing of the VC with respect to the
input voltage, the behavior during start up will vary as follows:
• Normal operation (VC applied prior to VIN ): In this case the
controller is active prior to ramping the input. When the
input voltage is applied, the VTM module output voltage will
track the input (See Figure 10). The inrush current is
determined by the input voltage rate of rise and output
capacitance. If the VC voltage is removed prior to the input
reaching 26 V, the VTM may shut down.
• Stand-alone operation (VC applied after VIN ): In this case the
VTM output will begin to rise upon the application of the
VC voltage (See Figure 11). The Adaptive Soft Start Circuit
(See Section 11) may vary the ouput rate of rise in order to
limit the inrush current to its maximum level. When starting
into high capacitance, or a short, the output current will be
limited for a maximum of 1200 µsec. After this period, the
Adaptive Soft Start Circuit will time out and the VTM module
may shut down. No restart will be attempted until VC is
re-applied or PC is toggled. The maximum output
capacitance is limited to 800 µF in this mode of operation
to ensure a sucessful start.
9.0 THERMAL CONSIDERATIONS
VI Chip® products are multi-chip modules whose temperature
distribution varies greatly for each part number as well as with
the input /output conditions, thermal management and
environmental conditions. Maintaining the top of the
VTM48EF160T015A00 case to less than 100ºC will keep all
junctions within the VI Chip module below 125ºC for most
applications.
The percent of total heat dissipated through the top surface
versus through the J-lead is entirely dependent on the
particular mechanical and thermal environment. The heat
dissipated through the top surface is typically 60%. The heat
dissipated through the J-lead onto the PCB board surface is
typically 40%. Use 100% top surface dissipation when
designing for a conservative cooling solution.
It is not recommended to use a VI Chip module for an
extended period of time at full load without proper
heat sinking.
VTM™ Current Multiplier
Rev 1.3
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PC
-VIN
VC
PC Pull-Up
& Source
R VC_INT
+VINI
VTM™ Current Multiplier
Rev 1.3
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1000 pF
2.5 V
V DD
D VC_INT
CIN
100 A
18 V
V DD
Regulator
Supply
150 K
1.5 K
10.5 V
5V
2 mA
2.5 V
Enable
Enable
Gate Drive
Supply
OVLO
UVLO
V IN
Adaptive
Soft Start
V DD
Fault Logic
Enable
Modulator
Enable
Slow Current
Limit
Cr
V REF
Fast Current
Limit
Q4
Lr
Primary Stage &
Resonant Tank
Over Current Protection
Differential
Primary
Current Sensing
Q2
Overtemperature
Protection
Primary
Gate
Drive
Q1
Q3
Temperature
Dependent
Voltage Source
V REF
Secondary
Gate Drive
Q6
40 K
Power
Transformer
1K
Q5
0.01
F
Synchronous
Rectification
+VOUT
TM
-VOUT
COUT
VTM48Ex160y015A00
10.0 VTM MODULE BLOCK DIAGRAM
VTM48Ex160y015A00
11.0 SINE AMPLITUDE CONVERTERTM POINT OF LOAD CONVERSION
The Sine Amplitude Converter (SAC) uses a high frequency
resonant tank to move energy from input to output. (The
resonant tank is formed by Cr and leakage inductance Lr in the
power transformer windings as shown in the VTM module
Block Diagram. See Section 10). The resonant LC tank,
operated at high frequency, is amplitude modulated as a
function of input voltage and output current. A small amount
of capacitance embedded in the input and output stages of
the module is sufficient for full functionality and is key to
achieving power density.
The VTM48EF160T015A00 SAC can be simplified into the
following model:
3000 pH
IOUT
IOUT
LIN = 0.6 nH
LOUT = 600 pH
26.6 mΩ
+
VIN
V
IN
OUT
RROUT
R
RCIN
CIN
0.6 mΩ
CCININ
1Ω
V•I
1/3 • IOUT
3.4 µF
IIQQ
90 mA
RRCOUT
COUT
+
+
–
–
+
500 µΩ
1/3 • VIN
COUT
COUT
4.1 µF
VOUT
V
OUT
K
–
–
Figure 14 — VI Chip® module AC model
At no load:
VOUT = VIN • K
(1)
The use of DC voltage transformation provides additional
interesting attributes. Assuming that ROUT = 0 Ω and IQ = 0 A,
Eq. (3) now becomes Eq. (1) and is essentially load
independent, resistor R is now placed in series with VIN as
shown in Figure 15.
K represents the “turns ratio” of the SAC.
Rearranging Eq (1):
K=
VOUT
VIN
(2)
R
R
VVin
IN
+
–
SAC™
SAC
1/32
KK == 1/32
V
Vout
OUT
In the presence of load, VOUT is represented by:
VOUT = VIN • K – IOUT • ROUT
(3)
Figure 15 — K = 1/32 Sine Amplitude Converter™
with series input resistor
and IOUT is represented by:
IOUT =
IIN – IQ
K
(4)
ROUT represents the impedance of the SAC, and is a function of
the RDSON of the input and output MOSFETs and the winding
resistance of the power transformer. IQ represents the
quiescent current of the SAC control and gate drive circuitry.
The relationship between VIN and VOUT becomes:
VOUT = (VIN – IIN • R) • K
(5)
Substituting the simplified version of Eq. (4)
(IQ is assumed = 0 A) into Eq. (5) yields:
VOUT = VIN • K – IOUT • R • K2
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This is similar in form to Eq. (3), where ROUT is used to
represent the characteristic impedance of the SAC™. However,
in this case a real R on the input side of the SAC is effectively
scaled by K2 with respect to the output.
Assuming that R = 1 Ω, the effective R as seen from the secondary
side is 0.98 mΩ, with K = 1/32 as shown in Figure 15.
A similar exercise should be performed with the additon of a
capacitor or shunt impedance at the input to the SAC. A
switch in series with VIN is added to the circuit. This is depicted
in Figure 16.
SS
VVin
IN
+
–
C
C
SAC™
SAC
K = 1/32
K = 1/32
VVout
OUT
Figure 16 — Sine Amplitude Converter™ with input capacitor
A change in VIN with the switch closed would result in a
change in capacitor current according to the following
equation:
IC(t) = C
dVIN
dt
PDISSIPATED = PNL + PROUT
Assume that with the capacitor charged to VIN, the switch is
opened and the capacitor is discharged through the idealized
SAC. In this case,
(8)
POUT = PIN – PDISSIPATED = PIN – PNL – PROUT
C
K2
•
h =
=
dVOUT
dt
(9)
The equation in terms of the output has yielded a K2 scaling
factor for C, specified in the denominator of the equation.
A K factor less than unity, results in an effectively larger
capacitance on the output when expressed in terms of the
input. With a K= 1/32 as shown in Figure 16,
C=1 µF would appear as C=1024 µF when viewed
from the output.
(11)
The above relations can be combined to calculate the overall
module efficiency:
Substituting Eq. (1) and (8) into Eq. (7) reveals:
IOUT =
(10)
Therefore,
(7)
IC = IOUT • K
Low impedance is a key requirement for powering a highcurrent, low voltage load efficiently. A switching regulation
stage should have minimal impedance while simultaneously
providing appropriate filtering for any switched current. The
use of a SAC between the regulation stage and the point of
load provides a dual benefit of scaling down series impedance
leading back to the source and scaling up shunt capacitance or
energy storage as a function of its K factor squared. However,
the benefits are not useful if the series impedance of the SAC
is too high. The impedance of the SAC must be low, i.e. well
beyond the crossover frequency of the system.
A solution for keeping the impedance of the SAC low involves
switching at a high frequency. This enables small magnetic
components because magnetizing currents remain low. Small
magnetics mean small path lengths for turns. Use of low loss
core material at high frequencies also reduces core losses.
The two main terms of power loss in the VTM module are:
- No load power dissipation (PNL ): defined as the power
used to power up the module with an enabled powertrain
at no load.
- Resistive loss (ROUT): refers to the power loss across
the VTM modeled as pure resistive impedance.
POUT = PIN – PNL – PROUT
PIN
PIN
VIN • IIN – PNL – (IOUT)2 • ROUT
VIN • IIN
= 1–
(
)
PNL + (IOUT)2 • ROUT
VIN • IIN
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12.0 INPUT AND OUTPUT FILTER DESIGN
A major advantage of a SAC system versus a conventional
PWM converter is that the former does not require large
functional filters. The resonant LC tank, operated at extreme
high frequency, is amplitude modulated as a function of input
voltage and output current and efficiently transfers charge
through the isolation transformer. A small amount of
capacitance embedded in the input and output stages of the
module is sufficient for full functionality and is key to achieving
high power density.
This paradigm shift requires system design to carefully evaluate
external filters in order to:
1.Guarantee low source impedance.
To take full advantage of the VTM module dynamic
response, the impedance presented to its input terminals
must be low from DC to approximately 5 MHz. Input
capacitance may be added to improve transient
performance or compensate for high source impedance.
2.Further reduce input and /or output voltage ripple without
sacrificing dynamic response.
Given the wide bandwidth of the VTM module, the source
response is generally the limiting factor in the overall
system response. Anomalies in the response of the source
will appear at the output of the VTM module multiplied
by its K factor.
3.Protect the module from overvoltage transients imposed
by the system that would exceed maximum ratings and
cause failures.
The VI Chip® module input/output voltage ranges must
not be exceeded. An internal overvoltage lockout function
prevents operation outside of the normal operating input
range. Even during this condition, the powertrain is
exposed to the applied voltage and power MOSFETs must
withstand it.
13.0 CAPACITIVE FILTERING CONSIDERATIONS
FOR A SINE AMPLITUDE CONVERTER™
It is important to consider the impact of adding input and
output capacitance to a Sine Amplitude Converter on the
system as a whole. Both the capacitance value and the
effective impedance of the capacitor must be considered.
A Sine Amplitude Converter has a DC ROUT value which has
already been discussed in section 11. The AC ROUT of the
SAC contains several terms:
• Resonant tank impedance
• Input lead inductance and internal capacitance
• Output lead inductance and internal capacitance
The values of these terms are shown in the behavioral model in
section 11. It is important to note on which side of the
transformer these impedances appear and how they reflect
across the transformer given the K factor.
The overall AC impedance varies from model to model. For
most models it is dominated by DC ROUT value from DC to
beyond 500 KHz. The behavioral model in section 11 should be
used to approximate the AC impedance of the specific model.
Any capacitors placed at the output of the VTM module reflect
back to the input of the module by the square of the K factor
(Eq. 9) with the impedance of the module appearing in series.
It is very important to keep this in mind when using a PRM™
regulator to power the VTM module. Most PRM modules have
a limit on the maximum amount of capacitance that can be
applied to the output. This capacitance includes both the PRM
output capacitance and the VTM module output capacitance
reflected back to the input. In PRM module remote sense
applications, it is important to consider the reflected value of
VTM module output capacitance when designing and
compensating the PRM module control loop.
Capacitance placed at the input of the VTM module appear to
the load reflected by the K factor with the impedance of the
VTM module in series. In step-down ratios, the effective
capacitance is increased by the K factor. The effective ESR of
the capacitor is decreased by the square of the K factor, but
the impedance of the module appears in series. Still, in most
step-down VTM modules an electrolytic capacitor placed at the
input of the module will have a lower effective impedance
compared to an electrolytic capacitor placed at the output. This
is important to consider when placing capacitors at the output
of the module. Even though the capacitor may be placed at
the output, the majority of the AC current will be sourced from
the lower impedance, which in most cases will be the module.
This should be studied carefully in any system design using a
module. In most cases, it should be clear that electrolytic
output capacitors are not necessary to design a stable,
well-bypassed system.
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14.0 CURRENT SHARING
The SAC topology bases its performance on efficient transfer
of energy through a transformer without the need of closed
loop control. For this reason, the transfer characteristic can be
approximated by an ideal transformer with some resistive drop
and positive temperature coefficient.
This type of characteristic is close to the impedance
characteristic of a DC power distribution system, both in
behavior (AC dynamic) and absolute value (DC dynamic).
When connected in an array with the same K factor, the VTM
module will inherently share the load current (typically 5%)
with parallel units according to the equivalent impedance
divider that the system implements from the power source to
the point of load.
Some general recommendations to achieve matched array
impedances:
• Dedicate common copper planes within the PCB
to deliver and return the current to the modules.
• Provide the PCB layout as symmetric as possible.
• Apply same input / output filters (if present) to each unit.
16.0 REVERSE OPERATION
The VTM48EF160T015A00 is capable of reverse operation.
If a voltage is present at the output which satisfies the
condition VOUT > VIN • K at the time the VC voltage is applied,
or after the unit has started, then energy will be transferred
from secondary to primary. The input to output ratio will be
maintained. The VTM48EF160T015A00 will continue to
operate in reverse as long as the input and output are within
the specified limits. The VTM48EF160T015A00 has not been
qualified for continuous operation (>10 ms) in the reverse
direction.
For further details see AN:016 Using BCM® Bus Converters
in High Power Arrays.
VIN
ZIN_EQ1
VTM™1
ZOUT_EQ1
VOUT
RO_1
ZIN_EQ2
VTM™2
ZOUT_EQ2
RO_2
+
–
DC
Load
ZIN_EQn
VTM™n
ZOUT_EQn
RO_n
Figure 17 — VTM module array
15.0 FUSE SELECTION
In order to provide flexibility in configuring power systems
VI Chip® products are not internally fused. Input line fusing
of VI Chip products is recommended at system level to provide
thermal protection in case of catastrophic failure.
The fuse shall be selected by closely matching system
requirements with the following characteristics:
• Current rating
(usually greater than maximum current of VTM module)
• Maximum voltage rating
(usually greater than the maximum possible input voltage)
• Ambient temperature
• Nominal melting I2t
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17.1 J-LEAD PACKAGE MECHANICAL DRAWING
mm
(inch)
NOTES:
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
17.2 J-LEAD PACKAGE RECOMMENDED LAND PATTERN
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
VTM™ Current Multiplier
Rev 1.3
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17.3 THROUGH-HOLE PACKAGE MECHANICAL DRAWING
mm
(inch)
NOTES:
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
17.4 THROUGH-HOLE PACKAGE RECOMMENDED LAND PATTERN
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
VTM™ Current Multiplier
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17.5 RECOMMENDED HEAT SINK PUSH PIN LOCATION
(NO GROUNDING CLIPS)
(WITH GROUNDING CLIPS)
Notes:
1. Maintain 3.50 (0.138) Dia. keep-out zone
free of copper, all PCB layers.
2. (A) Minimum recommended pitch is 39.50 (1.555).
This provides 7.00 (0.275) component
edge-to-edge spacing, and 0.50 (0.020)
clearance between Vicor heat sinks.
(B) Minimum recommended pitch is 41.00 (1.614).
This provides 8.50 (0.334) component
edge-to-edge spacing, and 2.00 (0.079)
clearance between Vicor heat sinks.
3. VI Chip® module land pattern shown for reference
only; actual land pattern may differ.
Dimensions from edges of land pattern
to push–pin holes will be the same for
all full-size VI Chip® products.
5. Unless otherwise specified:
Dimensions are mm (inches)
tolerances are:
x.x (x.xx) = ±0.3 (0.01)
x.xx (x.xxx) = ±0.13 (0.005)
4. RoHS compliant per CST–0001 latest revision.
6. Plated through holes for grounding clips (33855)
shown for reference, heat sink orientation and
device pitch will dictate final grounding solution.
17.6 VTM MODULE PIN CONFIGURATION
4
3
2
+Out
B
C
C
D
D
F
G
H
H
J
J
K
K
+Out
-Out
+In
E
E
-Out
1
A
A
B
L
L
M
M
N
N
P
P
R
R
TM
VC
PC
-In
T
T
Signal Name
+In
–In
TM
VC
PC
+Out
–Out
Bottom View
VTM™ Current Multiplier
Rev 1.3
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Pin Designation
A1-E1, A2-E2
L1-T1, L2-T2
H1, H2
J1, J2
K1, K2
A3-D3, A4-D4, J3-M3, J4-M4
E3-H3, E4-H4, N3-T3, N4-T4
VTM48Ex160y015A00
Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and
accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom
power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor makes no
representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves the right to make
changes to any products, specifications, and product descriptions at any time without notice. Information published by Vicor has been checked and
is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies. Testing and other quality controls are
used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
Specifications are subject to change without notice.
Vicor’s Standard Terms and Conditions
All sales are subject to Vicor’s Standard Terms and Conditions of Sale, which are available on Vicor’s webpage or upon request.
Product Warranty
In Vicor’s standard terms and conditions of sale, Vicor warrants that its products are free from non-conformity to its Standard Specifications (the
“Express Limited Warranty”). This warranty is extended only to the original Buyer for the period expiring two (2) years after the date of shipment
and is not transferable.
UNLESS OTHERWISE EXPRESSLY STATED IN A WRITTEN SALES AGREEMENT SIGNED BY A DULY AUTHORIZED VICOR SIGNATORY, VICOR DISCLAIMS
ALL REPRESENTATIONS, LIABILITIES, AND WARRANTIES OF ANY KIND (WHETHER ARISING BY IMPLICATION OR BY OPERATION OF LAW) WITH
RESPECT TO THE PRODUCTS, INCLUDING, WITHOUT LIMITATION, ANY WARRANTIES OR REPRESENTATIONS AS TO MERCHANTABILITY, FITNESS FOR
PARTICULAR PURPOSE, INFRINGEMENT OF ANY PATENT, COPYRIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT, OR ANY OTHER MATTER.
This warranty does not extend to products subjected to misuse, accident, or improper application, maintenance, or storage. Vicor shall not be liable
for collateral or consequential damage. Vicor disclaims any and all liability arising out of the application or use of any product or circuit and assumes
no liability for applications assistance or buyer product design. Buyers are responsible for their products and applications using Vicor products and
components. Prior to using or distributing any products that include Vicor components, buyers should provide adequate design, testing and
operating safeguards.
Vicor will repair or replace defective products in accordance with its own best judgment. For service under this warranty, the buyer must contact
Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be
returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the
product was defective within the terms of this warranty.
Life Support Policy
VICOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS
PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF VICOR CORPORATION. As used herein, life support
devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform
when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the
user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or system or to affect its safety or effectiveness. Per Vicor Terms and Conditions of Sale, the user of Vicor products
and components in life support applications assumes all risks of such use and indemnifies Vicor against all liability and damages.
Intellectual Property Notice
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the
products described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property rights is
granted by this document. Interested parties should contact Vicor's Intellectual Property Department.
The products described on this data sheet are protected by the following U.S. Patents Numbers:
5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917; 7,145,186; 7,166,898; 7,187,263;
7,202,646; 7,361,844; D496,906; D505,114; D506,438; D509,472; and for use under 6,975,098 and 6,984,965.
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Andover, MA, USA 01810
Tel: 800-735-6200
Fax: 978-475-6715
email
Customer Service: [email protected]
Technical Support: [email protected]
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