PFM4914xB6M48D0yzz

VIA PFM™
PFM4914xB6M48D0yzz
®
S
US
C
C
NRTL
US
Isolated AC-DC Converter with PFC
Features & Benefits
Product Description
• Universal input (85 to 264 VAC)
The VIA PFM is a highly advanced 400 W AC-DC converter
operating from a rectified universal AC input which delivers an
isolated and regulated Safety Extra Low Voltage (SELV) 48 V
secondary output.
• 48 VOUT, regulated, isolated
• 400 W maximum power
• High efficiency
This unique, ultra-low profile module incorporates AC-DC
conversion, integrated filtering and transient surge protection
in a chassis mount or PCB mount form factor.
• Built-in EMI filtering
• Chassis mount or board mount packaging options
• Always-on, self-protecting converter control architecture
• SELV Output
The VIA PFM enables a versatile two-sided thermal strategy
which greatly simplifies thermal design challenges.
When combined with downstream Vicor DC-DC conversion
components and regulators, the VIA PFM allows the Power
Design Engineer to employ a simple, low-profile design which
will differentiate his end-system without compromising on
cost or performance metrics.
• Two temperature grades including operation to -40°C
• Robust package
• Versatile thermal management
• Safe and reliable secondary-side energy storage
• High MTBF
• 127 W/cubic inch power density
• 4914 package
• External rectification and transient protection required
Typical Applications
• Small cell base stations
• Telecom switching equipment
• LED lighting
• Test and measurement equipment
• 200 - 400 W Industrial power systems
• Office equipment
Size:
4.91 x 1.40 x .37 in
124.8 x 35.5 x 9.3 mm
Part Ordering Information
Product
Function
P
F
Package
Length
M
PFM =
Power Factor
Module
4
9
Package
Width
1
4
Package
Type
x
Length in
Width in
B = Board VIA
Inches x 10 Inches x 10 V = Chassis VIA
Input
Voltage
B
6
Range
Ratio
M
Output
Voltage
(Range)
Max
Output
Current
4
D
8
Internal Reference
VIA PFM™
Rev 1.3
vicorpower.com
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07/2015
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0
Product Grade
y
Option Field
z
z
00 = Chassis/Always On
C = -20 to 100°C
04 = Short Pin/Always On
T = -40 to 100°C
08 = Long Pin/Always On
PFM4914xB6M48D0yzz
Typical PCB Mount Applications
J1
48 V
Filter
~
85 264 Vac
C4
+
VIA
PFM™
MOV
~
–
+
_ 48 V 3 A
+OUT
+IN
D1
-IN
PRM®/VTM®
+
_ 3.3 V 10 A
PRM®/VTM®
+
_ 1.8 V 80 A
+
C1
-OUT
The PCB terminal option allows mounting on an industry standard printed circuit board, with two different pin lengths. Vicor
offers a variety of downstream DC-DC converters driven by the 48 V output of the VIA PFM. The 48 V output is usable directly by
loads that are tolerant of the PFC line ripple, such as fans, motors, relays, and some types of lighting. Use downstream DC-DC
Point of Load converters where more precise regulation is required.
Parts List for Typical PCB Mount Applications
J1
Delta 06AR2 EMI Filter Entry Module, C14 6 A 250 V 5 x 20 mm fuseholder
F1 (mount in J1)
Littelfuse 0216008.MXP 8 A 250 VAC 5 x 20 mm holder
D1
Fairchild GBPC1210W 12 A 1000 V PTH
Nichicon UVR1J472MRD 4700 µF 63 V 3.4 A 22 x 50 mm bent 90° x 2 pcs
or
C1
CDE 380LX472M063K022 4700 µF 63 V 4.9 A 30 x 30 mm snap x 2 pcs
or
Sic Safco Cubisic LP A712121 10,000 µF 63 V 6.4 A 45 x 75 x 12 mm rectangular
C4
Panasonic ECQ-U2A474ML 0.47 µF 275 V
MOV
Littelfuse TMOV20RP300E VARISTOR 10 kA 300 V 250 J 20 mm
VIA PFM™
Rev 1.3
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Typical Chassis Mount Applications
J1
48 V
Filter
85 264 Vac
C4
+OUT
+IN
D1
~
+
~
–
Fan
VIA
PFM™
MOV
C1
-OUT
-IN
8
Relays
8
16
Dispensors
Controller
Coin Box
The VIA PFM is available in Chassis Mount option, saving the cost of a PCB and allowing access to both sides of the power supply
for cooling. The parts list below minimizes the number of interconnects required between necessary components, and selects
components with terminals traditionally used for point to point chassis wiring.
Parts List for Typical Chassis Mount Applications
J1
Delta 06AR2 EMI Filter Entry Module, C14 6 A 250 V 5 x 20 mm fuseholder
F1 (mount in J1)
Littelfuse 0216008.MXP 8 A 250 VAC 5 x 20 mm holder
D1
Fairchild GBPC1210FS 12 A 1000 V 0.25” QC TERMINAL
C1
UCC E32D630HPN103MA67M 10,000 µF, 63 V 7.4 A, 35 x 67 mm screw terminal
or
Kemet ALS30A103DE063, 10,000 µF 63 V 10.8 A 36 x 84 mm screw terminal
C4
Panasonic ECQ-U2A474ML 0.47 µF 275 V
MOV
Littelfuse TMOV20RP300E VARISTOR 10 kA 300 V 250 J 20 mm
VIA PFM™
Rev 1.3
vicorpower.com
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PFM4914xB6M48D0yzz
Pin Configuration
1
2
TOP VIEW
+IN A
C +OUT
–IN B
D –OUT
4914 VIA PFM - Chassis Mount - Terminals Up
1
2
TOP VIEW
–IN B
D –OUT
+IN A
C +OUT
4914 VIA PFM - PCB Mount - Pins Down
Please note that these Pin drawings are not to scale.
Pin Descriptions
Pin Number
Signal Name
Type
Function
A1
+IN
INPUT POWER
Positive input power terminal
B1
–IN
INPUT POWER
RETURN
Negative input power terminal
C2
+OUT
OUTPUT POWER
Positive output power terminal
D2
–OUT
OUTPUT POWER
RETURN
Negative output power terminal
VIA PFM™
Rev 1.3
vicorpower.com
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07/2015
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PFM4914xB6M48D0yzz
Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.
Parameter
Comments
Min
Max
Unit
Input voltage +IN to –IN
1 ms max
0
600
Vpk
Input voltage (+IN to -IN)
Continuous, Rectified
0
275
VRMS
-0.5
58
VDC
Output voltage (+Out to -Out)
Output current
0.0
12.4
A
Operating junction temperature
T-Grade
-40
125
°C
Storage temperature
T-Grade
-40
125
°C
Dielectric Withstand*
See note below
Input-Case
Basic Insulation
2121
Vdc
Input-Output
Reinforced Insulation
4242
Vdc
Output-Case
Functional Insulation
707
Vdc
10.00
500
8.00
400
6.00
300
4.00
200
2.00
100
0.00
0
-60
-40
-20
0
20
40
60
80
Case Temperature (°C)
Current
Power
Safe Operating Area
VIA PFM™
Rev 1.3
vicorpower.com
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100
Output Power (W)
Output Current (A)
* Please see Dielectric Withstand section. See page 18.
PFM4914xB6M48D0yzz
Electrical Specifications
Specifications apply over all line and load conditions, 50 Hz and 60 Hz line frequencies, TJ = 25°C, unless otherwise noted.
Boldface specifications apply over the temperature range of the specified product grade. COUT is 10,000 µF +/- 20% unless otherwise specified.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
264
VRMS
600
V
148
VRMS
Power Input Specification
Input voltage range,
continuous operation
VIN
Input voltage range,
transient, non-operational (peak)
VIN
Input voltage cell reconfiguration
low-to-high threshold
VIN-CR+
Input voltage cell reconfiguration
high-to-low threshold
VIN-CR-
85
1 ms
145
132
Input current (peak)
IINRP
Source line frequency range
fline
Power factor
PF
Input power >200 W
Input inductance, maximum
LIN
Differential mode inductance, common mode
inductance may be higher. See section "Source
Inductance Considerations" on page 16.
Input capacitance, maximum
CIN
After bridge rectifier, between +IN and - IN
135
See Figure 8, Startup Waveforms
47
VRMS
12
A
63
Hz
0.96
1
mH
1.5
µF
7
W
50
V
No Load Specification
Input power – no load, maximum
PNL
Power Output Specification
Output voltage set point
VOUT
VIN = 230 Vrms, 100% Load
46
Output voltage, no load
VOUT-NL
Over all operating steady state line conditions
42
52
V
Output voltage range (transient)
VOUT
Non-faulting abnormal line and load transient
conditions
30
57.6
V
Output power
POUT
See SOA on Page 4
400
W
VIN = 230 V, full load, exclusive of input rectifier losses
Efficiency
h
90.5
48
92
%
85 V < VIN < 264 V, full load, exclusive of
input rectifier losses
90
%
85 V < VIN < 264 V, 75% load,
exclusive of input rectifier losses
90
%
Output voltage ripple,
switching frequency
VOUT-PP-HF
Over all operating steady-state line and load
conditions, 20 MHz BW, measured at C3, Figure 5
200
2000
mV
Output voltage ripple
line frequency
VOUT-PP-LF
Over all operating steady-state line and load
conditions, 20 MHz BW
3.0
7.0
V
Output capacitance (external)
COUT-EXT
Allows for ±20% capacitor tolerance
15000
µF
6800
Output turn-on delay
TON
From VIN applied
500
1000
ms
Start-up setpoint aquisition time
TSS
Full load
500
1000
ms
Cell reconfiguration response time
TCR
Full load
5.5
11
ms
20
%
600
ms
Voltage deviation (transient)
%VOUT-TRANS
-37.5
Recovery time
TTRANS
Line regulation
%VOUT-LINE
Full load
3
%
Load regulation
%VOUT-LOAD
10% to 100% load
3
%
SOA
8.33
A
20 ms duration, average power ≤POUT, max
12.5
A
Output current (continuous)
Output current (transient)
IOUT
IOUT-PK
300
VIA PFM™
Rev 1.3
vicorpower.com
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PFM4914xB6M48D0yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, 50 Hz and 60 Hz line frequencies, TJ = 25°C, unless otherwise noted.
Boldface specifications apply over the temperature range of the specified product grade. COUT is 10,000 µF +/- 20% unless otherwise specified.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
74
83
VRMS
Powertrain Protections
Input undervoltage turn-on
VIN-ULVO+
Input undervoltage turn-off
VIN-ULVO-
Input overvoltage turn-on
VIN-ULVO-
Input overvoltage turn-off
VIN-ULVO+
Output overvoltage threshold
VOUT-ULVO+
Upper start / restart temperature
threshold (case)
TCASE-OTP-
See Timing Diagram
See Timing Diagram
Instantaneous, latched shutdown
65
71
VRMS
265
270
VRMS
58
273
287
VRMS
61
64
V
100
°C
Overtemperature shutdown
threshold (junction)
TJ-OTP+
125
°C
Overtemperature shutdown
threshold (case)
TCASE-OTP+
110
°C
Overcurrent blanking time
TOC
Based on line frequency
Input overvoltage response time
TPOVP
Input undervoltage response time
TUVLO
Output overvoltage response time
TSOVP
400
460
550
ms
40
ms
Based on line frequency
200
ms
Powertrain on
30
ms
Short circuit response time
TSC
Powertrain on, operational state
270
µs
Fault retry delay time
TOFF
See Timing Diagram
10
s
Output power limit
PPROT
50% overload for 20 ms typ allowed
VIA PFM™
Rev 1.3
vicorpower.com
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400
W
Output
Input
VIA PFM™
Rev 1.3
vicorpower.com
Page 8 of 24
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ILOAD
VOUT
EN
VIN-RMS
tON
≈30VRMS
VIN-UVLO+
1
Input Power
On & UV
Turn-on
VOUT-NL
VOUT
2
3
Full
10%
Load
Load
Applied Applied
tEN-DIS
4
EN
Forced
Low
tON
5
EN
High
tSS
VIN-CR+
tPOVP
tON
tSS
VIN-OVLO-
7
8
Input
Input
OV
OV
Turn-off Turn-on
VIN-OVLO+
tCR
6
Range
Change
LO to HI
tCR
VIN-CR-
9
Range
Change
HI to LO
tUVLO
VIN-UVLO-
11
12
Load Input Power
Step
Off & UV
Turn-off
tTRANS
(2 places)
10
Load
Dump
PFM4914xB6M48D0yzz
Timing diagram
Output
Input
VIA PFM™
Rev 1.3
vicorpower.com
Page 9 of 24
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800 927.9474
ILOAD
VOUT
EN
VIN-RMS
tSS
tON
VIN-UVLO+
13
Input Power
ON & UV
Turn-on
tOFF+tON
tOC
tOC
14
Output OC
Fault
tOFF+tON
tOC
15
Output
OC
Recovery
))
tSOVP
))
))
*
))
))
))
))
))
))
VOUT-OVLO+
*
18
Output
OVP
Fault
))
tON
17
Toggle EN
(Output
OVP
Recovery)
))
))
16
Output
OVP
Fault
VIN-UVLO+
tON
19
Recycle
Input
Power
(Output
OVP
Recovery)
tSC
tOFF+tON
20
Output
SC
Fault
tOFF+tON
21
Output
SC
Recovery
≥tOFF+tON
VIN-UVLO-
22
23
24
OT Fault
Line
Input
&
Drop-Out Power
Recovery
Off & UV
Turn-off
PFM4914xB6M48D0yzz
Timing diagram (Cont.)
PFM4914xB6M48D0yzz
No Load Power Dissipation (W)
Application Characteristics Typical characteristics at 20°C with 10,000 µF bulk electrolytic capacitor unless otherwise noted.
93.2
Efficiency (%)
93.0
92.8
92.6
92.4
92.2
92.0
91.8
91.6
85
105
125
145
165
185
205
225
245
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
85
265
105
125
Figure 1 — Full load efficiency vs. line voltage
165
185
205
225
245
265
Figure 2 — Typical no load power dissipation vs. VIN ,
module enabled
1.00
800
0.98
700
0.96
Power Factor
Current (mA)
145
Input Line Voltage
Input Line Voltage
600
500
400
300
0.94
0.92
0.90
0.88
0.86
200
0.84
100
0.82
0.80
0
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
0
100
200
300
400
Output Power (W)
230 V, 50 Hz
1/3x EN61000-3-2, Class A
EN61000-3-2, Class D
VIN:
120 V/60 Hz
230 V/50 Hz
100 V/50 Hz
Figure 3 — Typical input current harmonics, full load vs. VIN using
typical applications circuit on pages 2 & 3
Figure 4 — Typical power factor vs. VIN and IOUT using typical
applications circuit on pages 2 & 3
Figure 5 — Typical switching frequency output voltage ripple
waveform, TCASE = 30ºC, VIN = 230 V, IOUT = 8.3 A,
no external ceramic capacitance, 20 MHZ BW
Figure 6 — Typical line frequency output voltage ripple waveform,
TCASE = 30ºC, VIN = 230 V, IOUT = 8.3 A,
COUT = 10,000 µF. 20 MHZ BW
VIA PFM™
Rev 1.3
vicorpower.com
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07/2015
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PFM4914xB6M48D0yzz
Application Characteristics (Cont.) Typical characteristics at 20°C with 10,000 µF bulk electrolytic capacitor unless otherwise noted.
Figure 7 — Typical output voltage transient response,
TCASE = 30ºC, VIN = 230 V, IOUT = 8.3 A, 2.1 A
COUT = 10,000 µF
Figure 8 — Typical startup waveform, application of VIN ,
RLOAD = 5.7 Ω, COUT = 10,000 µF
Figure 9 — 230 V, 120 V range change transient response 16.7 A,
IOUT = 8.3 A, COUT = 10,000 µF
Figure 10 — Line drop out, 230 V 50 Hz, 0° phase,
IOUT = 8.3 A, COUT = 10,000 µF
Figure 11 — Line drop out, 230 V50 Hz, 90° phase, VIN = 230 V,
50 Hz, IOUT = 8.3 A, COUT = 10,000 µF
Figure 12 — Typical line current waveform, VIN = 120 V,
60 HZ IOUT = 8.3 A, COUT = 10,000 µF
VIA PFM™
Rev 1.3
vicorpower.com
Page 11 of 24
07/2015
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PFM4914xB6M48D0yzz
Application Characteristics (Cont.) Typical characteristics at 20°C with 10,000 µF bulk electrolytic capacitor unless otherwise noted.
Marker 2 [T1]
Det
61.80 dB V
Att 20 dB
999.00000000 kHz
INPUT 2
100
MA Trd
Det
55022RED
Att 20 dB
ResBW
9 kHz
Meas T
20 ms Unit
dB V
10 MHz
2 [T1]
61.80 dB V
1 MHz
INPUT 2
100
MA Trd
55022RED
ResBW
9 kHz
Meas T
20 ms Unit
1 MHz
dB V
10 MHz
999.00000000 kHz
1 [T1]
90
80
76.61 dB V
198.00000000 kHz SGL
22QPA
1
90
SGL
80
1MA
22QPA
1MA
70
70
2
22QPB
22QPB
60
60
50
50
40
40
30
30
17.Mar 2015 08:49
20
Date:
150 kHz
30 MHz
17.MAR.2015
Date:
08:49:31
Figure 13 — Typical EMI Spectrum, Peak Scan, 90% load, 115 VIN,
COUT = 10,000 µF, No Inlet Filter, C4
Marker 2 [T1]
Det
61.57 dB V
Att 20 dB
978.00000000 kHz
INPUT 2
20.Mar 2015 14:59
20
150 kHz
100
MA Trd
14:59:08
Figure 14 — Typical EMI Spectrum, Peak Scan, 90% load,
115 VIN, COUT = 10,000 µF using Typical Chassis
Mount Application Circuit
55022RED
Det
Marker 1 [T1]
ResBW
9 kHz
Meas T
20 ms Unit
dB V
10 MHz
2 [T1]
61.57 dB V
1 MHz
30 MHz
20.MAR.2015
57.24 dB V
Att 20 dB
158.00000000 kHz
INPUT 2
100
MA Trd
9 kHz
Meas T
20 ms Unit
dB V
10 MHz
1 [T1]
57.24 dB V
1 MHz
978.00000000 kHz
1 [T1]
90
80
158.00000000 kHz
73.94 dB V
230.00000000 kHz SGL
22QPA
1
55022RED
ResBW
2 [T1]
90
80
1MA
70
54.30 dB V
19.90300000 MHz SGL
22QPA
1MA
70
2
22QPB
22QPB
60
60 1
50
50
40
40
30
30
2
17.Mar 2015 09:21
30 MHz
150 kHz
09:21:58
Date:
94
50
92
45
90
40
88
35
86
30
84
25
PD
82
20
Power Dissipation (W)
Efficiency (%)
Figure 15 — Typical EMI Spectrum, Peak Scan, 90% load, 230 VIN,
COUT = 10,000 µF, No Inlet Filter, C4
94
50
92
45
90
40
88
35
86
30
84
20
15
80
78
10
78
2
3
4
5
6
7
8
9
10
0
1
2
3
Load Current (A)
VIN:
25
PD
82
15
1
15:36:59
Figure 16 — Typical EMI Spectrum, Peak Scan, 90% load, 230 VIN,
COUT = 10,000 µF using Typical Chassis Mount
Application Circuit
80
0
30 MHz
20.MAR.2015
4
5
6
7
8
9
Load Current (A)
85 V
115 V
230 V
Eff
85 V
115 V
230 V
P Diss
Figure 17 — VIN to VOUT efficiency and power dissipation
vs. VIN and IOUT , TCASE = -40ºC
VIN:
85 V
115 V
230 V
Eff
85 V
115 V
230 V
P Diss
Figure 18 — VIN to VOUT efficiency and power dissipation
vs. VIN and IOUT , TCASE = 20ºC
VIA PFM™
Rev 1.3
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Page 12 of 24
07/2015
800 927.9474
Power Dissipation (W)
17.MAR.2015
20.Mar 2015 15:36
20
150 kHz
Efficiency (%)
20
Date:
PFM4914xB6M48D0yzz
94
50
92
45
90
40
88
35
86
30
84
25
PD
82
20
80
Power Dissipation (W)
Efficiency (%)
Application Characteristics (Cont.) Typical characteristics at 20°C with 10,000 µF bulk electrolytic capacitor unless otherwise noted.
15
78
10
0
1
2
3
4
5
6
7
8
9
Load Current (A)
VIN:
85 V
115 V
230 V
Eff
85 V
115 V
230 V
P Diss
Figure 19 — VIN to VOUT efficiency and power dissipation
vs. VIN and IOUT , TCASE = 85ºC
VIA PFM™
Rev 1.3
vicorpower.com
Page 13 of 24
07/2015
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PFM4914xB6M48D0yzz
General Characteristics
Specifications apply over all line and load conditions, 50 Hz and 60 Hz line frequencies, TC = 25°C, unless otherwise noted.
Boldface specifications apply over the temperature range of the specified Product Grade.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Mechanical
Length
L
124.8 / [4.91]
mm / [in]
Width
W
35.5 / [1.40]
mm / [in]
Height
H
Volume
Vol
Weight
W
Without heatsink
9.3 / [0.37]
mm / [in]
42.0 / [2.56]
cm3/ [in3]
156 / [5.5]
g / [oz]
Pin material
C145 copper, half hard
Underplate
Low stress ductile nickel
50
100
µin
Palladium
0.8
6
µin
Soft Gold
0.12
2
µin
C - Grade, see derating curve in SOA
-20
100
°C
T - Grade, see derating curve in SOA
-40
100
°C
Pin finish
Thermal
Operating case temperature
TC
Thermal resistance, junction to case, top
RJC_TOP
1.04
°C/W
Thermal resistance, junction to case,
bottom
RJC_BOT
1.83
°C/W
RHOU
0.15
°C/W
32
J/K
Coupling thermal resistance,
top to bottom of case, internal
Shell Thermal capacity
Thermal design
See Thermal Design on Page 17
Assembly
ESD rating
ESDHBM
Human Body Model,
JEDEC JESD 22-A114C.01
ESDMM
Machine Model,
JEDEC JESD 22-A115B
N/A
ESDCDM
Charged Device Model,
JEDEC JESD 22-C101D
200
1,000
V
Safety
cTÜVus; EN 60950-1
Agency approvals/standards
cURus; UL 60950-1
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable
Touch Current measured in accordance
with IEC 60990 using measuring network
Figure 3 (VIA PFM only)
EMI/EMC Compliance
FCC Part 15, EN55022, CISPR22: 2006 +
A1: 2007, Conducted Emissions
Class B Limits - with –OUT
connected to GND
EN61000-3-2: 2009,
Harmonic Current Emissions
Class A
VIA PFM™
Rev 1.3
vicorpower.com
Page 14 of 24
07/2015
800 927.9474
0.5
mA
PFM4914xB6M48D0yzz
General Characteristics (Cont.)
Specifications apply over all line and load conditions, 50 Hz and 60 Hz line frequencies, TC = 25°C, unless otherwise noted.
Boldface specifications apply over the temperature range of the specified Product Grade.
Attribute
Symbol
Conditions / Notes
Min
EMI/EMC Compliance (cont.)
EN61000-3-3: 2005,
Voltage Changes & Flicker
PST <1.0; PLT <0.65; dc <3.3%
dmax <6%
EN61000-4-4: 2004,
Electrical Fast Transients
Level 2, Performance Criteria A
EN61000-4-5: 2006,
Surge Immunity
Level 3, Immunity Criteria A,
external TMOV required
EN61000-4-6: 2009,
Conducted RF Immunity
Level 2, 130 dBµV (3.0 VRMS)
EN61000-4-8: 1993 + A1 2001,
Power Frequency H-Field 10A/m,
continuous field
Level 3, Performance Criteria A
EN61000-4-11: 2004,
Voltage Dips & Interrupts
Class 2, Performance Criteria A Dips,
Performance Criteria B Interrupts
VIA PFM™
Rev 1.3
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Typ
Max
Unit
PFM4914xB6M48D0yzz
Product Details and Design Guidelines
Input Fuse Selection
VI Brick products are not internally fused in order to provide flexibility
in configuring power systems. Input line fusing is recommended at
system level, in order to provide thermal protection in case of
catastrophic failure. The fuse shall be selected by closely matching
system requirements with the following characteristics:
Building Blocks and System Designs
+IN
~
+
~
–
 Recommended fuse: Change to 216 Series Littlefuse 8A or lower
+OUT
current rating (usually greater than the VIA PFM maximum
current at lowest input voltage)
 Maximum voltage rating
(usually greater than the maximum possible input voltage)
VIA
PFM™
MOV
-IN
-OUT
Holdup Capacitor
 Ambient temperature
 Breaking capacity per application requirements
 Nominal melting I2t
Figure 20 – 400 W Universal AC-to-DC Supply
Source Inductance Considerations
The VIA PFM is a high efficiency AC-to-DC converter, operating from a
universal AC input to generate an isolated SELV 48 VDC output bus
with power factor correction. It is the key component of an AC-to-DC
power supply system such as the one shown in Figure 20 above.
The input to the VIA PFM is a rectified sinusoidal AC source with a
power factor maintained by the module with harmonics conforming to
IEC 61000-3-2. Internal filtering enables compliance with the standards
relevant to the application (Surge, EMI, etc.). See EMI/EMC Compliance
standards on Page 13.
The module uses secondary-side energy storage (at the SELV
48 V bus) to maintain output hold up through line dropouts and
brownouts. Downstream regulators also provide tighter voltage
regulation, if required.
Traditional PFC Topology
Full Wave
Rectifier
EMI/TVS
Filter
Isolated
DC / DC 48 V Bus
Converter
Figure 21 – Traditional PFC AC-to-DC supply
To cope with input voltages across worldwide AC mains
(85 – 264 Vac), traditional AC-DC power supplies (Figure 21)
use two power conversion stages: 1) a PFC boost stage to step up from a
rectified input as low as 85 Vac to ~380 Vdc; and 2) a DC-DC down
converter from 380 Vdc to a 48 V bus.
The efficiency of the boost stage and of traditional power supplies is
significantly compromised operating from worldwide AC lines as low
as 85 Vac.
Adaptive Cell™ Topology
With its single stage Adaptive Cell™ topology, the VIA PFM enables
consistently high efficiency conversion from worldwide AC mains to a
48 V bus and efficient secondary-side power distribution.
The VIA PFM Powertrain uses a unique Adaptive Cell Topology that
dynamically matches the powertrain architecture to the AC line
voltage. In addition the VIA PFM uses a unique control algorithm to
reduce the AC line harmonics yet still achieve rapid response to
dynamic load conditions presented to it at the DC output terminals.
Given these unique power processing features, the VIA PFM can
expose deficiencies in the AC line source impedance that may result in
unstable operation if ignored.
It is recommended that for a single VIA PFM, the line source
inductance should be no greater than 1 mH for a universal AC input of
100 - 240 V. If the VIA PFM will be operated at 240 V nominal only , the
source impedance may be increased to 2 mH. For either of the
preceding operating conditions it is best to be conservative and stay
below the maximum source inductance values. When multiple VIA
PFM’s are used on a single AC line, the inductance should be no greater
than 1 mH/N, where N is the number of VIA PFM’s on the AC branch
circuit, or 2 mH/N for 240 Vac operation. It is important to consider all
potential sources of series inductance including and not limited to, AC
power distribution transformers, structure wiring inductance, AC line
reactors, and additional line filters. Non-linear behavior of power
distribution devices ahead of the VIA PFM may further reduce the
maximum inductance and require testing to ensure optimal
performance.
If the VIA PFM is to be utilized in large arrays, the VIA PFMs should be
spread across multiple phases or sources thereby minimizing the
source inductance requirements, or be operated at a line voltage close
to 240 Vac. Vicor Applications should be contacted to assist in the
review of the application when multiple devices are to be used
in arrays.
Fault Handling
Input Undervoltage (UV) Fault Protection
The input voltage is monitored by the micro-controller to detect an
input under voltage condition. When the input voltage is less than the
VIN-UVLO-, a fault is detected, the fault latch and reset logic disables the
modulator, the modulator stops powertrain switching, and the output
voltage of the unit falls. After a time tUVLO, the unit shuts down. Faults
lasting less than tUVLO may not be detected. Such a fault does not go
through an auto-restart cycle. Once the input voltage rises above VINUVLO+, the unit recovers from the input UV fault, the powertrain
resumes normal switching after a time tON and the output voltage of
the unit reaches the set-point voltage within a time tSS.
VIA PFM™
Rev 1.3
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Overcurrent (OC) Fault Protection
The unit’s output current, determined by VEAO, VIN_B and the primaryside sensed output voltage is monitored by the microcontroller to
detect an output OC condition. If the output current exceeds its current
limit, a fault is detected, the reset logic disables the modulator, the
modulator stops powertrain switching, and the output voltage of the
module falls after a time tOC. As long as the fault persists, the module
goes through an auto-restart cycle with off time equal to tOFF + tON and
on time equal to tOC. Faults shorter than a time tOC may not be
detected. Once the fault is cleared, the module follows its normal start
up sequence after a time tOFF.
Short Circuit (SC) Fault Protection
The microcontroller determines a short circuit on the output of the unit
by measuring its primary sensed output voltage and EAO. Most
commonly, a drop in the primary-sensed output voltage triggers a short
circuit event. The module responds to a short circuit event within a
time tSC. The module then goes through an auto restart cycle, with an
off time equal to tOFF + tON and an on time equal to tSC, for as long as
the short circuit fault condition persists. Once the fault is cleared, the
unit follows its normal start up sequence after a time tOFF. Faults
shorter than a time tSC may not be detected.
Temperature Fault Protection
The microcontroller monitors the temperature within the
VIA PFM. If this temperature exceeds TJ-OTP+,
an overtemperature fault is detected, the reset logic block disables the
modulator, the modulator stops the powertrain switching and the
output voltage of the VIA PFM falls. Once the case temperature falls
below TCASE-OTP-, after a time greater than or equal to tOFF, the
converter recovers and undergoes a normal restart. For the C-grade
version of the converter, this temperature is 75°C. Faults shorter than a
time tOTP may not be detected. If the temperature falls below TCASE-UTP-,
an undertemperature fault is detected, the reset logic disables the
modulator, the modulator stops powertrain switching and the output
voltage of the unit falls. Once the case temperature rises above TCASEUTP, after a time greater than or equal to tOFF, the unit recovers and
undergoes a normal restart.
Output Filtering
The VIA PFM requires an output bulk capacitor in the range of 6,800 μF
2
2
C = 2*POUT*(0.005+td) / (V2 – V1 )
where:
C
VIA PFM’s output bulk
capacitance in farads
td
Hold-up time in seconds
POUT
VIA PFM’s output power in watts
V2
Output voltage of VIA PFM’s
converter in volts
Downstream regulator undervoltage turn off (volts)
V1
–OR–
POUT / IOUT-PK, whichever is greater.
to 15,000 μF for proper operation of the PFC front-end. A minimum
10,000 μF is recommended for full rated output. Capacitance can be
reduced proportionally for lower maximum loads.
The output voltage has the following two components of voltage ripple:
1) Line frequency voltage ripple: 2*fLINE Hz component
2) Switching frequency voltage ripple: 1 MHz module switching
frequency component (see Figure 5).
Line Frequency Filtering
Output line frequency ripple depends upon output bulk capacitance.
Output bulk capacitor values should be calculated based on line
frequency voltage ripple. High-grade electrolytic capacitors with
adequate ripple current ratings, low ESR and a minimum voltage rating
of 63 V are recommended.
lPK
Output Overvoltage Protection (OVP)
The microcontroller monitors the primary sensed output voltage to
detect output OVP. If the primary sensed output voltage exceeds VOUTOVLO+, a fault is latched, the logic disables the modulator, the modulator
stops powertrain switching, and the output voltage of the module falls
after a time tSOVP. Faults shorter than a time tSOVP may not be detected.
This type of fault is a latched fault and requires that 1) the EN pin be
toggled or 2) the input power be recycled to recover from the fault.
Hold-up Capacitance
The VIA PFM uses secondary-side energy storage (at the SELV 48 V bus)
and optional PRM® regulators to maintain output hold up through line
dropouts and brownouts. The module’s output bulk capacitance can be
sized to achieve the required hold up functionality.
lPK/2
loutDC
lfLINE
Figure 22 – Output current waveform
Hold-up time depends upon the output power drawn from the VIA
PFM based AC-to-DC front end and the input voltage range of
downstream DC-to-DC converters.
The following formula can be used to calculate hold-up capacitance for
a system comprised of VIA PFM and a downstream regulator:
VIA PFM™
Rev 1.3
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Based on the output current waveform, as seen in Figure 22, the
following formula can be used to determine peak-to-peak line
frequency output voltage ripple:
VPPl
~
=
to simplify the thermal solution into a roughly equivalent circuit where
power dissipation is modeled as a current source, isothermal surface
temperatures are represented as voltage sources and the thermal
resistances are represented as resistors. Figure 23 shows the “thermal
circuit” for the VIA module.
0.2 * POUT / (VOUT * fLINE * C)
where:
VPPl
Output voltage ripple Peak-to-peak line frequency
POUT
Average output power
–
Output voltage set point, nominally 48 V
fLINE
Frequency of line voltage
C
Output bulk capacitance
IDC
Maximum average output current
IPK
Peak-to-peak line frequency output current ripple
–
+
Switching Frequency Filtering
This is included within the VIA PFM. No external filtering is necessary
for most applications. For the most noise sensitive applications, a
common mode choke followed by two caps to PE GND will reduce
switching noise further.
s
Figure 23 – Double sided cooling VIA thermal model
In this case, the internal power dissipation is PDISS, RJC_TOP and RJC_BOT
are thermal resistance characteristics of the VIA module and the top
and bottom surface temperatures are represented as TC_TOP, and TC_BOT.
It interesting to notice that the package itself provides a high degree of
thermal coupling between the top and bottom case surfaces
(represented in the model by the resistor RHOU). This feature enables
two main options regarding thermal designs:
 Single side cooling: the model of Figure 23 can be simplified by
calculating the parallel resistor network and using one simple
thermal resistance number and the internal power dissipation
curves; an example for bottom side cooling only is shown in
Figure 24.
EMI Filtering and Transient Voltage Suppression
EMI Filtering
The VIA PFM with PFC is designed such that it will comply with
EN55022 Class B for Conducted Emissions with a commercially
available off-the-shelf EM filter. The emissions spectrum is shown in
Figures 13 - 16. If one of the outputs is connected to earth ground, a
small output common mode choke is also recommended.
RJC
+ TC_BOT
EMI performance is subject to a wide variety of external influences
such as PCB construction, circuit layout etc. As such, external
components in addition to those listed herein may be required in
specific instances to gain full compliance to the standards specified.
Transient Voltage Suppression
The VIA PFM contains line transient suppression circuitry to meet
specifications for surge (i.e. EN61000-4-5) and fast transient conditions
(i.e. EN61000-4-4 fast transient/“burst”).
Thermal Considerations
The VIA™ package provides effective conduction cooling from either of
the two module surfaces. Heat may be removed from the top surface,
the bottom surface or both. The extent to which these two surfaces are
cooled is a key component for determining the maximum power that
can be processed by a VIA, as can be seen from specified thermal
operating area on Page 4. Since the VIA has a maximum internal
temperature rating, it is necessary to estimate this internal temperature
based on a system-level thermal solution. To this purpose, it is helpful
–
0.8 * POUT / VOUT
s
TC_BOT
RJC_BOT
PDISS
In certain applications, the choice of bulk capacitance may be
determined by hold-up requirements and low frequency output
voltage filtering requirements. Such applications may use the greater
capacitance value determined from these requirements. The ripple
current rating for the bulk capacitors can be determined from the
following equation:
~
=
TC_TOP
RHOU
VOUT
Iripple
+
RJC_TOP
PDISS
s
Figure 24 – Single-sided cooling VIA thermal model
In this case, RJC can be derived as following:
RJC =
(RJC_TOP + RHOU) • RJC_BOT
RJC_TOP + RHOU + RJC_BOT
VIA PFM™
Rev 1.3
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s
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 Double side cooling: while this option might bring limited
advantage to the module internal components (given the surfaceto-surface coupling provided), it might be appealing in cases where
the external thermal system requires allocating power to two
different elements, like for example heatsinks with independent
airflows or a combination of chassis/air cooling.
Powering a Constant Power Load
When the output voltage of the VIA PFM module is applied to the input
of the downstream regulator, the regulator turns on and acts as a
constant-power load. When the module’s output voltage reaches the
input undervoltage turn on of the regulator, the regulator will attempt
to start. However, the current demand of the downstream regulator at
the undervoltage turn-on point and the hold-up capacitor charging
current may force the VIA PFM into current limit. In this case, the unit
may shut down and restart repeatedly. In order to prevent this multiple
restart scenario, it is necessary to delay enabling a constant-power load
when powered up by the upstream VIA PFM until after the output set
point of the VIA PFM is reached.
This can be achieved by
1. keeping the downstream constant-power load off during
power up sequence
and
2. turning the downstream constant-power load
on after the output voltage of the module
reaches 48 V steady state
After the initial startup, the output of the VIA PFM can be allowed to
fall to 30 V during a line dropout at full load. In this case, the circuit
should not disable the downstream regulator if the input voltage falls
after it is turned on; therefore, some form of hysteresis or latching is
needed on the enable signal for the constant power load. The output
capacitance of the VIA PFM should also be sized appropriately for a
constant power load to prevent collapse of the output voltage of the
module during line dropout (see Hold up Capacitance on Page 16). A
constant-power load can be turned off after completion of the required
hold up time during the power-down sequence or can be allowed to
turn off when it reaches its own undervoltage shutdown point.
The timing diagram in Figure 25 shows the output voltage of the VIA
PFM and the downstream regulator’s enable pin voltage and output
voltage of the PRM regulator for the power up and power down
sequence. It is recommended to keep the time delay approximately 10
to 20 ms.
Special care should be taken when enabling the constant-power load
near the auto-ranger threshold, especially with an inductive source
upstream of the VIA PFM. A load current spike may cause a large input
voltage transient, resulting in a range change which could temporarily
reduce the available power (see Adaptive Cell™ Topology below).
Adaptive Cell™ Topology
The Adaptive Cell topology utilizes magnetically coupled “top” and
“bottom” primary cells that are adaptively configured in series or
parallel by a configuration controller comprised of an array of switches.
A microcontroller monitors operating conditions and defines the
configuration of the top and bottom cells through a range
control signal.
A comparator inside the microcontroller monitors the line voltage and
compares it to an internal voltage reference.
If the input voltage of the VIA PFM crosses above the positive going cell
reconfiguration threshold voltage, the top cell and bottom cell
configure in series and the unit operates in “high” range.
If the peak of input voltage of the unit falls below the negative-going
range threshold voltage for two line cycles, the cell configuration
controller configures the top cell and bottom cell in parallel, the unit
operates in “low” range.
Power processing is held off while transitioning between ranges and
the output voltage of the unit may temporarily droop. External output
hold up capacitance should be sized to support power delivery to the
load during cell reconfiguration. The minimum specified external
output capacitance is sufficient to provide adequate ride-through
during cell reconfiguration for typical applications. Waveforms
showing active cell reconfiguration can be seen in Figure 9.
Dielectric Withstand
The chassis of the VIA PFM is required to be connected to Protective
Earth when installed in the end application and must satisfy the
requirements of IEC 60950-1 for Class I products. Both sides of the
housing are required to be connected to Protective Earth to satisfy
safety and EMI requirements. Protective earthing can be accomplished
through dedicated wiring harness (example: ring terminal clamped by
mounting screw) or surface contact (example: pressure contact on bare
conductive chassis or PCB copper layer with no solder mask).
The VIA PFM contains an internal safety approved isolating component
(VI ChiP) that provides the Reinforced Insulation from Input to Output.
The isolating component is individually tested for Reinforced
Insulation from Input to Output at 3000 Vac or 4242 Vdc prior to the
final assembly of the VIA™.
When the VIA assembly is complete the Reinforced Insulation can only
be tested at Basic Insulation values as specified in the electric strength
Test Procedure noted in clause 5.2.2 of IEC 60950-1.
VIA PFM
48V – 3%
VOUT
Test Procedure Note from IEC 60950-1
PRM UV
Turn on
Downstream
Regulator
“For equipment incorporating both REINFORCED INSULATION and
lower grades of insulation, care is taken that the voltage applied to the
REINFORCED INSULATION does not overstress BASIC INSULATION or
SUPPLEMENTARY INSULATION.”
tDELAY
Enable
Downstream
Regulator
VOUT
tHOLD-UP
Figure 25 – PRM Enable Hold off Waveforms
VIA PFM™
Rev 1.3
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Summary
The final VIA assembly contains basic insulation from input to case,
reinforced insulation from input to output, and functional insulation
from output to case.
The output of the VIA complies with the requirements of SELV circuits
so only functional insulation is required from the output (SELV) to case
(PE) because the case is required to be connected to protective earth in
the final installation. The construction of the VIA can be summarized
by describing it as a “Class II” component installed in a “Class I”
subassembly. The reinforced insulation from input to output can only
be tested at a basic insulation value of 2121 Vdc on the completely
assembled VIA product.
VI ChiP Isolation
Input
Output
SELV
RI
Figure 26 – VI Chip before final assembly in the VIA
VIA PFM Isolation
VI ChiP
Input
Output
VIA Input Circuit
SELV
VIA Output Circuit
RI
BI
PE
FI
Figure 27 – PFM VIA after final assembly
VIA PFM™
Rev 1.3
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VIA PFM Chassis Mount Package Mechanical Drawing
C
.37
9.30
A
.152
3.861
THRU
TYP
B
.11
2.90
3
1
OUTPUT
INSERT
(41817)
TO BE
REMOVED
PRIOR
TO USE
INPUT
INSERT
(41816)
TO BE
REMOVED
PRIOR
TO USE
2
1.171
29.750
4
86(7<&2/8*25
(48,9)25287387&211(&7,21
86(7<&2/8*25
(48,9)25,1387&211(&7,21
NOTES:
1- RoHS COMPLIANT PER CST-0001 LATEST REVISION.
2- SEE PRODUCT DATA SHEET FOR PIN DESIGNATIONS.
PRODUCT
4914 VIA PFM
DIM 'A'
>@
DIM 'B'
>@
DIM 'C'
>@
Product outline drawing; Product outline drawings are available in .pdf and .dxf formats.
3D mechanical models are available in .pdf and .step formats.
VIA PFM™
Rev 1.3
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1.40
35.54
PFM4914xB6M48D0yzz
VIA PFM PCB Mount Package Mechanical Drawing and Recommended Land Pattern
DIM 'A'
.120±.003
3.048±.076
PLATED THRU
.030 [.762]
ANNULAR RING
(2) PL
.15
3.86
(4) PL.
DIM 'B'
DIM 'F'
±.003 [.076]
.112±.003
2.846±.076
.190±.003
4.826±.076
PLATED THRU
.030 [.762]
ANNULAR RING
(2) PL
DIM 'B''
±.003 [.076]
D2
B1
.156±.003
3.970±.076
0
1.171±.003
29.750±.076
.947±.003
24.058±.076
.859±.003
21.810±.076
C2
A1
.172±.003
4.369±.076
PLATED THRU
.064 [1.626]
ANNULAR RING
(4) PL.
TOP VIEW
(COMPONENT SIDE)
DIM 'D''
±.003 [.076]
RECOMMENDED HOLE PATTERN
(COMPONENT SIDE)
DIM 'C'
DIM 'L'
±.010 [.254]
.366±.010
9.300±.254
SEATING
PLANE
.080
2.032
(2) PL.
.150
3.810
(2) PL.
DIM 'L'
SHORT
.103 [2.607]
LONG
.182 [4.613]
NOTES:
1- RoHS COMPLIANT PER CST-0001 LATEST REVISION.
2- SEE PRODUCT DATA SHEET FOR PIN DESIGNATIONS.
DIM 'D'
±.010 [.254]
DIM 'F'
±.010 [.254]
A1
C2
1.171
29.750
.859±.010
21.810±.254
.947±.010
24.058±.254
.112±.010
2.846±.254
.11
2.90
B1
1.40
35.54
.156
3.970
D2
BOTTOM VEW
PRODUCT
DIM 'A'
DIM 'B'
DIM 'C'
DIM 'D'
DIM 'F'
4914 VIA PFM
2.17 [55.15]
1.757 [44.625]
4.91 [124.77]
4.517 [114.741]
1.999 [50.777]
VIA PFM™
Rev 1.3
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Revision History
Revision
Date
1.0
05/15/15
1.1
05/15
1.2
1.3
Description
Page Number(s)
Intital release
n/a
Mechanical Drawing change
20
06/10/15
Revised typical application part numbers
SOA
Voltage changes
Grounding note added
Pin name change
2, 3
4
16
18
20
07/16/15
Added Pin Configuration and Description page
Added Source Inductor Consideration note
Added Safety Approvals
Added Source Inductor Consideration section
Updated Mechanical drawing
4
6
14
16
21
VIA PFM™
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Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and
accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom
power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor makes no
representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves the right to make
changes to any products, specifications, and product descriptions at any time without notice. Information published by Vicor has been checked and
is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies. Testing and other quality controls are
used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
Specifications are subject to change without notice.
Vicor’s Standard Terms and Conditions
All sales are subject to Vicor’s Standard Terms and Conditions of Sale, which are available on Vicor’s webpage or upon request.
Product Warranty
In Vicor’s standard terms and conditions of sale, Vicor warrants that its products are free from non-conformity to its Standard Specifications (the
“Express Limited Warranty”). This warranty is extended only to the original Buyer for the period expiring two (2) years after the date of shipment
and is not transferable.
UNLESS OTHERWISE EXPRESSLY STATED IN A WRITTEN SALES AGREEMENT SIGNED BY A DULY AUTHORIZED VICOR SIGNATORY, VICOR DISCLAIMS
ALL REPRESENTATIONS, LIABILITIES, AND WARRANTIES OF ANY KIND (WHETHER ARISING BY IMPLICATION OR BY OPERATION OF LAW) WITH
RESPECT TO THE PRODUCTS, INCLUDING, WITHOUT LIMITATION, ANY WARRANTIES OR REPRESENTATIONS AS TO MERCHANTABILITY, FITNESS FOR
PARTICULAR PURPOSE, INFRINGEMENT OF ANY PATENT, COPYRIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT, OR ANY OTHER MATTER.
This warranty does not extend to products subjected to misuse, accident, or improper application, maintenance, or storage. Vicor shall not be liable
for collateral or consequential damage. Vicor disclaims any and all liability arising out of the application or use of any product or circuit and assumes
no liability for applications assistance or buyer product design. Buyers are responsible for their products and applications using Vicor products and
components. Prior to using or distributing any products that include Vicor components, buyers should provide adequate design, testing and
operating safeguards.
Vicor will repair or replace defective products in accordance with its own best judgment. For service under this warranty, the buyer must contact
Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be
returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the
product was defective within the terms of this warranty.
Life Support Policy
VICOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS
PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF VICOR CORPORATION. As used herein, life support
devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform
when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the
user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or system or to affect its safety or effectiveness. Per Vicor Terms and Conditions of Sale, the user of Vicor products
and components in life support applications assumes all risks of such use and indemnifies Vicor against all liability and damages.
Intellectual Property Notice
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the
products described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property rights is
granted by this document. Interested parties should contact Vicor's Intellectual Property Department.
The products described on this data sheet are protected by the following U.S. Patents Numbers: Patents Pending.
Vicor Corporation
25 Frontage Road
Andover, MA, USA 01810
Tel: 800-735-6200
Fax: 978-475-6715
email
Customer Service: [email protected]
Technical Support: [email protected]
VIA PFM™
Rev 1.3
vicorpower.com
Page 24 of 24
07/2015
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