IDT IDT74CBTLV3126PGG

IDT74CBTLV3126
LOW-VOLTAGE QUADRUPLE BUS SWITCH
INDUSTRIAL TEMPERATURE RANGE
LOW-VOLTAGE QUADRUPLE
BUS SWITCH
IDT74CBTLV3126
FEATURES:
APPLICATIONS:
•
•
•
•
•
•
•
Pin-out compatible with standard '126 Logic products
Ω A/B bi-directional switch
5Ω
Isolation under power-off conditions
Over-voltage tolerant
Latch-up performance exceeds 100mA
VCC = 2.3V - 3.6V, Normal Range
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
• Output enable, active high
• Available in QSOP and TSSOP packages
• 3.3V High Speed Bus Switching and Bus Isolation
FUNCTIONAL BLOCK DIAGRAM
SIMPLIFIED SCHEMATIC, EACH SWITCH
1A
2
1OE
1
2A
3
SW
5
6
SW
DESCRIPTION:
The CBTLV3126 features four independent switches. Each switch is
enabled when the associated output-enable (OE) input is high.
To ensure the high-impedance state during power up or power down,
OE should be tied to GND through a pulldown resistor; the minimum value
of the resistor is determined by the current-sinking capability of the driver.
1B
2B
B
A
2OE
4
3A
9
3OE
10
4A
12
4OE
13
8
SW
11
SW
3B
OE
4B
NOTE:
1. Pin numbers shown apply to the 14-pin TSSOP package.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
JULY 2008
1
© 2008
Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
DSC-5740/6
IDT74CBTLV3126
LOW-VOLTAGE QUADRUPLE BUS SWITCH
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
1OE
1
14
VCC
1A
2
13
4OE
1B
3
12
4A
2OE
4
11
4B
2A
5
10
3OE
2B
6
9
3A
GND
7
8
3B
NC
1
16
VCC
1OE
2
15
4OE
1A
3
14
4A
1B
4
13
4B
2OE
5
12
3OE
2A
6
11
3A
2B
7
10
3B
GND
8
9
NC
TSSOP
TOP VIEW
QSOP
TOP VIEW
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
FUNCTION TABLE(1)
Max
Unit
Input OE
Inputs/Outputs
H
A Port = B Port
L
Disconnect
VCC
SupplyVoltage Range
–0.5 to +4.6
V
VI
Input Voltage Range
–0.5 to +4.6
V
Continuous Channel Current
128
mA
IIK
Input Clamp Current, VI/O < 0
–50
mA
TSTG
Storage Temperature
–65 to +150
°C
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
OPERATING CHARACTERISTICS, TA = 25°C(1)
Symbol
Parameter
VCC
Supply Voltage
VIH
High-Level Control Input Voltage
VIL
TA
Low-Level Control Input Voltage
Test Conditions
Min.
Max.
Unit
2.3
3.6
V
VCC = 2.3V to 2.7V
1.7
—
V
VCC = 2.7V to 3.6V
2
—
VCC = 2.3V to 2.7V
—
0.7
VCC = 2.7V to 3.6V
—
0.8
−40
85
Operating Free-Air Temperature
NOTE:
1. All unused control inputs of the device must be held at VCC or GND to ensure proper device operation.
2
V
°C
IDT74CBTLV3126
LOW-VOLTAGE QUADRUPLE BUS SWITCH
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Conditions: TA = –40°C to +85°C
Min.
Typ.(1)
Max.
Unit
VCC = 3V, II = –18mA
—
—
–1.2
V
Control Inputs
VCC = 3.6V, VI = VCC or GND
—
—
±1
µA
Data I/O
VCC = 3.6V, VO = 0 or 3.6V, switch disabled
—
—
5
µA
VCC = 0, VI or VO = 0 to 3.6V
—
—
50
µA
Symbol
VIK
II
IOZ
Parameter
Control Inputs, Data Inputs
IOFF
ICC
∆ICC(2)
Control Inputs
CI
Control Inputs
CIO(OFF)
VCC = 2.3V
Typ. at VCC = 2.5V
RON(3)
Test Conditions
VCC = 3.6V, IO = 0, VI = VCC or GND
—
—
10
µA
VCC = 3.6V, one input at 3V, other inputs at VCC or GND
—
—
300
µA
VI = 3V or 0
—
4
—
pF
VO = 3V or 0, OE = VCC
VI = 0
—
—
—
—
—
—
—
6
5
5
27
5
5
10
—
8
8
40
7
7
15
pF
IO = 64mA
IO = 24mA
IO = 15mA
IO = 64mA
IO = 24mA
IO = 15mA
VI = 1.7V
VI = 0
VCC = 3V
VI = 2.4V
Ω
NOTES:
1. Typical values are at VCC = 3.3V, +25°C ambient.
2. The increase in supply current is attributable to each current that is at the specified voltage level rather than VCC or GND.
3. This is measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by the lower of the voltages
of the two (A or B ) terminals.
SWITCHING CHARACTERISTICS
VCC = 2.5V ± 0.2V
Symbol
tPD(1)
Parameter
Propagation Delay
VCC = 3.3V ± 0.3V
Min.
Max.
Min.
Max.
Unit
−
0.15
−
0.25
ns
1
4.5
1
4.2
ns
1
4.7
1
4.8
ns
A to B or B to A
tEN
Output Enable Time
OE to A or B
tDIS
Output Disable Time
OE to A or B
NOTE:
1. The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance driven by an ideal voltage source
(zero output impedance).
3
IDT74CBTLV3126
LOW-VOLTAGE QUADRUPLE BUS SWITCH
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
SAME PHASE
INPUT TRANSITION
TEST CONDITIONS
Symbol
VCC = 2.5V±0.2V
Unit
VLOAD
6
2 x Vcc
V
VIH
3
Vcc
V
VT
1.5
Vcc / 2
V
(2)
VLZ
300
150
mV
VHZ
300
150
mV
CL
50
30
pF
500Ω
VIN
tPHL
VIH
VT
0V
DISABLE
ENABLE
CONTROL
INPUT
GND
tPZL
VOUT
D.U.T.
RT
tPLH
Propagation Delay
Open
(1, 2)
tPHL
OPPOSITE PHASE
INPUT TRANSITION
VLOAD
VCC
Pulse
Generator
tPLH
OUTPUT
VCC(1)= 3.3V±0.3V
OUTPUT
SWITCH
NORMALLY CLOSED
LOW
tPZH
OUTPUT SWITCH
NORMALLY
OPEN
HIGH
500Ω
CL
tPLZ
VLOAD/2
VT
tPHZ
VT
0V
Test Circuits for All Outputs
Enable and Disable Times
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
NOTES:
1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2.5ns.
SWITCH POSITION
Test
Switch
tPLZ/tPZL
VLOAD
tPHZ/tPZH
GND
tPD
Open
VIH
VT
0V
VOH
VT
VOL
4
VIH
VT
0V
VLOAD/2
VOL + VLZ
VOL
VOH
VOH -VHZ
0V
IDT74CBTLV3126
LOW-VOLTAGE QUADRUPLE BUS SWITCH
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT
XX
CBTLV
Temp. Range
XXXX
Device Type
X
Package
PG
PGG
Q
QG
Thin Shrink Small Outline Package
TSSOP - Green
Quarter Small Outline Package
QSOP - Green
3126 Low-Voltage Quadruple Bus Switch
74
-40°C to +85°C
DATASHEET DOCUMENT HISTORY
07/14/2008
pg. 1.
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5
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