ONSEMI NCS37005DARG

NCS37005
Product Preview
Ground Fault Interrupter
(GFI)
Description
The NCS37005 is a signal processor for GFI applications. The
device integrates a flexible power supply (including both shunt and
LDO regulators), and differential fault detection circuits. The
proprietary fault processing circuitry offers high performance with
low turns ratio ferrite current transformers. The device also includes a
specialized DSP controller that offers best in class immunity to
nuisance loads without the need for external analog filters.
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16
1
QFN 16
MN SUFFIX
CASE 485G
TSSOP 16
DA SUFFIX
CASE 948F
1
Features
•
•
•
•
•
•
•
•
•
•
Series Impedance)
−40 to 85°C
Very Low Power Consumption: <5 mW @ 5 V
16 Pin QFN Package
Low Cost/Turns Ratio Ferrite Current Transformer (CT) Detection of
Differential
Self Syncing Internal Oscillator Adjusts to AC Mains Frequency to
Guarantee Full Resolution on 50 and 60 Hz Distribution Systems
Optimized Solenoid Deployment (coil is not energized near the AC
mains zero crossings)
Randomized Testing Sequence to Minimize Noise and Potential
Interactions on the AC Mains
>5 mA SCR Driver for Additional Immunity to Supply
Noise/Interference
Superior Immunity to Nuisance Loads/Noise (up to 10 A) without
Loss of Detection Capability or CT Saturation
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MARKING DIAGRAM
XXXXX
ALYWG
CCCCC
XXXXX
A
L
Y
W
G or G
CCCCC
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
= Country of Origin
PIN CONNECTIONS
Supply
SCRdrv
• 6.0 – 18 Volt Operation (120 − 480 V AC Mains with the Appropriate
MLD
CTresGN
CTbias
CTstim
1
GND
(Top View)
Typical Applications
CTresD
IDF
• Load Panel GFI/RCD Breakers
• GFI Receptacles
• In−line GFI Circuits (power cords)
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
ORDERING INFORMATION
Device
Package
Shipping†
NCS37005MNTWG
QFN16
Tape & Reel
NCS37005MNG
QFN16
Tube
NCS37005DARG
TSSOP20
Tape & Reel
NCS37005DAG
TSSOP20
Tube
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2012
April, 2012 − Rev. P0
1
Publication Order Number:
NCS37005/D
Supply
NCS37005
−
HV
Bandgap
Brown
Out
+
AVDD/
DVDD
−
+
POR
CTresGN
Grounded Neutral
Detection
IDF
Low
Pass
Filter
Differential Current
Detection
SCRdrv
Mixer
Self
Trimmed
RC Osc
CTresD
Control Logic and
Digital Filter
TE
Offset
Correction
Driver
CTstim
Waveform
Generator
TestDin1−5
TestDout1−2
Vbias
MLD
G2N
Randomizer
VSS
CTbias
Figure 1. Simplified Block Diagram
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2
Mains Level
Detect (Zero
Cross)
NCS37005
Table 1. PIN FUNCTION DESCRIPTION − QFN
Pin #
Name
Pad Description
0
Ground
1
MLD
2
CTtest
Test port (Must be tied to CTbias in functional mode).
3
CTbias
2 V reference that is connected to the external CT sensor
4
CTstim
Differential current measurement port for external CT
5
CTresD
Determines IV converter gain for detection threshold / matched to CT turns ratio (Differential Current)
6
IDF
Front end noise filter capacitor
7
NC
Tie to Ground or leave floating
8
NC
Tie to Ground or leave floating
QFN center slug
Mains Level Detect (Zero Cross)
9
NC
Tie to Ground or leave floating
10
NC
Tie to Ground or leave floating
11
NC
Tie to Ground or leave floating
12
NC
Tie to Ground or leave floating
13
NC
Float
14
NC
Float
15
SCRdrv
Used to trigger the solenoid at a fault detection
16
Supply
Power supply
Table 2. PIN FUNCTION DESCRIPTION − TSSOP
Pin #
Name
Pad Description
1
CTstim
Differential current measurement port for external CT
2
Ground
Main ground connection for IC.
3
CTresD
Determines IV converter gain for detection threshold / matched to CT turns ratio (Differential Current)
4
IDF
Front end noise filter capacitor
5
TE
Test enable
6
NC
Tie to Ground or leave floating
7
NC
Tie to Ground or leave floating
8
NC
Tie to Ground or leave floating
9
NC
Tie to Ground or leave floating
10
NC
Tie to Ground or leave floating
11
NC
Float
12
NC
Float
13
SCRdrv
Used to trigger the solenoid at a fault detection
14
Supply
Power supply
15
MLD
16
CTbias
Mains Level Detect (Zero Cross)
2 V reference that is connected to the external CT sensor
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3
NCS37005
Table 3. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Supply Voltage Range
Vs
6.0 to 19 V
V
Input Voltage Range (Note 1)
Vin
−0.3 to 6.0
V
Output Voltage Range
Vout
−0.3 to 6.0 V or (Vin + 0.3),
whichever is lower
V
Maximum Junction Temperature
TJ(max)
140
°C
Storage Temperature Range
TSTG
−65 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2
kV
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
TSLD
260
°C
Lead Temperature Soldering
Reflow (SMD Styles Only), Pb−Free Versions (Note 3)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating: v150 mA per JEDEC standard: JESD78
3. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
Table 4. THERMAL CHARACTERISTICS
Rating
Symbol
Value
RθJA
RψJL
64
Thermal Characteristics, QFN16, 3x3.3 mm (Note 4)
Thermal Resistance, Junction−to−Air (Note 5)
Thermal Reference, Junction−to−Lead2 (Note 5)
Thermal Characteristics, TSOP−5 (Note 4)
Thermal Resistance, Junction−to−Air (Note 5)
Unit
°C/W
°C/W
RθJA
4. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
5. Values based on copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate.
Table 5. OPERATING RANGES (Note 6)
Parameter
Conditions
Operating Temperature
Min
Typ
−40
IDD
Max
Units
85
C
2
SCR Trigger Current
mA
8
SCR Trigger output voltage
With 5 V supply
4.5
Fault Current Sensitivity
Ground Fault with ±1% resistor for RctresD
4.5
Ground Fault Response Time
mA
5
V
5.5
mA
5−20 mA
150
ms
Ground Fault Response Time
20−100 mA
75
ms
Ground Fault Response Time
>100 mA
25
ms
CT Turns Ratio
5
100
Internal Oscillator Frequency
300
2
CT Driver Closed Loop BW
MHz
500
6. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
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4
KHz
NCS37005
APPLICATIONS INFORMATION
Q1
Solenoid
Rmains
Dx
Full Wave Rectifier
or
Switch mode supply
T1
SCRdrv
Csup
Supply
Rzc
MLD
CTresGN
Cgn
CTbias
CTresD
IDF
CTstim
Cidf
RctD
Figure 2. Typical Application Schematic
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5
NCS37005
RECOMMENDED EXTERNAL COMPONENTS:
Component Type
Instance
Value
Note
SCR
Q1
−
ON−MCR08
Diode
Dx
−
ON−1N4007
Capacitor
Csup
1 − 4.7 mF
For a full bridge rectifier
Capacitor
Cidf
180 − 220 nF
Differential current filtering
Resistor
RctD
20 − 70 K
Matched to current transformer
Resistor
Rzc
400 − 800 K
Zero cross detection resistor. Value limits current
Resistor
Rmains
10 − 45 K
For a full bridge rectifier
TVS
T1
−
~250 − 400 V
Filtering
Setting Trip Sensitivity
The analog signal capture portion of the IC includes a
single pole filter that can be set externally with Cidf. This
provides an additional layer of protection against false
tripping under steady state noise conditions. High frequency
steady state noise is common with pumps, motors or other
cyclic noise generators.
Cidf = 220 nF = 1 KHz low pass.
The CTresD resistor sets the threshold for the differential
current fault levels. Increasing CTresD causes the fault
levels to trip at lower differential currents. CT efficiency at
60 Hz must be considered.
. CTresD= 400*#Turns – Subject to CT efficiency at 60 Hz
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6
NCS37005
PACKAGE DIMENSIONS
TSSOP−16
CASE 948F−01
ISSUE B
16X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
S
V
S
K
S
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
K1
2X
L/2
16
9
J1
B
−U−
L
SECTION N−N
J
PIN 1
IDENT.
N
8
1
0.25 (0.010)
M
0.15 (0.006) T U
S
A
−V−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
N
F
DETAIL E
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
D
H
G
DETAIL E
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
SOLDERING FOOTPRINT
7.06
1
0.65
PITCH
16X
0.36
16X
1.26
DIMENSIONS: MILLIMETERS
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7
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
−−−
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.18
0.28
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
INCHES
MIN
MAX
0.193 0.200
0.169 0.177
−−− 0.047
0.002 0.006
0.020 0.030
0.026 BSC
0.007
0.011
0.004 0.008
0.004 0.006
0.007 0.012
0.007 0.010
0.252 BSC
0_
8_
NCS37005
PACKAGE DIMENSIONS
QFN16 3x3, 0.5P
CASE 485G−01
ISSUE F
D
ÇÇÇ
ÇÇÇ
ÇÇÇ
PIN 1
LOCATION
2X
A
B
DETAIL A
ALTERNATE TERMINAL
CONSTRUCTIONS
E
ÉÉ
ÉÉ
EXPOSED Cu
0.10 C
TOP VIEW
(A3)
DETAIL B
0.05 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L1
0.10 C
2X
L
L
A1
DETAIL B
A
0.05 C
ÉÉ
ÇÇ
ÉÉ
A3
MOLD CMPD
ALTERNATE
CONSTRUCTIONS
NOTE 4
A1
SIDE VIEW
C
16X
L
RECOMMENDED
SOLDERING FOOTPRINT*
D2
8
4
16X
MILLIMETERS
MIN
NOM MAX
0.80
0.90
1.00
0.00
0.03
0.05
0.20 REF
0.18
0.24
0.30
3.00 BSC
1.65
1.75
1.85
3.00 BSC
1.65
1.75
1.85
0.50 BSC
0.18 TYP
0.30
0.40
0.50
0.00
0.08
0.15
SEATING
PLANE
0.10 C A B
DETAIL A
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
L1
9
E2
K
16X
0.58
PACKAGE
OUTLINE
1
2X
1
2X
1.84 3.30
16
e
e/2
BOTTOM VIEW
16X
b
0.10 C A B
0.05 C
16X
0.30
NOTE 3
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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PUBLICATION ORDERING INFORMATION
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8
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Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCS37005/D