ONSEMI MC74LCX07_12

MC74LCX07
Low-Voltage CMOS Hex
Buffer with Open Drain
Outputs
With 5 V−Tolerant Inputs
The MC74LCX07 is a high performance hex buffer operating from
a 2.3 to 3.6 V supply. High impedance TTL compatible inputs
significantly reduce current loading to input drivers. These LCX
devices have open drain outputs which provide the ability to set output
levels, or do active−HIGH AND or active−LOW OR functions. A VI
specification of 5.5 V allows MC74LCX07 inputs to be safely driven
from 5.0 V devices.
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MARKING
DIAGRAMS
14
14
1
Features
•
•
•
•
•
•
•
LCX07G
AWLYWW
1
Designed for 2.3 to 3.6 V VCC Operation
5.0 V Tolerant Inputs/Outputs
14
14
LVTTL Compatible
LVCMOS Compatible
1
24 mA Output Sink Capability
Near Zero Static Supply Current (10 mA) Substantially Reduces
System Power Requirements
Latchup Performance Exceeds 500 mA
•
• Wired−OR, Wired−AND
• Output Level Can Be Set Externally Without Affecting Speed of
•
SOIC−14
D SUFFIX
CASE 751A
Device
ESD Performance:
Human Body Model >1500 V;
Machine Model >200 V
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
VCC
A3
O3
A4
O4
A5
O5
14
13
12
11
10
9
8
1
2
3
4
5
6
7
A0
O0
A1
O1
A2
O2
GND
TSSOP−14
DT SUFFIX
CASE 948G
1
LCX
07
ALYWG
G
A
= Assembly Location
L, WL
= Wafer Lot
Y, YY
= Year
W, WW = Work Week
G
= Pb−Free Package
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Figure 1. Pinout: 14−Lead (Top View)
© Semiconductor Components Industries, LLC, 2012
July, 2012 − Rev. 13
1
Publication Order Number:
MC74LCX07/D
MC74LCX07
A0
A1
A2
A3
A4
A5
1
3
5
13
11
9
*
2
*
4
*
6
*
12
*
10
*
8
O0
PIN NAMES
O1
O2
O3
Pins
Function
An
On
Data Inputs
Outputs
TRUTH TABLE
O4
An
On
O5
L
H
L
Z
* OD
Figure 2. Logic Diagram
MAXIMUM RATINGS
Symbol
Parameter
Value
VCC
DC Supply Voltage
VI
DC Input Voltage
−0.5 v VI v +7.0
VO
DC Output Voltage
−0.5 v VO v +7.0
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IO
DC Output/Sink Current
ICC
DC Supply Current Per Supply Pin
IGND
DC Ground Current Per Ground Pin
TSTG
Storage Temperature Range
MSL
Moisture Sensitivity
Condition
−0.5 to +7.0
Unit
V
V
Output in HIGH or LOW State (Note 1)
V
−50
VI < GND
mA
−50
VO < GND
mA
+50
VO > VCC
mA
+50
mA
$100
mA
$100
mA
−65 to +150
°C
Level 1
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. IO absolute maximum rating must be observed.
ORDERING INFORMATION
Package
Shipping†
MC74LCX07DG
SOIC−14
(Pb−Free)
55 Units / Rail
MC74LCX07DR2G
SOIC−14
(Pb−Free)
2500 Tape & Reel
MC74LCX07DTG
TSSOP−14
(Pb−Free)
96 Units / Rail
MC74LCX07DTR2G
TSSOP−14
(Pb−Free)
2500 Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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2
MC74LCX07
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Operating
Data Retention Only
Min
Typ
Max
Unit
2.0
1.5
2.3 to 3.3
5.5
5.5
V
0
5.5
V
0
5.5
V
VCC
Supply Voltage
VI
Input Voltage
VO
Output Voltage
IOH
HIGH Level Output Current
VCC= 3.0 V−3.6 V
VCC= 2.7 V−3.0 V
VCC= 2.3 V−2.7 V
−24
−12
−8
mA
IOL
LOW Level Output Current
VCC = 3.0 V−3.6 V
VCC = 2.7 V−3.0 V
VCC = 2.3 V−2.7 V
+24
+12
+8
mA
TA
Operating Free−Air Temperature
−40
+85
°C
Dt/DV
Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V
0
10
ns/V
(HIGH or LOW State)
DC ELECTRICAL CHARACTERISTICS
TA = −40°C to +85°C
Symbol
VIH
VIL
VOL
Characteristic
HIGH Level Input Voltage (Note 2)
LOW Level Input Voltage (Note 2)
LOW Level Output Voltage
Condition
2.3 V ≤ VCC ≤ 2.7 V
Min
Max
Unit
V
2.7 V ≤ VCC ≤ 3.6 V
2.0
4.5 V ≤ VCC ≤ 5.25 V
2.3 V ≤ VCC ≤ 2.7 V
3.125
0.7
V
2.7 V ≤ VCC ≤ 3.6 V
0.8
1.7
4.5 V ≤ VCC ≤ 5.25 V
0.8
2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 mA
0.2
VCC = 2.3 V; IOL= 8 mA
0.3
VCC = 2.7 V; IOL= 12 mA
0.4
VCC = 3.0 V; IOL = 16 mA
0.4
V
VCC = 3.0 V; IOL = 24 mA
0.55
VCC = 3.6 V, VIN = VIH or VIL,
VOUT = 0 to 3.6 V
$5
mA
VCC = 0, VIN = 3.6 V or VOUT = 3.6 V
10
mA
VCC = 0 to 3.6 V, VIN = 3.6 V or GND
$5
mA
VCC = 3.6 V, VIN = 3.6 V or VOUT = 3.6 V
10
mA
500
1.0
10
mA
mA
mA
IOZ
3−State Output Current
IOFF
Power Off Leakage Current
IIN
Input Leakage Current
ICC
Quiescent Supply Current
DICC
Increase in ICC per Input
2.3 V ≤ VCC ≤ 3.6 V
4.5 V ≤ VCC ≤ 5.5 V
VCC = 5.25 V, one input at 3.125 V, other
inputs at VCC or GND
2. These values of VI are used to test DC electrical characteristics only.
AC ELECTRICAL CHARACTERISTICS
Limits
TA= −405C to +855C
Symbol
tPLZ
tPZL
Parameter
Propagation Delay
Input to Output
VCC = 3.3 V $ 0.3 V
VCC= 2.7 V
CL= 50 pF
CL= 50 pF
VCC = 2.5 V $ 0.2 V
CL= 30 pF
Min
Max
Min
Max
Min
Max
Unit
0.5
0.5
3.0
3.0
0.8
0.8
3.7
3.7
0.8
0.8
3.8
3.8
ns
ns
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3
MC74LCX07
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25°C
Symbol
Characteristic
Min
Condition
Typ
Max
Unit
VOLP
Dynamic LOW Peak Voltage (Note 3)
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH =2.5 V, VIL = 0 V
0.9
0.7
V
VOLV
Dynamic LOW Valley Voltage (Note 3)
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
−0.8
−0.6
V
3. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
CIN
Input Capacitance
COUT
Output Capacitance
CPD
Power Dissipation Capacitance
Condition
Typical
Unit
VCC = 3.3 V, VI = 0 V or VCC
7
pF
VCC = 3.3 V, VI = 0 V or VCC
8
pF
10 MHz, VCC = 3.3 V, VI = 0 V or VCC
25
pF
VCC
Vmi
An
Vmi
0V
tPZL
On
tPLZ
Vmo
VLZ
VOL
PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1MHz; tW = 500 ns
VCC
Symbol
3.3 V $ 0.3 V
2.7 V
2.5 V $ 0.2 V
Vmi
1.5 V
1.5 V
VCC/2
Vmo
1.5 V
1.5 V
VCC/2
VLZ
VOL + 0.3 V
VOL + 0.3 V
VOL + 015 V
Figure 3. AC Waveforms
VCC
6 V or VCC 2
R1
PULSE
GENERATOR
DUT
RT
CL
TEST
SWITCH
tPZL, tPLZ
6V
Open Collector/Drain tPLH and tPHL
6V
tPZH, tPHZ
CL =
CL =
RL =
RT =
RL
GND
50 pF at VCC = 3.3 "0.3 V or equivalent (includes jig and probe capacitance)
30 pF at VCC = 2.5 "0.2 V or equivalent (includes jig and probe capacitance)
R1 = 500 W or equivalent
ZOUT of pulse generator (typically 50 W)
Figure 4. Test Circuit
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4
GND
MC74LCX07
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G−01
ISSUE B
14X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
S
N
2X
14
L/2
0.25 (0.010)
8
M
B
−U−
L
PIN 1
IDENT.
N
F
7
1
0.15 (0.006) T U
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
S
DETAIL E
K
A
−V−
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
K1
J J1
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
SECTION N−N
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
D
H
G
DETAIL E
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
14X
0.36
14X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
MILLIMETERS
INCHES
MIN
MAX
MIN MAX
4.90
5.10 0.193 0.200
4.30
4.50 0.169 0.177
−−−
1.20
−−− 0.047
0.05
0.15 0.002 0.006
0.50
0.75 0.020 0.030
0.65 BSC
0.026 BSC
0.50
0.60 0.020 0.024
0.09
0.20 0.004 0.008
0.09
0.16 0.004 0.006
0.19
0.30 0.007 0.012
0.19
0.25 0.007 0.010
6.40 BSC
0.252 BSC
0_
8_
0_
8_
MC74LCX07
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−A−
14
8
−B−
P 7 PL
0.25 (0.010)
M
7
1
G
−T−
0.25 (0.010)
M
T B
S
A
DIM
A
B
C
D
F
G
J
K
M
P
R
J
M
K
D 14 PL
F
R X 45 _
C
SEATING
PLANE
B
M
S
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337 0.344
0.150 0.157
0.054 0.068
0.014 0.019
0.016 0.049
0.050 BSC
0.008 0.009
0.004 0.009
0_
7_
0.228 0.244
0.010 0.019
SOLDERING FOOTPRINT*
7X
7.04
14X
1.52
1
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
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particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
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6
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For additional information, please contact your local
Sales Representative
MC74LCX07/D