DCR4330M52 Phase Control Thyristor Preliminary Information DS5941-2 June 2010 (LN 27324) KEY PARAMETERS FEATURES Double Side Cooling High Surge Capability VDRM IT(AV) ITSM dV/dt* dI/dt 5200V 4325A 53400A 2000V/µs 400A/µs * Higher dV/dt selections available APPLICATIONS High Power Drives High Voltage Power Supplies Static Switches VOLTAGE RATINGS Part and Ordering Number DCR4330M52* DCR4330M50 DCR4330M45 Repetitive Peak Voltages VDRM and VRRM V 5200 5000 4500 Conditions Tvj = -40°C to 125°C, IDRM = IRRM = 300mA, VDRM, VRRM tp = 10ms, VDSM & VRSM = VDRM & VRRM + 100V respectively Lower voltage grades available. o o *5000V @ -40 C, 5200V @ 0 C (See Package Details for further information) Fig. 1 Package outline ORDERING INFORMATION When ordering, select the required part number shown in the Voltage Ratings selection table. For example: DCR4330M52 Note: Please use the complete part number when ordering and quote this number in any future correspondence relating to your order. 1/10 www.dynexsemi.com DCR4330M52 SEMICONDUCTOR CURRENT RATINGS Tcase = 60°C unless stated otherwise Symbol Parameter Test Conditions Max. Units 4325 A Double Side Cooled IT(AV) Mean on-state current IT(RMS) RMS value - 6790 A Continuous (direct) on-state current - 6250 A IT Half wave resistive load SURGE RATINGS Symbol ITSM 2 It Parameter Surge (non-repetitive) on-state current Test Conditions Max. Units 10ms half sine, Tcase = 125°C 53.4 kA VR = 0 14.25 MA s Min. Max. Units 2 I t for fusing 2 THERMAL AND MECHANICAL RATINGS Symbol Rth(j-c) Rth(c-h) Parameter Thermal resistance – junction to case Thermal resistance – case to heatsink Test Conditions Double side cooled DC - 0.00518 °C/W Single side cooled Anode DC - 0.01012 °C/W Cathode DC - 0.01080 °C/W Double side - 0.001 °C/W - 0.002 °C/W - 125 °C Clamping force 83.0kN (with mounting compound) Blocking VDRM / VRRM Single side Tvj Virtual junction temperature Tstg Storage temperature range -55 125 °C Fm Clamping force 74.0 91.0 kN 2/10 www.dynexsemi.com DCR4330M52 SEMICONDUCTOR DYNAMIC CHARACTERISTICS Symbol IRRM/IDRM Parameter Test Conditions Min. Max. Units Peak reverse and off-state current At VRRM/VDRM, Tcase = 125°C - 300 mA dV/dt Max. linear rate of rise of off-state voltage To 67% VDRM, Tj = 125°C, gate open - 2000 V/µs dI/dt Rate of rise of on-state current From 67% VDRM to 2x IT(AV) Repetitive 50Hz - 400 A/µs Gate source 30V, 10, Non-repetitive - 1000 A/µs tr < 0.5µs, Tj = 125°C VT(TO) rT tgd Threshold voltage – Low level 1000 to 2600A at Tcase = 125°C - 0.85 V Threshold voltage – High level 2600 to 9000A at Tcase = 125°C - 0.99 V On-state slope resistance – Low level 1000 to 2600A at Tcase = 125°C - 0.2115 m On-state slope resistance – High level 2600 to 9000A at Tcase = 125°C - 0.1578 m VD = 67% VDRM, gate source 30V, 10 - 3 µs 750 µs 4030 5420 µC 49 59 A Delay time tr = 0.5µs, Tj = 25°C tq Turn-off time Tj = 125°C, VR = 200V, dI/dt = 1A/µs, dVDR/dt = 20V/µs linear QS Stored charge IT = 3000A, Tj = 125°C, dI/dt – 1A/µs, VRpeak ~3100V, VR ~ 2100V IRR Reverse recovery current IL Latching current Tj = 25°C, VD = 5V - 3 A IH Holding current Tj = 25°C, RG-K = , ITM = 500A, IT = 5A - 300 mA 3/10 www.dynexsemi.com DCR4330M52 SEMICONDUCTOR GATE TRIGGER CHARACTERISTICS AND RATINGS Symbol Parameter Test Conditions Max. Units VGT Gate trigger voltage VDRM = 5V, Tcase = 25°C 1.5 V VGD Gate non-trigger voltage At 50% VDRM, Tcase = 125°C 0.4 V IGT Gate trigger current VDRM = 5V, Tcase = 25°C 300 mA IGD Gate non-trigger current At 50% VDRM, Tcase = 125°C 10 mA CURVES 9000 min @ 125ºC max @ 125ºC max @ 25ºC min @ 25ºC Instantaneous on-staate current,TI- (A) 8000 7000 6000 5000 4000 3000 2000 1000 0 0 0.5 1 1.5 2 2.5 Instantaneous on-state voltage , VT - (V) Fig.2 Maximum & minimum on-state characteristics VTM EQUATION VTM = A + Bln (IT) + C.IT+D.IT Where A = 0.061592 B = 0.115333 C = 0.000119 D = 0.002394 these values are valid for Tj = 125°C for IT 250A to 9000A 4/10 www.dynexsemi.com DCR4330M52 SEMICONDUCTOR 12 130 180 120 90 60 30 Maximum case temperature, Tcase ( o C ) Mean power dissipation - (kW) 10 180 120 90 60 30 120 8 6 4 2 110 100 90 80 70 60 50 40 30 20 10 0 0 0 500 1000 1500 2000 2500 3000 3500 4000 4500 0 500 1000 1500 2000 2500 3000 3500 4000 4500 Mean on-state current, IT(AV) - (A) Mean on-state current, IT(AV) - (A) Fig.3 On-state power dissipation – sine wave Fig.4 Maximum permissible case temperature, double side cooled – sine wave 180 120 90 60 30 100 75 50 16 d.c. 180 120 90 60 30 14 Mean power dissipation - (kW) T - ( ° C) Maximum heatsink temperature,Heatsink 125 12 10 8 6 4 25 2 0 0 0 0 500 1000 1500 2000 2500 3000 3500 4000 4500 Mean on-state current, IT(AV) - (A) Fig.5 Maximum permissible heatsink temperature, double side cooled – sine wave 500 1000 1500 2000 2500 3000 3500 4000 4500 Mean on-state current, IT(AV) - (A) Fig.6 On-state power dissipation – rectangular wave 5/10 www.dynexsemi.com DCR4330M52 SEMICONDUCTOR 125 T -(o C) Maximum heatsink temperature heatsink T -(° C) Maximum permissible case temperature ,case 125 100 75 50 d.c. 180 120 90 60 30 25 100 75 50 d.c. 180 120 90 60 30 25 0 0 0 500 1000 1500 2000 2500 3000 3500 4000 4500 0 500 1000 1500 2000 2500 3000 3500 4000 4500 Mean on-state current, IT(AV) - (A) Mean on-state current, IT(AV) - (A) Fig.7 Maximum permissible case temperature, double side cooled – rectangular wave Fig.8 Maximum permissible heatsink temperature, double side cooled – rectangular wave Double side cooled 12.0 Anode side cooled Anode Side Cooled. Transient Thermal Impedance, Zth - ( °C/kW ) 11.0 10.0 Double Side Cooled. Cathode side cooled Cathode Side Cooled. Ri (°C/kW) 1 2 1.995338 1.242784 Ti (s) Ri (°C/kW) 6.092995 1.957372 2.042252 0.035908 Ti (s) Ri (°C/kW) Ti (s) 0.05 3 1.9448 4 0.005 0.592935 0.592385 110.5108 5.459764 0.510898 0.05 110.1735 6.856845 1.876401 2.062845 0.025343 5.181139 0.557321 0.05 110.1546 9.0 i 4 Zth [Ri (1 exp(T / Ti )] 8.0 7.0 i 1 6.0 5.0 4.0 Rth(j-c) Conduction Tables show the increments of thermal resistance Rth(j-c) when the device operates at conduction angles other than d.c. 3.0 2.0 1.0 0.0 0.001 0.01 0.1 Time ( s ) 1 10 100 Double side cooling Zth (z) ° sine. rect. 180 0.51 0.36 120 0.57 0.49 90 0.64 0.56 60 0.70 0.63 30 0.74 0.71 15 0.76 0.74 Anode Side Cooling Zth (z) ° sine. rect. 180 0.51 0.36 120 0.58 0.50 90 0.65 0.57 60 0.71 0.64 30 0.75 0.71 15 0.77 0.75 Cathode Sided Cooling Zth (z) ° sine. rect. 180 0.51 0.36 120 0.58 0.50 90 0.65 0.57 60 0.71 0.64 30 0.75 0.71 15 0.77 0.75 Fig.9 Maximum (limit) transient thermal impedance – junction to case (°C/kW) 6/10 www.dynexsemi.com DCR4330M52 SEMICONDUCTOR 10 140 28 130 26 120 24 110 22 100 20 ITSM 90 18 80 16 I2t 70 14 60 12 50 10 Conditions: Tcase= 125°C VR = 0 half-sine wave 40 30 20 8 6 4 10 2 0 1 1 10 1 100 I2t (MA2s) Conditions: Tcase = 125°C VR =0 Pulse width = 10ms Surge current, ITSM - (kA) Surge current, TI SM- (kA) 100 0 100 10 Pulse width, tP - (ms) Number of cycles Fig.10 Multi-cycle surge current Fig.11 Single-cycle surge current 600 25000 Qsmax = 5413.5*(di/dt)0.4762 IRRmax = 58.296*(di/dt)0.7559 500 I - (A) Reverse recovery current,RR Stored Charge, Qs - (uC) 20000 15000 Qsmin = 4030.8*(di/dt)0.5002 10000 Conditions: Tj= 125ºC VRpeak ~ 3100V VRM ~ 2100V snubber as appropriate to control reverse voltage 5000 400 300 IRRmin = 49.567*(di/dt)0.7701 200 Conditions : Tj = 125ºC VRpeak ~ 3100V VRM ~ 2100V snubber as appropriate to control reverse voltage 100 0 0 0 5 10 15 20 25 Rate of decay of on-state current, di/dt - (A/us) Fig.12 Stored charge 0 5 10 15 20 25 Rate of decay of on-state current, di/dt - (A/us) Fig.13 Reverse recovery current 7/10 www.dynexsemi.com DCR4330M52 SEMICONDUCTOR 10 Gate trigger voltage, VGT - (V) 9 Pulse Width us 100 200 500 1000 10000 8 7 Pulse Power PGM (Watts) Frequency Hz 50 100 150 150 150 150 150 150 150 100 20 - 400 150 125 100 25 - Upper Limit 6 5 Preferred gate drive area 4 3 2 Tj = -40oC Tj = 25oC Lower Limit Tj = 125oC 1 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Gate trigger current IGT, - (A) Fig14 Gate Characteristics 30 Lower Limit Upper Limit 5W 10W 20W 50W 100W 150W -40C Gate trigger voltage, VGT - (V) 25 20 15 10 5 0 0 1 2 3 4 5 6 7 8 9 10 Gate trigger current, IGT - (A) Fig. 15 Gate characteristics 8/10 www.dynexsemi.com DCR4330M52 SEMICONDUCTOR PACKAGE DETAILS For further package information, please contact Customer Services. All dimensions in mm, unless stated otherwise. DO NOT SCALE. Device 22CT93M 28CT93M 42CT93M DCR4330M52 DCR3480M65 DCR2760M85 Maximum Minimum Thickness Thickness (mm) (mm) 25.815 25.305 25.89 25.38 26.12 25.61 26.26 25.75 26.5 25.99 26.84 26.33 Nominal weight: 1950g Lead length: 420mm Lead terminal connector: M4 ring Package outline type code: M Fig.16 Package outline 9/10 www.dynexsemi.com DCR4330M52 SEMICONDUCTOR IMPORTANT INFORMATION: The products and data in this publication are intended for use by appropriately trained technical personnel. Due to the diversity of product applications, the information contained herein is provided as a guide only and does not constitute any guarantee of suitability for use in a specific application.The user must evaluate the suitability of the product and the completeness of the product data for the application. The user is responsible for product selection and ensuring all safety and any warning requirements are met. Should additional product information be needed please contact Customer Service. This publication is an uncontrolled document and is subject to change without notice. When referring to it, please ensure that it is the most up to date version and has not been superseded. The products are not intended for use in applications where a failure or malfunction may cause loss of life, injury or damage to property. The user must ensure that appropriate safety precautions are taken to prevent or mitigate the consequences of a product failure or malfunction. The products must not be touched when operating because there is a danger of electrocution or severe burning. Always use protective safety equipment such as appropriate shields for the product and wear safety glasses. Even when disconnected any electric charge remaining in the product must be discharged and allowed to cool before safe handling using protective gloves. Extended exposure outside the product ratings may affect reliability leading to premature product failure. Use outside the product ratings is likely to cause permanent damage to the product. In extreme conditions, as with all semiconductors, this may include potentially hazardous rupture, a large current to flow or high voltage arcing, resulting in fire or explosion. Appropriate application design and safety precautions should always be followed to protect persons and property. Product Status & Product Ordering: We annotate datasheets in the top right hand corner of the front page, to indicate product status if it is not yet fully approved for production. The annotations are as follows:Target Information: This is the most tentative form of information and represents a very preliminary specification. No actual design work on the product has been started. Preliminary Information: The product design is complete and final characterisation for volume production is in progress. The datasheet represents the product as it is now understood but details may change. No Annotation: The product has been approved for production and unless otherwise notified by Dynex any product ordered will be supplied to the current version of the data sheet prevailing at the time of our order acknowledgement. All products and materials are sold and services provided subject to the Company's conditions of sale, which are available on request. All brand names and product names used in this publication are trademarks, registered trademarks or trade names of their respective owners. HEADQUARTERS OPERATIONS CUSTOMER SERVICE DYNEX SEMICONDUCTOR LIMITED Doddington Road, Lincoln, Lincolnshire, LN6 3LF United Kingdom. Phone: +44 (0) 1522 500500 Fax: +44 (0) 1522 500550 Web: http://www.dynexsemi.com Phone: +44 (0) 1522 502753 / 502901 Fax: +44 (0) 1522 500020 e-mail: [email protected] Dynex Semiconductor Ltd. Technical Documentation – Not for resale. 10/10 www.dynexsemi.com