Ordering number : ENA1876B LV5692P Monolithic Linear IC Multi-Power Supply System IC for Car Audio Systems http://onsemi.com Overview LV5692P is a multiple voltage regulator for car audio system, which allows reduction of quiescent current. This IC has 5 systems of voltage regulator pre-driver for P-FET which generates USB power and a high side switch for external devices. The following protection circuits are integrated: over current protector, overvoltage protector and Thermal Shut Down. This IC is suitable for use in car audio with USB port. Features • Five channel regulator and one channel P-FET pre-driver (for USB-power) For VDD: VOUT is 3.3V, IOmax is 300mA For DSP: VOUT is 3.3V, IOmax is 300mA For CD: VOUT is 8.0V, IOmax is 1300mA For illumination: VOUT is 8.4V, IOmax is 500mA For audio systems: VOUT is 8.4V, IOmax is 500mA For USB (controller), VOUT is flexible (configurable with external resistor), IOmax is 1000mA • High side switch: Voltage difference between input and output is 0.5V, IOmax is 500mA • Over current protector • Overvoltage protector (Without VDD-OUT) Clamp voltage is 21V (typical) • Thermal Shut down 175ºC (typical) • Quiescent current 50μA (Typ. when only VDD is in operation) (Warning) The protector functions only improve the IC’s tolerance and they do not guarantee the safety of the IC if used under the conditions out of safety range or ratings. Use of the IC such as use under over current protection range or thermal shutdown state may degrade the IC’s reliability and eventually damage the IC. Semiconductor Components Industries, LLC, 2013 August, 2013 O2611 SY 20111018-S00001/D2210 SY/N2410 SY No.A1876-1/14 LV5692P Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Conditions Power supply voltage VCC max Power dissipation Pd max Conditions Ratings Ta ≤ 25°C IC unit At using Al heat sink At infinity heat sink Peak voltage VCC peak Unit 36 V 1.5 W 5.6 W 32.5 W 50 V Regarding Bias wave, refer to below the pulse. Junction temperature Tj max 150 °C Operating temperature Topr -40 to +85 °C Storage temperature Tstg -55 to +150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Recommended Operating range at Ta = 25°C Parameter Conditions Power supply voltage rating 1 VDD output ON, DSP output ON Power supply voltage rating 2 ILM output ON Power supply voltage rating 3 Audio output ON, CD output ON Ratings Unit 7 to 16 V 10.8 to 16 V 10 to 16 V * VCC1 should be as follows: VCC1>VCC-0.7V Electrical Characteristics at Ta = 25°C, VCC = VCC1=14.4V Parameter Symbol Ratings Conditions min Current drain ICC typ VDD no load, CTRL1/2/3 = ⎡L/L/L⎦ Unit max μA 50 100 0.3 V 1.65 2.1 V 5.5 V 520 kΩ 0.3 V CTRL1 Input Low input voltage VIL1 0 Middle input voltage VIM1 1.1 High input voltage VIH1 2.5 Input impedance RIH1 280 Low input voltage VIL2 0 Middle1 input voltage VIM12 0.8 1.06 1.4 V Middle2 input voltage VIM22 1.9 2.13 2.4 V High input voltage VIH2 2.9 3.2 5.5 V Input impedance RIH2 280 400 520 kΩ 400 CTRL2 Input CTRL3 input. Low input voltage VIL3 0 0.3 V High input voltage VIH3 2.5 5.5 V Input impedance RIH3 280 400 520 kΩ 3.3 3.45 V VDD3.3V output Output voltage VO1 IO1 = 200mA 3.16 Output current IO1 VO1 ≥ 3.1V 300 Line regulation ΔVOLN1 7.5V < VCC1 < 16V, IO1 = 200mA 30 100 mV Load regulation ΔVOLD1 1mA < IO1 < 200mA 70 150 mV Ripple rejection RREJ1 f = 120Hz, IO1 = 200mA 30 mA 40 dB USB output: CTRL3 = ⎡H⎦ (When external power FET 2SJ650, it external resists 27kΩ, and 9.1kΩ is set) USB output voltage VO2 IO2 = 1000mA 4.75 USB output current IO2 VO2 ≥ 4.75V 1000 Line regulation ΔVOLN2 10V < VCC < 16V, IO2 = 1000mA Load regulation ΔVOLD2 10mA < IO2 < 1000mA Dropout voltage VDROP2 IO2 = 1000mA Ripple rejection RREJ1 f = 120Hz, IO2 = 1000mA 40 5 5.25 V 50 90 mV 100 150 mV 1.0 1.5 mA 50 V dB Continued on next page. No.A1876-2/14 LV5692P Continued from preceding page. Parameter Symbol Ratings Conditions min Unit typ max AUDIO (8.4V) Output ; CTRL1 = ⎡M or H⎦ AUDIO output voltage 1 VO3 IO3 = 400mA 8.0 AUDIO output current IO3 VO3 ≥ 8.0V 500 8.4 8.8 V Line regulation ΔVOLN3 10V < VCC < 16V, IO3 = 400mA 30 90 mV Load regulation ΔVOLD3 1mA < IO3 < 400mA 70 150 mV Dropout voltage 1 VDROP3 IO3 = 400mA 0.4 0.8 V 0.2 0.4 mA Dropout voltage 2 VDROP3’ IO3 = 200mA Ripple rejection RREJ3 f = 120Hz, IO3 = 400mA 40 50 IO4 = 400mA 8.0 8.4 8.8 V dB ILM (8.4V) Output ; CTRL2 = ⎡M1 or H⎦ ILM output voltage VO4 V ILM output current IO4 Line regulation ΔVOLN4 10.8V < VCC < 16V, IO4 = 400mA 30 90 mV Load regulation ΔVOLD4 1mA < IO4 < 400mA 70 150 mV Dropout voltage 1 VDROP4 IO4 = 400mA 1.0 1.5 V Dropout voltage 2 VDROP4’ IO4 = 200mA 0.7 1.05 Ripple rejection RREJ4 f = 120Hz, IO4 = 400mA Output voltage VO5 IO5 = 500mA Output current IO5 VO5 ≤ VCC-1.0 500 mA 40 50 VCC-1.0 VCC-0.5 V dB AMP_HS-SW; CTRL2 = ⎡M2 or H⎦ V 350 mA DSP(3.3V output); CTRL1 = ⎡M or H⎦ DSP output voltage VO7 DSP output current IO7 IO7 = 200mA 3.1 3.3 3.5 V Line regulation ΔVOLN7 10V < VCC < 16V, IO7 = 200mA 30 90 mV Load regulation ΔVOLD7 1mA < IO7 < 200mA 70 150 mV Ripple rejection RREJ7 f = 120Hz, IO7 = 200mA CD output voltage VO8 IO8 = 1000mA CD output current IO8 Line regulation ΔVOLN8 10.5V < VCC < 16V, IO8 = 1000mA Load regulation ΔVOLD8 Dropout voltage VDROP8 Ripple rejection RREJ8 f = 120Hz, IO8 = 1000mA 300 mA 40 50 7.6 8.0 dB CD(8.0V output); CTRL1 = ⎡H⎦ 8.4 V 1300 mA 50 100 mV 10mA < IO8 < 1000mA 100 200 mV IO8 = 1000mA 1.0 1.5 40 V 50 dB Package Dimensions unit : mm (typ) 3395 • Allowable power dissipation derating curve Pd max -- Ta 21.6 (20.0) HEAT SPREADER HEAT SINK (15.8) 3.0 (11.0) 3.35 12.4 (9.05) (14.55) 17.9 (9.6) (R1.75) 1 (1.91) 0.4 15 1.27 0.7 2.54 2.54 Allowable power dissipation, Pd max -- W 8 Aluminum heat sink mounting conditions tightening torque : 39N⋅cm, using silicone grease 7 Aluminum heat sink (50 × 50 × 1.5mm3) when using 6 5.6 5 4 3 2 Independent IC 1.5 1 0 0 20 40 60 80 100 120 140 150 160 Ambient temperature, Ta -- °C SANYO : HZIP15J No.A1876-3/14 LV5692P • Waveform applied during surge test 50V 90% 10% 16V 5msec 100msec CTRL Pin Output Truth Table CTRL1 CD DSP AUDIO CTRL3 USB L OFF OFF OFF L OFF M OFF ON ON H ON H ON ON ON EXT ILM CTRL2 0V 0V 0V CTRL2 EXT ILM L OFF OFF M1 OFF ON M2 ON OFF H ON ON Example of CTRL2 application circuit EXT ILM CTRL2 0V 3.3V 1.06V 3.3V 0V 2.13V 3.3V 3.3V 3.20V note) The control terminal is input 3.3V correspondence. Please set it by the input resistance at 5V input. No.A1876-4/14 LV5692P Block Diagram VCC EXT out Over Voltage Protection AMP_HS-SW(VCC-1V) 500mA Start up Vref + ILM output (8.4V) 500mA + AUDIO output (8.4V) CTRL1 500mA OUTPUT CTRL2 Control Ilim Recommendation FET:2SJ650 USB output (5V) + CTRL3 1000mA Thermal + CD output (8V) 1300mA Shut Down VCC1 GND + VCC VDD output (3.3V) 300mA + DSP output (3.3) 300mA No.A1876-5/14 LV5692P Pin Function Pin No. 1 Pin name ILM Description ILM output pin ON when CTRL2 = M1, H Equivalent Circuit VCC 15 8.4V/0.5A 1 2 GND 3 CD 2 GND 15 VCC GND pin CD output pin ON when CTRL1 = H 8.0V/1.3A 3 2 4 CTRL1 GND CTRL1 input pin 15 Three value input VCC 4 2 5 AUDIO AUDIO output pin ON when CTRL1 = M, H 15 GND VCC 8.4V/0.5A 5 2 GND Continued on next page. No.A1876-6/14 LV5692P Continued from preceding page. Pin No. 6 Pin name CTRL2 Description Equivalent Circuit CTRL2 input pin Four-value input VCC 15 6 2 7 DSP DSP output pin ON when CTRL1 = M, H GND VCC 15 3.3V/0.3A 7 2 8 CTRL3 GND CTRL3 input pin Two-value input VCC 15 8 2 9 FB USB-FB pin 1.26V GND 15 VCC 9 2 GND Continued on next page. No.A1876-7/14 LV5692P Continued from preceding page. Pin No. 10 Pin name USBGT Description Equivalent Circuit Pch-FET gate connect pin VCC 15 12.0V 10 2 11 EXT GND EXT output pin ON when CTRL2 = M2, H VCC 15 VCC-0.5V/500mA 11 2 12 RSNS GND USB current detection resistance connection pin 14.3V VCC 15 12 2 13 VDD VDD output pin 3.3V/0.3A GND VCC 15 13 2 14 VCC1 VDD power supply pin 15 VCC Power supply pin GND VCC 15 2 14 VCC1 GND No.A1876-8/14 LV5692P Timing Chart 21V VCC (15PIN) 21V VCC1 (14PIN) 4.5V VDD output (13PIN) CTRL1 input (4PIN) CTRL2 input (6PIN) CTRL3 input (8PIN) AUDIO output (5PIN) DSP output (7PIN) CD output (3PIN) ILM output (1PIN) EXT output (11PIN) USB output (FET-OUT) No.A1876-9/14 LV5692P CTRL2 C8 + C7 C6 + C5 C4 + C3 C2 + C1 ILM AUDIO CD DSP C18 + D2 C19 C17 VDD C13 R1 15 C15 C20 + C16 + CTRL3 C12 14 13 C14 + CTRL1 VCC1 RSNS 12 11 VCC 10 9 VDD 8 7 EXT USBGT CTRL3 CTRL2 6 5 FB 4 3 DSP 2 1 AUDIO CD ILM GND CTRL1 Recommended Operation Circuit D1 D3 R2 C11 C10 + EXT R3 VCC USB Peripheral parts list Name of part C2, C4, C6, C8, C11, C16 C1, C3, C5, C7, C10, C15 Description Recommended value Remarks Output stabilization capacitor 10μF or more* Electrolytic capacitor Output stabilization capacitor 0.22μF or more* Ceramic capacitor C12=1000pF Ceramic capacitor C12, C13 Capacity for phase amends C18, C20 Power supply bypass capacitor 100μF or more These capacitors must be placed near C17, C19 Oscillation prevention capacitor 0.22μF or more the VCC and GND pins. EXT output stabilization capacitor 2.2μF or more (C13=0pF: TBD) C14 R1, R2 R1/R2=9.1kΩ/27kΩ for 5.0V Resistor for ILM voltage adjustment R3 Resistor for AUDIO voltage setting M1 USB output Pch-FET D1 A resistor with resistance accuracy as low as less than ±1% must be used. 0.1Ω for Ipeak=3A Panasonic ERJB1CFR10U(Reference) 2SJ650 Diode for prevention of backflow D2, D3 Diode for internal element protection SB1003M3 note)The circuit diagram and the values are only tentative which are subject to change. * : Make sure that the capacitors of the output pins are 10μF or higher and ESR is 10Ω or lower in total and temperature characteristics and accuracy are taken into consideration. Also the E-cap should have good high frequency characteristics. • USB output voltage setting method Formula for USB voltage calculation 1.26[V] R1 × R2 + 1.26[V] R2 (USB-1.26) R1 = 1.26 VCC RSNS USBGT USB = 12 10 USB R2 1.26V 9 R1 The FB voltage is determined by the internal band gap voltage of the IC (typ = 1.26V) Please design so that the ratio of R1 and R2 may fill the above-mentioned expression for the set USB voltage. R2 (5.0-1.26) 2.968 R1 = 1.26 R2 27kΩ R1 = 9.1kΩ 2.967 USB = 1.26V × 2.967 + 1.26V 4.998V No.A1876-10/14 LV5692P • Since this IC does not detect the heat generation of the external FET, keep the temperature of the FET as low as possible so as not to exceed the eatings. • Recommended FET: 2SJ650. (note)The above values were obtained under typcal conditions. The values may fluctuate in manufacturing processes due to external resistor and IC variation. Output voltage • How to set USB overcurrent limit value (OCP) OCP of the USB works when the voltage of RSNS is under VCC-0.3V. The peak current value of OCP is calculated as follws: Ipeak(A) =0.3/R3. (ex.) R3=0.1Ω → Ipeak=3A Outout current Ipeak • Warning The internal circuit of USBGT and RSNS consist of components that support 5V. Do not bias 7V or above between VCC and these pins to prevent the IC from destruction. Caution for implementing LV5692P to a system board The package of LV5692P is HZIP15J which has some metal exposures other than connection pins and heatsink as shown in the diagram below. The electrical potentials of (2) and (3) are the same as those of pin 15 and pin 1, respectively. (2) (=pin 15) is the VCC pin and (3) (=pin 1) is the ILM (regulator) output pin. When you implement the IC to the set board, make sure that the bolts and the heatsink are out of touch from (2) and (3). If the metal exposures touch the bolts which has the same electrical potential with GND, GND short occurs in ILM output and VCC. The exposures of (1) are connected to heatsink which has the same electrical potential with substrate of the IC chip (GND). Therefore, (1) and GND electrical potential of the set board can connect each other. • HZIP15J outline Heat-sink 1 Same potential 2 15PIN Same potential 1PIN 3 Same potential Heat-sink 1 Same potential Heat-sink side 1 Heat-sink Same potential :Metal exposure Heat-sink side :Metal exposure <Top view of HZIP15J> <Side view of HZIP15J> No.A1876-11/14 LV5692P • Frame diagram (LV5692P) *In the system power supply other than LV5692P, pin assignment may differ. Metal exposure 1 Metal exposure 3 Metal exposure 2 Metal exposure 1 LV5692 Metal exposure 1 Metal exposure 1 1PIN 15PIN No.A1876-12/14 LV5692P HZIP15J Heat sink attachment Heat sinks are used to lower the semiconductor device junction temperature by leading the head generated by the device to the outer environment and dissipating that heat. a. Unless otherwise specified, for power ICs with tabs and power ICs with attached heat sinks, solder must not be applied to the heat sink or tabs. b. Heat sink attachment · Use flat-head screws to attach heat sinks. · Use also washer to protect the package. · Use tightening torques in the ranges 39-59Ncm(4-6kgcm) . · If tapping screws are used, do not use screws with a diameter larger than the holes in the semiconductor device itself. · Do not make gap, dust, or other contaminants to get between the semiconductor device and the tab or heat sink. · Take care a position of via hole . · Do not allow dirt, dust, or other contaminants to get between the semiconductor device and the tab or heat sink. · Verify that there are no press burrs or screw-hole burrs on the heat sink. · Warping in heat sinks and printed circuit boards must be no more than 0.05 mm between screw holes, for either concave or convex warping. · Twisting must be limited to under 0.05 mm. · Heat sink and semiconductor device are mounted in parallel. Take care of electric or compressed air drivers · The speed of these torque wrenches should never exceed 700 rpm, and should typically be about 400 rpm. Binding head machine screw Countersunk head mashine screw Heat sink gap Via hole c. Silicone grease · Spread the silicone grease evenly when mounting heat sinks. · Our company recommends YG-6260 (Momentive Performance Materials Japan LLC) d. Mount · First mount the heat sink on the semiconductor device, and then mount that assembly on the printed circuit board. · When attaching a heat sink after mounting a semiconductor device into the printed circuit board, when tightening up a heat sink with the screw, the mechanical stress which is impossible to the semiconductor device and the pin doesn't hang. e. When mounting the semiconductor device to the heat sink using jigs, etc., · Take care not to allow the device to ride onto the jig or positioning dowel. · Design the jig so that no unreasonable mechanical stress is not applied to the semiconductor device. f. Heat sink screw holes · Be sure that chamfering and shear drop of heat sinks must not be larger than the diameter of screw head used. · When using nuts, do not make the heat sink hole diameters larger than the diameter of the head of the screws used. A hole diameter about 15% larger than the diameter of the screw is desirable. · When tap screws are used, be sure that the diameter of the holes in the heat sink are not too small. A diameter about 15% smaller than the diameter of the screw is desirable. g. There is a method to mount the semiconductor device to the heat sink by using a spring band. But this method is not recommended because of possible displacement due to fluctuation of the spring force with time or vibration. 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