Ordering number : ENA2159A LV5696P Bi-CMOS IC System Power Supply IC for Automotive Infotainment Multiple Output Linear Voltage Regulator http://onsemi.com Overview The LV5696P is a multiple output linear regulator IC, which allows reduction of quiescent current. The LV5696P is specifically designed to address automotive infotainment systems power supply requirements. The LV5696P integrates 6 linear regulator outputs, a high side power switch, over current protection, overvoltage protection and thermal shutdown circuitry. Function • Low current consumption : typ 50μA • 6 system of regulators VDD (Micon) : VOUT 3.3/5.0V, IOUT MAX 200mA CD : VOUT 8.0V, IOUT MAX 1000mA Illumination : VOUT 3.0V to 8.0V (Adjustable external resistors), IOUT MAX 200mA Audio : VOUT 8.5V, IOUT MAX 300mA SYS : VOUT 5.0V, IOUT MAX 500mA DSP : VOUT 3.3V, IOUT MAX 800mA • 1 high-side switch coupled VCC ANT : IOUT MAX 200mA, VCC-VOUT = 0.5V • Over current protection • Over voltage protection typ 21V (All outputs except for VDD are turned off) • Thermal shut down circuit typ 175°C • Applied P-LDMOS to output stage HZIP15J (Warning) The protector functions only improve the IC’s tolerance and they do not guarantee the safety of the IC if used under the conditions out of safety range or ratings. Use of the IC such as use under overcurrent protection range, thermal shutdown state may degrade the IC’s reliability and eventually damage the IC. ORDERING INFORMATION See detailed ordering and shipping information on page 15 of this data sheet. Semiconductor Components Industries, LLC, 2014 March, 2014 32414NK/D1212NKPC 20121105-S00005 No.A2159-1/15 LV5696P Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Maximum supply voltage VCC max Power dissipation Pd max Conditions Ratings IC Unit At using Al heat sink of (50×50×1.5mm3) Infinite large heat sink Unit 36 V 1.5 W 5.6 W 32.5 W 50 V Peak voltage VCC peak See below about Pulse wave Operating temperature Topr -40 to +85 °C Storage temperature Tstg -55 to +150 °C Junction maximum temperature Tj max 150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Recommended Operating Conditions at Ta = 25°C Parameter Power supply voltage rating 1 Conditions Ratings VDD output, ANT output Unit 7.5 to 16 Power supply voltage rating 2 AUDIO output Power supply voltage rating 3 CD output, ILM output, SYS output, DSP output V 10.5 to 16 V 10 to 16 V *Make sure that VCC1 is as follows: VCC1 > VCC - 0.7V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. Electrical Characteristics at Ta = 25°C, VCC = VCC1 = 14.4V Parameter Symbol Conditions Ratings min typ max Unit ICC VDD No Load, CTRL1/2/3 = ⎡L/L/L⎦ Low input voltage VIL1 ANT: OFF High input voltage VIH1 ANT: ON 2.7 3.3 Input impedance RIN1 input voltage ≤ 3.3V 280 400 Low input voltage VIL2 ILM: OFF High input voltage VIH2 ILM: ON 2.7 3.3 5.5 V Input impedance RIN2 input voltage ≤ 3.3V 280 400 520 kΩ 0.3 V 1.65 2.0 V Quiescent current 50 100 μA 0.3 V 5.5 V 520 kΩ 0.3 V CTRL1 (ANT) 0 CTRL2 (ILM) 0 CTRL3 Low input voltage VIL3 CD, AUDIO, SYS5V, DSP: OFF Middle input voltage VIM3 CD, DSP:OFF 0 1.3 SYS5V, AUDIO: ON High input voltage VIH3 CD, AUDIO, SYS5V, DSP: ON 2.7 3.3 5.5 V Input impedance RIN3 input voltage ≤ 3.3V 280 400 520 kΩ V VDD output 5.0V/3.3V -ON ; IKVDD = VCC1 : VDD = 5V/IKVDD = GND : VDD = 3.3V VDD output voltage 1 VO1 IO1 = 200mA, IKVDD = VCC1 4.75 5.0 5.25 VDD output voltage 2 VO1’ IO1 = 200mA, IKVDD = GND 3.13 3.3 3.47 VDD output current IO1 Line regulation ΔVOLN1 Load regulation ΔVOLD1 Dropout voltage 1 VDROP1 Dropout voltage 2 VDROP1’ IO1 = 100mA Ripple rejection RREJ1 f = 120Hz, IO1 = 200mA 200 7.5V < VCC < 16V, IO1 = 200mA V mA 30 100 mV 1mA < IO1 < 200mA 70 150 mV IO1 = 200mA 1.0 1.5 V 0.5 0.75 V 40 50 dB Continued on next page. No.A2159-2/15 LV5696P Continued from preceding page. Parameter Symbol Conditions Ratings min typ Unit max CD output 8.0V-ON ; CTRL3 = ⎡H⎦ CD output voltage VO2 CD output current IO2 IO2 = 1000mA Line regulation ΔVOLN2 Load regulation ΔVOLD2 Dropout voltage 1 VDROP2 Dropout voltage 2 VDROP2’ IO2 = 500mA Ripple rejection RREJ2 f = 120Hz, IO2 = 1000mA 7.6 8.0 8.4 1000 10.5V < VCC < 16V, IO3 = 1000mA V mA 50 100 mV 10mA < IO2 < 1000mA 100 200 mV IO2 = 1000mA 1.0 1.5 V 0.5 0.75 V 40 50 dB 1.222 1.260 1.298 V ILM output 3.0 to 8.0V-ON ; CTRL2 = ⎡H⎦ ILM_ADJ voltage VI3 ILM_ADJ current IIN3 1 μA ILM output voltage1 VO3 IO3 = 200mA, R1 = 300kΩ, R2 = 56kΩ 7.65 8.0 8.35 V ILM output voltage2 VO3’ IO3 = 200mA, R1 = 51kΩ, R2 = 36kΩ 2.86 3.0 3.14 ILM output current IO3 R1 = 300kΩ, R2 = 56kΩ 200 Line regulation ΔVOLN3 10.5V < VCC < 16V, IO4 = 200mA 30 90 mV Load regulation ΔVOLD3 1mA < IO3 < 200mA 70 150 mV Dropout voltage 1 VDROP3 IO3 = 200mA 0.7 1.05 V 0.35 0.53 -1 Dropout voltage 2 VDROP3’ IO3 = 100mA Ripple rejection RREJ3 f = 120Hz, IO4 = 200mA V mA 40 50 8.07 8.5 V dB AUDIO output 8.5V-ON ; CTRL3 = ⎡M or H⎦ AUDIO output voltage VO4 AUDIO output current IO4 IO4 = 300mA Line regulation ΔVOLN4 Load regulation ΔVOLD4 1mA < IO4 < 300mA Dropout voltage 1 VDROP4 IO4 = 200mA Dropout voltage 2 VDROP4’ IO4 = 100mA 0.35 Ripple rejection RREJ4 f = 120Hz, IO4 = 300mA 8.93 300 10.5V < VCC < 16V, IO4 = 300mA V mA 30 90 mV 70 150 mV 0.7 1.05 V 0.53 V 40 50 4.75 5.0 dB SYS output 5.0V-ON ; CTRL3 = ⎡M or H⎦ SYS output voltage VO5 SYS output current IO5 IO5 = 500mA 5.25 Line regulation ΔVOLN5 10.5V < VCC < 16V, IO5 = 500mA 30 90 mV Load regulation ΔVOLD5 1mA < IO5 < 500mA 70 150 mV Dropout voltage VDROP5 IO5 = 500mA 1.3 2.5 V Ripple rejection RREJ5 f = 120Hz, IO5 = 500mA 500 V mA 40 50 dB 3.13 3.3 3.47 DSP output 3.3V-ON ; CTRL3 = ⎡H⎦ DSP output voltage VO6 IO6 = 800mA DSP output current IO6 Line regulation ΔVOLN6 10.5V < VCC < 16V, IO6 = 800mA 30 90 mV Load regulation ΔVOLD6 1mA < IO6 < 800mA 70 150 mV 1.5 3.0 800 Dropout voltage VDROP6 IO6 = 800mA Ripple rejection RREJ6 f = 120Hz, IO6 = 800mA Output voltage VO7 IO7 = 200mA Output current IO7 VO7 ≥ VCC-1.0 V mA 40 50 VCC-1.0 VCC-0.5 V dB ANT Remote-ON ; CTRL1 = ⎡H⎦ 200 V mA Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. No.A2159-3/15 LV5696P Package Dimensions unit : mm HZIP15J CASE 945AC ISSUE A GENERIC MARKING DIAGRAM* XXXXXXXXXX YMDDD SOLDERING FOOTPRINT* Through Hole Area (Unit: mm) Package name HZIP15J 2.54 1.2 2.54 (1.91) XXXXX = Specific Device Code Y = Year M = Month DDD = Additional Traceability Data 2.54 2.54 NOTE: The measurements are not to guarantee but for reference only. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. No.A2159-4/15 LV5696P • Allowable power dissipation derating curve Pd max -- Ta Allowable power dissipation, Pd max -- W 8 Aluminum heat sink mounting conditions tightening torque : 39N⋅cm, using silicone grease 7 6 5.6 Aluminum heat sink (50 × 50 × 1.5mm3) when using 5 4 3 2 1.5 Independent IC 1 0 --40 --20 0 20 40 60 80 100 120 140150160 Ambient temperature, Ta -- °C • Peak Voltage testing pulse wave 50V 90% 10% 16V 5msec 100msec CTRL logic truth table CTRL1 ANT CTRL2 ILM CTRL3 AUDIO SYS CD DSP L OFF L OFF L OFF OFF OFF OFF H ON H ON M ON ON OFF OFF H ON ON ON ON No.A2159-5/15 LV5696P Block Diagram VCC +B + 15 ANT ANT (VCC-0.5V) 9 + 7 Over Voltage Protection 200mA SYS 5.0V 500mA + Start up Vref + 5 + 11 CTRL1 4 CTRL2 6 + CTRL3 8 ILM 3.0V to 8.0V + ILM ADJ + 3 Thermal 800mA + 10 OUTPUT Control DSP 3.3V + Shut Down CD 8.0V 1000mA + 1 AUDIO 8.5V 300mA + 14 VCC1 + 13 VDD OUT(3.3V/5.0V) + 200mA GND 2 + +B 12 IKVDD:VDDSEL No.A2159-6/15 LV5696P Pin Function Pin No. 1 Pin name AUDIO Description AUDIO output pin CTRL3 = M, H-ON Equivalent Circuit VCC 15 8.5V/0.3A 1 260kΩ 45kΩ 2 GND 3 CD 1kΩ 2 GND 15 VCC GND pin CD output pin CTRL3 = H-ON 8.0V/1.0A 3 240kΩ 45kΩ 1kΩ 2 4 CTRL1 CTRL1 input pin GND 15 Input of two values 4 VCC 10kΩ 400kΩ 2 5 DSP DSP output pin CTRL3 = H-ON GND VCC 15 3.3V/0.8A 5 73kΩ 45kΩ 2 1kΩ GND Continued on next page. No.A2159-7/15 LV5696P Continued from preceding page. Pin No. 6 Pin name CTRL2 Description Equivalent Circuit CTRL2 input pin 15 Input of two values 6 VCC 10kΩ 400kΩ 2 7 SYS SYS output pin CTRL3 = M, H-ON GND VCC 15 5.0V/0.5A 7 134kΩ 45kΩ 2 8 CTRL3 CTRL3 input pin Input of three values GND VCC 15 8 1kΩ 10kΩ 400kΩ 9 ANT ANT output pin CTRL1 = H-ON 2 GND 15 VCC VCC-0.5V/0.2A 9 2 GND Continued on next page. No.A2159-8/15 LV5696P Continued from preceding page. Pin No. 10 Pin name ILM ADJ Description ILM feedback pin Equivalent Circuit VCC 15 11 11 ILM ILM output pin CTRL2 = H-ON 10 3.0 to 8.0V/0.2A 1kΩ 2 12 IKVDD VDD Voltage switch control input pin VCC1/GND GND VCC1 14 5V 4.75MΩ 12 65kΩ 2 13 VDD VDD output pin 5.0V/0.2A (IKVDD = VCC1) GND VCC1 14 3.3V/0.2A (IKCD = GND) 13 225kΩ 190kΩ 140kΩ 1kΩ 2 14 VCC1 VDD power supply pin 15 VCC Power supply pin GND VCC 15 2 14 VCC1 GND Continued on next page. No.A2159-9/15 LV5696P Timing Chart 21V VCC (15PIN) 21V VCC1 (14PIN) 5.5V VDD output (13PIN) H CTRL1 input (4PIN) L CTRL2 input (6PIN) L CTRL3 input (8PIN) H H M L ANT output (9PIN) ILM output (11PIN) AUDIO (1PIN) SYS output (7PIN) CD output (3PIN) DSP output (5PIN) No.A2159-10/15 LV5696P Application circuit example + + + C2 C1 C4 C3 C6 C5 C8 C7 C9 C11 C10 R1 CTRL2 VCC VCC1 15 + + C13 C12 C15 C14 C17 C16 R3 VDD R2 D1 ILM SYS DSP CTRL1 + C18 14 13 + + D3 CD 12 11 D2 AUDIO VDD 10 9 IKVDD ILM 8 7 + ILM ADJ CTRL3 CTRL2 6 5 ANT 4 3 SYS 2 1 DSP CD AUDIO GND CTRL1 LV5696P CTRL3 VCC ANT External Parts Lineup Part name C2, C4, C6, C8, Description Recommended value Output stabilization capacitor 10μF or more (*1) Output stabilization capacitor 0.22μF or more (*1) Note Electrolytic capacitor C11, C13 C1, C3, C5, C7, Ceramic capacitor C10, C12 C18 Output stabilization capacitor 20pF Ceramic capacitor C15, C17 Bypass capacitor 100μF or more Connect a capacitor as close as C14, C16 Prevent oscillation capacitor 0.22μF or more possible to VCC pin and GND pin. C9 Output stabilization capacitor 2.2μF or more ILM output voltage R1, R2 R3 D1 D2, D3 Feedback resister Protective resister A resistor with resistance R1/R2: 300kΩ/56kΩ = 8.0V accuracy as low as less R1/R2: 51kΩ/36kΩ = 3.0V ±1% must be used. 10 to 100kΩ Backflow prevention diode Internal element Protection diode SB1003M3 (*1) Make sure that output capacitors is 10μF or more and ESR 10Ω or less in total, in which voltage and temperature fluctuation and unit differences are taken into consideration. Moreover, high frequency characteristics of electrolytic capacitor should be sufficient. Furthermore, the values listed above do not guarantee stabilization during the over current protection operations of the regulator, so oscillation may occur during an over current protection operation. No.A2159-11/15 LV5696P ILM output voltage setting method ILM calculating formula ILM = 11 1.26[V ] × R1 + 1.26[V ] R2 R1 (ILM − 1.26 ) = R2 1.26 ILM R1 1.26V 10 Please design so that the ratio of R1 and R2 may fill the above-mentioned expression for the set ILM voltage. ILM_ADJ R2 ILM_ADJ is equal to bandqap reference voltage (typ = 1.26V). (Ex.) Setup to ILM = 8.0V R1 (8.0 − 1.26) = ≅ 5.349 R2 1.26 R1 300kΩ = ≅ 5.357 R2 56kΩ ILM = 1.26V × 5.357 + 1.26V ≅ 8.010V Note : The above-mentioned are all the values at the typical. The error margin of output voltage is caused by the influence of the manufacturing variations of IC and external resistance. CTRL3 Application Circuit Input 3.3V : R1 = R2 = 47kΩ A B R1 R2 8 CTRL3 400kΩ A B CTRL3 0V 0V 0V 0V 3.3V 1.56V 3.3V 0V 1.56V 3.3V 3.3V 3.12V No.A2159-12/15 LV5696P Warning: Implementing LV5696P to the set board The package of LV5696P is HZIP15J which has some metal exposures other than connection pins and heatsink as shown in the diagram below. The electrical potentials of (2) and (3) are the same as those of pin15 and pin1, respectively. (2) (= pin15) is the VCC pin and (3) (= pin1) is the AUDIO (regulator) output pin. When you implement the IC to the set board, make sure that the bolts and the heatsink are out of touch from (2) and (3). If the metal exposures touch the bolts which has the same electrical potential with GND, GND short occurs in AUDIO output and VCC. The exposures of (1) are connected to heatsink which has the same electrical potential with substrate of the IC chip (GND). Therefore, (1) and GND electrical potential of the set board can contact each other. HZIP15J outline The same node w/ heatsink (1) The same node w/ pin15 The same node w/ heatsink (2) (1) The same node w/ pin1 (3) Heatsink (1) The same w/ heatsink Heatsink : metal exposure *the same applies to the other side. : metal exposure <Top view of HZIP15J> <Side view of HZIP15J> Frame diagram (HZIP15J) Metal exposure 1 Metal exposure 3 Metal exposure 2 Metal exposure 1 LV5696 Metal exposure 1 Metal exposure 1 1PIN 15PIN (Front view) No.A2159-13/15 LV5696P HZIP15J Heat sink attachment Heat sinks are used to lower the semiconductor device junction temperature by leading the head generated by the device to the outer environment and dissipating that heat. a. Unless otherwise specified, for power ICs with tabs and power ICs with attached heat sinks, solder must not be applied to the heat sink or tabs. b. Heat sink attachment • Use flat-head screws to attach heat sinks. • Use also washer to protect the package. • Use tightening torques in the ranges 39-59Ncm (4-6kgcm) . • If tapping screws are used, do not use screws with a diameter larger than the holes in the semiconductor device itself. • Do not make gap, dust, or other contaminants to get between the semiconductor device and the tab or heat sink. • Take care a position of via hole . • Do not allow dirt, dust, or other contaminants to get between the semiconductor device and the tab or heat sink. • Verify that there are no press burrs or screw-hole burrs on the heat sink. • Warping in heat sinks and printed circuit boards must be no more than 0.05 mm between screw holes, for either concave or convex warping. • Twisting must be limited to under 0.05 mm. • Heat sink and semiconductor device are mounted in parallel. Take care of electric or compressed air drivers • The speed of these torque wrenches should never exceed 700 rpm, and should typically be about 400 rpm. Binding head machine screw Countersunk head mashine screw Heat sink gap Via hole c. Silicone grease • Spread the silicone grease evenly when mounting heat sinks. • Our company recommends YG-6260 (Momentive Performance Materials Japan LLC) d. Mount • First mount the heat sink on the semiconductor device, and then mount that assembly on the printed circuit board. • When attaching a heat sink after mounting a semiconductor device into the printed circuit board, when tightening up a heat sink with the screw, the mechanical stress which is impossible to the semiconductor device and the pin doesn't hang. e. When mounting the semiconductor device to the heat sink using jigs, etc., • Take care not to allow the device to ride onto the jig or positioning dowel. • Design the jig so that no unreasonable mechanical stress is not applied to the semiconductor device. f. Heat sink screw holes • Be sure that chamfering and shear drop of heat sinks must not be larger than the diameter of screw head used. • When using nuts, do not make the heat sink hole diameters larger than the diameter of the head of the screws used. A hole diameter about 15% larger than the diameter of the screw is desirable. • When tap screws are used, be sure that the diameter of the holes in the heat sink are not too small. A diameter about 15% smaller than the diameter of the screw is desirable. g. There is a method to mount the semiconductor device to the heat sink by using a spring band. But this method is not recommended because of possible displacement due to fluctuation of the spring force with time or vibration. No.A2159-14/15 LV5696P ORDERING INFORMATION Device LV5696P-E Package HZIP15J (Pb-Free) Shipping (Qty / Packing) 20 / Fan-Fold ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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