Ordering number : ENA2182A LV5684NPVD Bi-CMOS IC System Power Supply IC for Automotive Infotainment Multiple Output Linear Voltage Regulator http://onsemi.com Overview The LV5684NPVD is a multiple output linear regulator IC, which allows reduction of quiescent current. The LV5684NPVD is specifically designed to address automotive infotainment systems power supply requirements. The LV5684NPVD integrates 5 linear regulator outputs, 2 high side power switches, over-current limiter, overvoltage protection and thermal shut down. Supply for VDD and SW33V outputs is low voltage specification, which enables drastic reduction of power dissipation compared to the existing model. Function • Low consumption current: 50μA (typ, only VDD output is in operation) • 5 systems of regulator output VDD for microcontroller: output voltage: 3.3V, maximum output current: 350mA . For system: output voltage: 3.3V, maximum output current: 450mA For audio: output voltage: 5 to 12V (set by external resistors), maximum output current: 250mA For illumination: output voltage: 5 to 12V (set by external resistors), HZIP15 maximum output current: 300mA For CD: output voltage: 5V/8V, maximum output current: 1300mA • 2 lines of high side switch with current protection EXT: Maximum output current: 350mA, voltage difference between input and output: 0.5V ANT: Maximum output current: 300mA, voltage difference between input and output: 0.5V • Supply input V6IN: 6V for VDD, system (SW33V) VCC1: For internal reference voltage, control circuits In case of voltage drop of V6IN, VCC1 supplies to VDD output. VCC2: For AUDIO, illumination, CD, EXT/ANT • Over-current limiter • Overvoltage protector(OVP): VCC1,VCC2 Typ 23V (All outputs except VDD are turned off) Overvoltage shutdown(OVS): V6IN Typ 23V (All outputs except VDD are turned off) • Thermal shut down : Typ 175°C (Warning) The protector functions only improve the IC’s tolerance and they do not guarantee the safety of the IC if used under the onditions out of safety range or ratings. Use of the IC such as use under overcurrent protection range, thermal shutdown state or V6IN OVS condition may degrade the IC’s reliability and eventually damage the IC. ORDERING INFORMATION See detailed ordering and shipping information on page 15 of this data sheet. Semiconductor Components Industries, LLC, 2014 March, 2014 32414NK/51513NK 20130415-S00002 No.A2182-1/15 LV5684NPVD Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Supply voltage Conditions VCC max VCC1, VCC2 V6IN max Input voltage VIN max Allowable power dissipation Pd max Ratings Unit 36 V V6IN (*) 7 V CTRL1, CTRL2 7 V Independent IC Ta ≤ 25°C 1.3 W Al heat sink * 5.3 W With an infinity heat sink 26 W See below for the waveform applied. 50 V Peak supply voltage VCC peak Operating ambient temperature Topr -40 to +85 °C Storage temperature Tstg -55 to +150 °C Junction temperature Tj max 150 °C * : When the Aluminum heat sink (50mm × 50mm × 1.5mm) is used Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time. Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details. Waveform of surge test (VCC1, VCC2) *V6IN is designed to tolerant toward short period of over-voltage (max 20V) which is assumed in condition of short circuit between VCC1/VCC2 and V6IN. However, applying over-voltage higher than maximum rating (7V) to V6IN may degrade the device reliability 50V 90% 10% 16V 5msec 100msec Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Recommended Operating Conditions at Ta = 25°C VCC1 Parameter Operating supply voltage 1 Conditions Ratings VDD output Unit 7 to 16 V VCC2 Parameter Conditions Ratings Unit Operating supply voltage 2 ILM output (10V) 12 to 16 V ILM output (8V) 10 to 16 V Operating supply voltage 3 AUDIO output (9V) 10 to 16 V Operating supply voltage 4 CD output (IO = 1.3A) 10.5 to 16 V CD output (IO ≤ 1A) 10 to 16 V Operating supply voltage 5 EXT output, ANT output 10 to 16 V V6IN Parameter Operating supply voltage 6 Conditions VDD output, SW33V output Ratings Unit 5.7 to 6.5 V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. No.A2182-2/15 LV5684NPVD Electrical Characteristics at VCC1 = VCC2 = 14.4V, V6IN = 6V at Ta = 25°C (*1) Parameter Quiescent current Symbol ICC Conditions Ratings min typ VDD w/out load, CTRL1/2 = “L/L” Unit max 50 100 μA 0.5 V 1.4 V CTRL1 input (ANT/EXT/ILM) Low input voltage VIL1 M1 input voltage VIM11 0 0.8 1.1 M2 input voltage VIM21 1.9 2.2 2.5 V High input voltage VIH1 2.9 3.3 5.5 V Input impedance RIH1 280 400 480 kΩ 0.5 V 1.4 V input voltage ≤ 3.3V CTRL2 input (CD/AUDIO/SW33V) Low input voltage VIL2 M1 input voltage VIM12 0 0.8 1.1 M2 input voltage VIM22 1.9 2.2 2.5 V High input voltage VIH2 2.9 3.3 5.5 V Input impedance RIH2 input voltage ≤ 3.3V 280 400 480 kΩ Output voltage VO1 IO1 = 200mA 3.13 3.3 3.47 Output current IO1 VO1 ≥ 3.1V 350 Line regulation ΔVOLN1 5.7V < V6IN < 6.5V, IO1 = 200mA or VDD output (3.3V) V mA 30 90 mV V6IN = 0V, 7.5V < VCC1 < 16V, IO1 = 200mA Load regulation ΔVOLD1 1mA < IO1 < 200mA 70 150 mV Dropout voltage VDROP1 IO1 = 200mA, V6IN = 0V 1.9 2.8 V (applicable to VCC1) Ripple rejection (*2) RREJ1 f = 120Hz, V6IN or VCC1 = 0.5Vpp 40 50 3.3 dB IO1 = 200mA SW33V output (3.3V) ; CTRL2 = “M1 or M2 or H” Output voltage VO2 IO2 = 200mA 3.13 Output current IO2 VO2 ≥ 3.1V 450 3.47 V Line regulation ΔVOLN2 5.7V < V6IN < 6.5V, IO2 = 200mA 30 90 mV Load regulation ΔVOLD2 1mA < IO2 < 200mA 70 150 mV Dropout voltage VDROP2 IO2 = 200mA 0.25 0.5 Ripple rejection (*2) RREJ2 f = 120Hz, V6IN or VCC1 = 0.5Vpp mA V 40 50 dB 1.212 1.25 1.288 V IO2 = 200mA AUDIO (5-12V)output ; CTRL2 = “M1 or M2 or H” AUDIO_F voltage VI 3 AUDIO_F input current IIN3 1 μA AUDIO output voltage 1 VO3 IO3 = 200mA, R1 = 43kΩ, R2 = 5.1kΩ (*3) 11.21 11.8 12.39 V AUDIO output voltage 2 VO3’ IO3 = 150mA, R3 = 27kΩ, R4 = 4.7kΩ (*3) 8.13 8.5 8.87 V AUDIO output voltage 3 VO3’’ IO3 = 150mA, R3 = 30kΩ, R4 = 10kΩ (*3) 4.75 5.0 5.25 AUDIO output current IO3 Line regulation ΔVOLN3 Load regulation ΔVOLD3 1mA < IO3 < 150mA Dropout voltage 1 VDROP3 IO3 = 150mA Ripple rejection (*2) RREJ3 f = 120Hz, IO3 = 150mA -1 250 10V < VCC2 < 16V, IO3 = 150mA V mA 30 90 mV 70 150 mV 0.3 0.45 40 50 1.212 1.25 V dB ILM (5-12V) output ; CTRL1 = “M1 or M2 or H” ILM_F voltage VI4 ILM_F input current IIN4 ILM output voltage 1 VO4 ILM output voltage 2 ILM output voltage 3 -1 1.288 V 1 μA IO4 = 200mA, R1 = 43kΩ, R2 = 5.1kΩ (*3) 11.21 11.8 12.39 V VO4’ IO4 = 200mA, R1 = 56kΩ, R2 = 7.5kΩ (*3) 9.97 10.5 11.03 V VO4’’ IO4 = 200mA, R1 = 30kΩ, R2 = 5.6kΩ (*3) 7.6 8.0 8.4 V ILM output voltage 4 VO4’’’ IO4 = 200mA, R1 = 30kΩ, R2 = 10kΩ (*3) 4.75 5.0 5.25 V ILM output current IO4 300 mA Continued on next page. No.A2182-3/15 LV5684NPVD Continued from preceding page. Parameter Symbol Conditions Ratings min typ 10V < VCC2 < 16V, IO4 = 200mA R1 = 30kΩ, R2 = 5.6kΩ Unit max Line regulation ΔVOLN4 Load regulation ΔVOLD4 1mA < IO4 < 200mA Dropout voltage 1 VDROP4 IO4 = 200mA 0.35 0.53 Dropout voltage 2 VDROP4’ IO4 = 100mA Ripple rejection (*2) RREJ4 f = 120Hz, IO4 = 200mA 30 90 mV 70 150 mV 0.7 1.05 V 40 50 V dB CD (5V/8V output) ; CTRL2 = “H” : 8V, CTRL2 = “M2” : 5V Output voltage VO51 IO5 = 1000mA 4.75 5.0 5.25 VO52 IO5 = 1000mA 7.6 8.0 8.4 Output current IO5 VO51 ≥ 4.7V, VO52 ≥ 7.6V Line regulation ΔVOLN5 10.5V < VCC2 < 16V, IO5 = 1000mA 50 100 mV Load regulation ΔVOLD5 10mA < IO5 < 1000mA 100 200 mV Dropout voltage 1 VDROP5 IO5 = 1000mA 1.0 1.5 V Dropout voltage 2 VDROP5’ IO5 = 500mA 0.5 0.75 V Ripple rejection (*2) RREJ5 f = 120Hz, IO5 = 1000mA Output voltage VO6 IO6 = 350mA Output current IO6 VO6 ≥ VCC2-1.0 Output voltage VO7 IO7 = 300mA Output current IO7 VO7 ≥ VCC2-1.0 1300 V V mA 40 50 dB VCC2-1.0 VCC2-0.5 V EXT_HS-SW ; CTRL1 = “M2 or H” 350 mA ANT_HS-SW ; CTRL1 = “H” VCC2-1.0 300 VCC2-0.5 V mA *1 : All the specification is defined based on the tests performed under the conditions where Tj and Ta (= 25°C) are almost equal. These tests were performed with pulse load to minimize the increase of junction temperature (Tj). *2 : guaranteed by design *3 : Using resistors of tolerance within 1%. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. No.A2182-4/15 LV5684NPVD Package Dimensions unit : mm HZIP15 CASE 945AB ISSUE A GENERIC MARKING DIAGRAM* XXXXXXXXXX YMDDD SOLDERING FOOTPRINT* Through Hole Area (Unit: mm) Package name HZIP15 2.54 1.2 2.54 (1.91) XXXXX = Specific Device Code Y = Year M = Month DDD = Additional Traceability Data 2.54 2.54 NOTE: The measurements are not to guarantee but for reference only. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. No.A2182-5/15 LV5684NPVD CTRL logic truth table CTRL1 ANT EXT ILM CTRL2 CD AUDIO SW33V ON H ON ON ON H ON (8V) ON M2 OFF ON ON M2 ON (5V) ON ON M1 OFF OFF ON M1 OFF ON ON L OFF OFF OFF L OFF OFF OFF CTRL1/2 voltage range and threshold 5.5V H 2.9V 2.65V (typ) 2.5V M2 1.9V 1.65V (typ) 1.4V M1 0.8V 0.5V 0.65V (typ) L 0V • Allowable power dissipation derating curve Pd max -- Ta Allowable power dissipation, Pd max -- W 8 Aluminum heat sink mounting conditions tightening torque : 39N×cm, using silicone grease 7 6 5.3 5 Aluminum heat sink (50 × 50 × 1.5mm3) when using 4 3 2 1.3 1 Independent IC (HZIP15) 0 --40 --20 0 20 40 60 80 100 120 140150160 Ambient temperature, Ta -- °C No.A2182-6/15 LV5684NPVD R1 R3 C2 C4 R2 C1 CD CTRL2 CTRL1 C5 + AUDIO VCC2 ANT 14 13 C15 + C12 C11 C13 C14 + C9 C10 EXT 12 11 SW33V VDD V6IN 10 9 C7 C8 ILM GND CTRL2 CTRL1 8 7 + R4 C3 6 5 VCC1 4 3 VCC2 2 1 LV5684NPVD AUDIO CD ILM ILM_F AUDIO_F Application Circuit Example 15 C16 + D2 D4 D1 D3 V6IN VDD SW33V ANT VCC1 EXT Peripheral parts Description Recommended value C1, C3, C5, C13, C14 Part name output stabilization capacitor greater than10μF (*1) C2, C4 output stabilization capacitor 0pF C8, C10, C12 Capacitor for bypass power supply C8: greater than 100μF C7, C9, C11 Capacitor for oscillation protector greater than 0.22μF Capacitor for EXT/ANT output stabilization greater than 2.2μF C10,C12: greater than 47μF C15, C16 R1/R2 Note Ceramic capacitor Make sure to implement close to VCC and GND. Use resistors of tolerance within 1% 43kΩ/5.1kΩ : VO = 12V R1, R2 ILM voltage setting 56kΩ/7.5kΩ : VO = 10.5V 30kΩ/5.6kΩ : VO = 8V 30kΩ/10kΩ : VO = 5V R3/R4 R3, R4 AUDIO voltage setting Use resistors of tolerance within 1% 30kΩ/10kΩ : VO = 5V 27kΩ/4.7kΩ : VO = 8.5V 43kΩ/5.1kΩ : VO = 12V D1, D2, D3, D4 Internal device protector diode ON Semiconductor SB1003M3 (*1) Make sure that output capacitors are greater than 10uF and meets the condition of ESR = 0.001 to 10Ω , in which voltage/ temperature dependence and unit differences are taken into consideration. Moreover, in case of electrolytic capacitor, high-frequency characteristics should be sufficiently good. No.A2182-7/15 LV5684NPVD Block Diagram 6V input + 11 V6IN VREF OVS 9 + VREG 12 VDD 3.3V, 0.35A 13 SW33V 3.3V, 0.45A VCC1 5.8V OVP VREF VREG 5.8V VREF 1.25V TSD AUDIO 5 to 12V, 0.25A 5 VREF AUDIO_F CTRL1 8 CTL CTRL2 6 OVP VREF ILM_F OVP → all outputs except VDD: OFF TSD → all outputs: OFF 7 ILM 5 to 12V, 0.3A 1 TSD + 4 VCC2 2 CD 5V/8V, 1.3A 3 VREF OVP 10 GND 15 EXT out 14 ANT out + EXT VCC2-0.5V, 0.35A + ANT VCC2-0.5V, 0.3A Pin Function Pin No. 1 Pin name ILM Description ILM output When CTRL1 = M1, M2, H, Equivalent Circuit VCC2 7 ILM is ON 1 2 ILM_F ILM voltage adjust 2 10 1kΩ GND Continued on next page. No.A2182-8/15 LV5684NPVD Continued from preceding page. Pin No. 3 Pin name CD Description Equivalent Circuit CD output VCC2 7 When CTRL2 = M2, H, CD is ON 5V or 8V/1.3A 3 135kΩ 108kΩ 1kΩ 45kΩ 10 4 AUDIO_F AUDIO voltage adjust GND VCC2 7 5 5 AUDIO AUDIO output 4 When CTRL2 = M1, M2, H, 1kΩ AUDIO is ON 10 6 CTRL2 CTRL2 input 4-value input GND 9 VCC1 10kΩ 6 85kΩ 185kΩ 0.5V 45kΩ 75kΩ 10 7 VCC2 8 CTRL1 GND Power supply CTRL1 input 4-value input 9 VCC1 10kΩ 6 85kΩ 185kΩ 0.5V 45kΩ 75kΩ 10 9 VCC1 Power supply 10 GND GND 11 V6IN Power supply GND VCC2 VCC1 V6IN 7 9 11 10 GND Continued on next page. No.A2182-9/15 LV5684NPVD Continued from preceding page. Pin No. 12 Pin name VDD Description VDD output 3.3V/0.35A Equivalent Circuit VCC1 11 12 230kΩ 2kΩ 140kΩ 10 13 SW33V SW33V output When CTRL2 = M1, M2, H, GND V6IN 11 SW33V is ON 3.3V/0.45A 13 230kΩ 140kΩ 1kΩ 10 14 ANT ANT output When CTRL1 = H, GND VCC2 7 100kΩ ANT is ON VCC-0.5V/300mA 14 15 EXT EXT output When CTRL1 = M2, H, 5kΩ 10 GND 7 VCC2 100kΩ EXT is ON VCC-0.5V/350mA 15 10 5kΩ GND No.A2182-10/15 LV5684NPVD VDD GND 10 9 V6IN 8 7 VCC1 CTRL1 VCC2 ■Note for VDD output(PIN12) and V6IN (PIN11) This product doesn't have reverse current prevention feature for the path of VDD to VCC1. As shown above equivalent circuit for PIN12, there exists a parasitic diode from VDD to VCC1. Accordingly if VCC1 voltage drops below approximately VDD-0.7V, reverse current flows from VDD to VCC1. If you need to prevent this current, insert a diode between VCC2 and VCC1 as shown on the figure below. As the same manner, there is a parasitic diode from V6IN to VCC1. Do not apply voltage to these terminals so that these parasitic diodes are positively biased. Use under the following condition. VCC ≥ VDD, VCC1 ≥ V6IN 12 11 C13 CTRL1 C12 C11 C7 C8 C9 C10 V6IN VDD +B No.A2182-11/15 LV5684NPVD Timing Chart 23V VCC1 (9PIN) VCC2 (7PIN) V6IN (11PIN) VDD output (12PIN) H CTRL1 input (8PIN) M2 M1 L H M2 CTRL2 input (6PIN) M1 L ILM output (1PIN) CD output (3PIN) AUDIO output (5PIN) ANT output (14PIN) EXT output (15PIN) SW33V output (13PIN) Caution: The above values are obtained when typ. No.A2182-12/15 LV5684NPVD • How to set AUDIO output voltage AUDIO output voltage expression AUDIO = ( 5 R1 AUDIO = −1 R2 1.25 AUDIO R1 1.25V 4 R1 + 1) × 1.25[V ] R2 AUDIO_F Set the ratio of R1 and R2 to satisfy above expression. (ex) AUDIO = 9V setting R2 AUDIO_F is determined by internal band-gap reference voltage (typ = 1.25V). R1 9 = − 1 = 6.2 R2 1.25 R1 24kΩ = ≅ 6.15 R2 3.9kΩ AUDIO = (6.15 + 1) × 1.25V ≅ 8.94V • ILM output voltage is similarly calculated as AUDIO output. (ex) ILM = 10.5V setting R1 10.5 = − 1 = 7.4 R2 1.25 R1 56kΩ = ≅ 7.46 R2 7.5kΩ ILM = (7.46 + 1) × 1.25V ≅ 10.575V Note : The above values are typical values. These values have variation among the range of their tolerances. No.A2182-13/15 LV5684NPVD HZIP15 Heat sink attachment Heat sinks are used to lower the semiconductor device junction temperature by leading the head generated by the device to the outer environment and dissipating that heat. a. Unless otherwise specified, for power ICs with tabs and power ICs with attached heat sinks, solder must not be applied to the heat sink or tabs. b. Heat sink attachment • Use flat-head screws to attach heat sinks. • Use also washer to protect the package. • Use tightening torques in the ranges 39-59Ncm (4-6kgcm) . • If tapping screws are used, do not use screws with a diameter larger than the holes in the semiconductor device itself. • Do not make gap, dust, or other contaminants to get between the semiconductor device and the tab or heat sink. • Take care a position of via hole . • Do not allow dirt, dust, or other contaminants to get between the semiconductor device and the tab or heat sink. • Verify that there are no press burrs or screw-hole burrs on the heat sink. • Warping in heat sinks and printed circuit boards must be no more than 0.05 mm between screw holes, for either concave or convex warping. • Twisting must be limited to under 0.05 mm. • Heat sink and semiconductor device are mounted in parallel. Take care of electric or compressed air drivers • The speed of these torque wrenches should never exceed 700 rpm, and should typically be about 400 rpm. Binding head machine screw Countersunk head mashine screw Heat sink gap Via hole c. Silicone grease • Spread the silicone grease evenly when mounting heat sinks. • Recommends YG-6260 (Momentive Performance Materials Japan LLC) d. Mount • First mount the heat sink on the semiconductor device, and then mount that assembly on the printed circuit board. • When attaching a heat sink after mounting a semiconductor device into the printed circuit board, when tightening up a heat sink with the screw, the mechanical stress which is impossible to the semiconductor device and the pin doesn't hang. e. When mounting the semiconductor device to the heat sink using jigs, etc., • Take care not to allow the device to ride onto the jig or positioning dowel. • Design the jig so that no unreasonable mechanical stress is applied to the semiconductor device. f. Heat sink screw holes • Be sure that chamfering and shear drop of heat sinks must not be larger than the diameter of screw head used. • When using nuts, do not make the heat sink hole diameters larger than the diameter of the head of the screws used. A hole diameter about 15% larger than the diameter of the screw is desirable. • When tap screws are used, be sure that the diameter of the holes in the heat sink are not too small. A diameter about 15% smaller than the diameter of the screw is desirable. g. There is a method to mount the semiconductor device to the heat sink by using a spring band. But this method is not recommended because of possible displacement due to fluctuation of the spring force with time or vibration. No.A2182-14/15 LV5684NPVD ORDERING INFORMATION Device LV5684NPVD-XH Package HZIP15 (Pb-Free / Halogen Free) Shipping (Qty / Packing) 20 / Fan-Fold ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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