TI TPS75105DSKR

TPS7510x
www.ti.com
SBVS080H – SEPTEMBER 2006 – REVISED JANUARY 2010
Low Dropout, Two-Bank LED Driver with PWM Brightness Control
FEATURES
DESCRIPTION
•
The TPS7510x linear low dropout (LDO) matching
LED current source is optimized for low power
keypad and navigation pad LED backlighting
applications. The device provides a constant current
to up to four unmatched LEDs organized in two banks
of two LEDs each in a common-cathode topology.
Without an external resistor, the current source
defaults to factory-programmable, preset current level
with ±0.5% accuracy (typical). An optional external
resistor can be used to set initial brightness to
user-programmable values with higher accuracy.
Brightness can be varied from off to full brightness by
inputting a pulse width modulation (PWM) signal on
each Enable pin. Each bank has independent enable
and brightness control, but current matching is done
to all four channels concurrently. The input supply
range is ideally suited for single-cell Li-Ion battery
supplies and the TPS7510x can provide up to 25mA
per LED.
1
2
•
•
•
•
•
•
•
•
Regulated Output Current with 2% LED-to-LED
Matching
Drives Up to Four LEDs at 25mA Each in a
Common Cathode Topology
28mV Typical Dropout Voltage Extends Usable
Supply Range in Li-Ion Battery Applications
Brightness Control Using PWM Signals
Two 2-LED Banks with Independent Enable
and PWM Brightness Control per Bank
No Internal Switching Signals—Eliminates EMI
Default LED Current Eliminates External
Components
– Default values from 3mA to 10mA (in 1mA
increments) available using innovative
factory EEPROM programming
– Optional external resistor can be used for
high-accuracy, user-programmable current
Over-Current and Over-Temperature
Protection
Available in Wafer Chip-Scale Package
or 2,5mm × 2,5mm SON-10
No internal switching signals are used, eliminating
troublesome electromagnetic interference (EMI). The
TPS7510x is offered in an ultra-small, 9-ball, 0.4mm
ball-pitch wafer chip-scale package (WCSP) and a
2,5mm × 2,5mm, 10-pin SON package, yielding a
very compact total solution size ideal for mobile
handsets and portable backlighting applications. The
device is fully specified over TJ = –40°C to +85°C.
APPLICATIONS
•
•
•
•
Keypad and Display Backlighting
White and Color LEDs
Cellular Handsets
PDAs and Smartphones
VBATT
TPS7510x YFF
9-Ball WCSP
(Top View)
TPS7510x DSK
2,5mm x 2,5mm SON-10
(Top View)
ENB
1
10
ISET
9
VIN
8
D1B
A3
B3
C3
ENA
2
A2
B2
C2
D1A
3
A1
B1
C1
D2A
4
7
D2B
GND
5
6
NC
TPS7510x
VIN
D1A
VENA
ENA
D2A
VENB
ENB
D1B
GND
D2B
ISET
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2010, Texas Instruments Incorporated
TPS7510x
SBVS080H – SEPTEMBER 2006 – REVISED JANUARY 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION (1)
OPTIONS (2)
PRODUCT ID
TPS7510x yyyz
(1)
(2)
X is the nominal default diode output current (for example, 3 = 3mA, 5 = 5mA, and 0 = 10mA).
YYY is the package designator.
Z is the reel quantity (R = 3000, T = 250).
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
Default set currents from 3mA to 10mA in 1mA increments are available through the use of innovative factory EEPROM programming.
Minimum order quantities may apply. Contact factory for details and availability.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating temperature range (unless otherwise noted).
PARAMETER
VALUE
VIN range
–0.3V to +7.0V
VISET, VENA, VENB, VDX range
–0.3V to VIN
IDX for D1A, D2A, D1B, D2B
35mA
D1A, D2A, D1B, D2B short circuit duration
Indefinite
Continuous total power dissipation
Internally limited
Junction temperature (TJ)
–55°C to +150°C
Storage temperature
–55°C to +150°C
(1)
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
DISSIPATION RATINGS
BOARD
PACKAGE
RqJC
RqJA
DERATING FACTOR
ABOVE
TA = +25°C
TA < +25°C
TA = +70°C
TA = +85°C
Low-K (1)
YFF
55°C/W
208°C/W
4.8mW/°C
480mW
264mW
192mW
YFF
55°C/W
142°C/W
7.0mW/°C
704mW
387mW
282mW
DSK
40°C/W
60.6°C/W
17mW/°C
1650mW
908mW
660mW
High-K (2)
(1)
(2)
The JEDEC low-K (1s) board used to derive this data was a 3 inch × 3 inch, two-layer board with 2 ounce copper traces on top of the
board.
The JEDEC high-K (2s2p) board used to derive this data was a 3 inch × 3 inch, multi-layer board with 1 ounce internal power and
ground planes and 2 ounce copper traces on top and bottom of the board.
RECOMMENDED OPERATING CONDITIONS
PARAMETER
VIN Input voltage
IDX Operating current per LED
tPWM On-time for PWM signal
TJ Operating junction temperature range
2
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MIN
TYP
MAX
UNIT
2.7
5.5
V
3
25
mA
+85
°C
33
–40
ms
Copyright © 2006–2010, Texas Instruments Incorporated
TPS7510x
www.ti.com
SBVS080H – SEPTEMBER 2006 – REVISED JANUARY 2010
ELECTRICAL CHARACTERISTICS
Over operating junction temperature range (TJ = –40°C to +85°C), VIN = 3.8V, DxA and DxB = 3.3V, RSET = 32.4kΩ, and ENA
and ENB = 3.8V, unless otherwise noted. Typical values are at TA = +25°C.
PARAMETER
ISHDN
IGND
Shutdown supply current
Ground current
TEST CONDITIONS
TYP
MAX
VENA,B = 0V, VDX = 0V
0.03
1.0
mA
ISET = open, VIN = 4.5V
YFF package
170
200
mA
IDX = 5mA, VIN = 3.8V
DSK package
170
230
mA
2
4
%
TA = +25°C
ΔID
Current matching
(IDXMAX – IDXMIN/IDXMAX) × 100%
TA = –40°C to +85°C
MIN
0
YFF
package
0
5
%
DSK
package
0
6
%
ΔIDX%/ΔVIN
Line regulation
3.5V ≤ VIN ≤ 4.5V, IDX = 5mA
2.0
ΔIDX%/ΔVDX
Load regulation
1.8V ≤ VDX ≤ 3.5V, IDX = 5mA
0.8
IDXnom = 5mA
28
VDO
Dropout voltage of any
DX current source
(VDX at IDX = 0.8 × IDX, nom)
IDXnom = 15mA
70
VISET
Reference voltage for current set
IOPEN
ISET
k
(1)
Diode current accuracy (1)
1.183
ISET = open,
VDX = VIN – 0.2V
Enable high level input voltage
Enable low level input voltage
IINA
Enable pin A (VENA) input current
IINB
Enable pin B (VENB) input current
tSD
Shutdown delay time
TSD
Thermal shutdown temperature
%/V
100
mV
1.225
1.257
V
0.5
3
%
DSK
package
0.5
4
%
62.5
mA
2.5
ISET to IDX current ratio (1)
VIL
%/V
YFF
package
ISET pin current range
VIH
UNIT
420
1.2
V
0.4
VENA = 3.8V
5.0
VENA = 1.8V
2.2
VENB = 3.8V
4.0
VENB = 1.8V
1.8
Delay from ENA and ENB = low to
reach shutdown current
(IDX = 0.1 × IDX, nom)
5
13
Shutdown, temp increasing
+165
Reset, temp decreasing
+140
6.1
4.9
V
mA
mA
30
ms
°C
Average of all four IDX outputs.
Copyright © 2006–2010, Texas Instruments Incorporated
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TPS7510x
SBVS080H – SEPTEMBER 2006 – REVISED JANUARY 2010
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Table 1. Recommended (1% Tolerance) Set Resistor Values
(1)
4
RSET (kΩ)
ISET (mA)
IDX (mA) (1)
511
2.4
1.0
255
4.8
2.0
169
7.2
3.0
127
9.6
4.1
102
12.0
5.0
84.5
14.5
6.1
73.2
16.7
7.0
64.9
18.9
7.9
56.2
21.8
9.2
51.1
24.0
10.1
46.4
26.4
11.1
42.2
29.0
12.2
39.2
31.3
13.1
36.5
33.6
14.1
34.0
36.0
15.1
32.4
37.8
15.9
30.1
40.7
17.1
28.7
42.7
17.9
26.7
45.9
19.3
25.5
48.0
20.2
24.3
50.4
21.2
23.2
52.8
22.2
22.1
55.4
23.3
21.5
57.0
23.9
20.5
59.8
25.1
IDX = (VSET/RSET) × k.
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Copyright © 2006–2010, Texas Instruments Incorporated
TPS7510x
www.ti.com
SBVS080H – SEPTEMBER 2006 – REVISED JANUARY 2010
PIN ASSIGNMENTS
YFF PACKAGE
9-BALL WCSP
(TOP VIEW)
DSK PACKAGE
2,5mm × 2,5mm SON-10
(TOP VIEW)
A3
B3
C3
A2
B2
C2
ENB
1
10
ISET
A1
B1
C1
ENA
2
9
VIN
D1A
3
8
D1B
D2A
4
7
D2B
GND
5
6
NC
GND
(1)
NOTE (1): Not connected
TERMINAL FUNCTIONS
NAME
WCSP
SON
INPUT/
OUTPUT
DESCRIPTION
ENA
A3
2
I
Enable pin, Bank A. Driving this pin high turns on the current source to Bank A
outputs. Driving this pin low turns off the current source to Bank A outputs. An
applied PWM signal reduces the LED current (between 0mA and the maximum
current set by ISET) as a function of the duty cycle of the PWM signal. ENA and
ENB can be tied together. ENA can be left OPEN or connected to GND if not used.
See the Application Information section for more details.
D1A
B3
3
O
Diode source current output, Bank A. Connect to LED anode.
D2A
C3
4
O
Diode source current output, Bank A. Connect to LED anode.
I
Enable pin, Bank B. Driving this pin high turns on the current source to Bank B
outputs. Driving this pin low turns off the current source to Bank B outputs. An
applied PWM signal reduces the LED current (between 0mA and the maximum
current set by ISET) as a function of the duty cycle of the PWM signal. ENA and
ENB can be tied together. ENB can be left OPEN or connected to GND if not used.
See the Application Information section for more details.
Supply Input
ENB
A2
1
VIN
B2
9
I
GND
C2
5, Pad
—
Ground
ISET
A1
10
O
An optional resistor can be connected between this pin and GND to set the
maximum current through the LEDs. If no resistor is connected, ISET defaults to the
internally-programmed value.
D1B
B1
8
O
Diode source current output, Bank B. Connect to LED anode.
D2B
C1
7
O
Diode source current output, Bank B. Connect to LED anode.
NC
—
6
—
Not connected.
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TPS7510x
SBVS080H – SEPTEMBER 2006 – REVISED JANUARY 2010
www.ti.com
FUNCTIONAL BLOCK DIAGRAM
Controlled Current Source
D1A
Control
Logic
ENA
800kW
Controlled Current Source
Controlled Current Source
D2A
D1B
ENB
1MW
VIN
ISET
Control
Logic
Controlled Current Source
D2B
Int/Ext
Set Current
Sense
Current
Reference
GND
6
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Copyright © 2006–2010, Texas Instruments Incorporated
TPS7510x
www.ti.com
SBVS080H – SEPTEMBER 2006 – REVISED JANUARY 2010
TYPICAL CHARACTERISTICS
Over operating junction temperature range (TJ = –40°C to +85°C), VIN = 3.8V, DxA and DxB = 3.3V, RSET = 32.4kΩ, and ENA
and ENB = high, unless otherwise noted. Typical values are at TA = +25°C.
LED CURRENT vs DUTY CYCLE (f = 300Hz)
LINE TRANSIENT (600mV Pulse)
25
20
IOUT (mA)
3.9V
1V/div
15
VIN
3.6V
10
0.5mA/div
IOUT
5
0
0
10
20
30
40
50
60
70
80
90
20ms/div
100
Duty Cycle (%)
Figure 1.
Figure 2.
LINE TRANSIENT (300mV Pulse)
DIMMING RESPONSE (Both Channels)
1.2V
3.6V
3.3V
1V/div
VIN
0.4V
1V/div
ENA = ENB
20mA/div
0.5mA/div
IOUT
IOUT
20ms/div
20ms/div
Figure 3.
Figure 4.
DIMMING RESPONSE (Single Channel)
OUTPUT CURRENT vs HEADROOM VOLTAGE
25
ENA = 3.8V
20
-40°C
0.4V
1V/div
ENB
20mA/div
IOUT (mA)
1.2V
15
+25°C
10
+85°C
IOUT
5
0
20ms/div
0
0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16 0.18 0.20
VIN - VOUT (V)
Figure 5.
Copyright © 2006–2010, Texas Instruments Incorporated
Figure 6.
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TPS7510x
SBVS080H – SEPTEMBER 2006 – REVISED JANUARY 2010
www.ti.com
TYPICAL CHARACTERISTICS (continued)
Over operating junction temperature range (TJ = –40°C to +85°C), VIN = 3.8V, DxA and DxB = 3.3V, RSET = 32.4kΩ, and ENA
and ENB = high, unless otherwise noted. Typical values are at TA = +25°C.
OUTPUT CURRENT vs RSET
Expanded Range
IOUT (mA)
IOUT (mA)
OUTPUT CURRENT vs RSET
28
26
24
22
20
18
16
14
12
10
8
6
4
2
0
28
26
24
22
20
18
16
14
12
10
8
6
4
2
0
20 60 100 140 180 220 260 300 340 380 420 460 500
20
30
40
50
RSET (kW)
70
60
80
90
100
RSET (kW)
Figure 7.
Figure 8.
GROUND CURRENT vs INPUT VOLTAGE
TPS75105 OUTPUT CURRENT vs INPUT VOLTAGE
RSET = Open
180
5.4
5.3
175
170
IOUT (mA)
IQ (mA)
5.2
+85°C
165
+25°C
-40°C
5.1
5.0
+85°C
4.9
+25°C
4.8
160
4.7
-40°C
4.6
155
2.5
3.0
3.5
4.0
4.5
5.5
5.0
3.4
3.9
4.4
VIN (V)
4.9
5.4
5.9
VIN (V)
Figure 9.
Figure 10.
TPS75105 OUTPUT CURRENT vs TEMPERATURE
RSET = Open
OUTPUT CURRENT vs OUTPUT VOLTAGE
5.4
20
18
5.3
IOUT D1B
IOUT D2B
5.2
16
5.0
IOUT (mA)
IOUT (mA)
14
5.1
IOUT D2A
4.9
IOUT D1A
12
10
8
6
4.8
+85°C
+25°C
-40°C
4
4.7
2
4.6
0
-40
-20
0
20
40
Temperature (°C)
Figure 11.
8
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60
80
85
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VOUT (V)
Figure 12.
Copyright © 2006–2010, Texas Instruments Incorporated
TPS7510x
www.ti.com
SBVS080H – SEPTEMBER 2006 – REVISED JANUARY 2010
APPLICATIONS INFORMATION
LIMITATIONS ON LED FORWARD
VOLTAGES
SETTING THE OUTPUT CURRENT LEVEL
The TPS7510x is a quad matched current source.
Each of the four current source output levels is set by
a single reference current. An internal voltage
reference of 1.225V (nominal) in combination with a
resistor sets the reference current level. This
reference current is then mirrored onto each of the
four outputs with a ratio of typically 420:1. The
resistor required to set the LED current is calculated
using Equation 1:
RISET =
K ´ VISET
ILED
where:
•
•
•
K is the current ratio
VISET is the internal reference voltage
ILED is the desired LED current
(1)
For example, to set the LED current level to 10mA, a
resistor value of 51.1kΩ is required. This value sets
up a reference current of 23.9mA (1.22V/51.1kΩ). In
turn, this reference current is mirrored to each output
current source, resulting in an output current of 10mA
(23.9mA × 420).
The TPS7510x offers two methods for setting the
output current levels. The LED current is set either by
connecting a resistor (calculated using Equation 1)
from the ISET pin to GND, or leaving ISET unconnected
to employ the factory-programmed RSET resistance.
The internal programmed resistance is implemented
using high-precision processing and yields a
reference current accuracy of 0.5%, nominal.
Accuracy using external resistors is subject to the
tolerance of the external resistor and the accuracy of
the internal reference voltage.
The TPS7510x automatically detects the presence of
an external resistor by monitoring the current out of
the ISET pin. Current levels in excess of 3mA signify
the presence of an external resistor and the device
uses the external resistor to set the reference current.
If the current from ISET is less than 3mA, the device
defaults to the preset internal reference set resistor.
The TPS7510x is available with eight preset current
levels, from 3mA to 10mA (per output) in 1mA
increments. Solutions using the preset internal
current level eliminate an external component,
thereby increasing accuracy and reducing cost.
Copyright © 2006–2010, Texas Instruments Incorporated
The TPS7510x is a linear current source
implementing LDO regulator building blocks.
Therefore, there are some limitations to the forward
(output) voltages that can be used while maintaining
accurate operation. The first limitation is the
maximum LED forward voltage. Because LDO
technology is employed, there is the dropout voltage
to consider. The TPS7510x is an ultra-low dropout
device with typical dropouts in the range of 30mV at
5mA. Care must be taken in the design to ensure that
the difference between the lowest possible input
voltage (for example, battery cut-off) and the highest
possible forward voltage yields at least 100mV of
headroom. Headroom levels less than dropout
decrease the accuracy of the current source (see
Figure 6).
The other limitation to consider is the minimum output
voltage required to yield accurate operation. The
current source employs NMOS MOSFETs, and a
minimum forward LED voltage of approximately 1.5V
on the output is required to maintain highest
accuracy. The TPS7510x is ideal for white LEDs and
color LEDs with forward voltages greater than 1.5V.
This range includes red LEDs that have typical
forward voltages of 1.7V.
USE OF EXTERNAL CAPACITORS
The TPS7510x does not require the use of any
external capacitors for stable operation. Nominal
stray and/or power-supply decoupling capacitance on
the input is adequate for stable operation. Capacitors
are not recommended on the outputs because they
are not needed for stability.
USE OF UNUSED OUTPUTS OR TYING
OUTPUTS TOGETHER
Unused outputs may be left unconnected or tied to
the VIN supply. While open outputs are acceptable,
tying unused outputs to the VIN supply increases ESD
protection. Connecting unused output to ground
violates the minimum recommended output voltage,
results in current levels that potentially exceed the
set/preset LED current and should be avoided.
Connecting outputs in parallel is an acceptable way
of increasing the amount of LED current drive. This
configuration is a useful trick when the higher current
level is a multiple of the preset value.
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TPS7510x
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USE OF ENABLE PINS FOR PWM DIMMING
LOAD REGULATION
The TPS7510x divides control of the LED outputs into
two banks of two current sources each. Each bank is
controlled by the use of an independent, active-high
enable pin (ENA and ENB). The enable pin can be
used for standard ON/OFF operation of the current
source, driven by standard logic levels from
processor GPIO pins, for example. Drive EN high to
turn on the bank of LEDs; drive EN low to turn off the
bank of LEDs.
The TPS7510x is designed to provide very tight load
regulation. In the case of a fixed current source, the
output load change is a change in voltage. Tight load
regulation means that output voltages (LED forward
voltages) with large variations can be used without
impacting the fixed current being sourced by the
output or the output-to-output current matching. The
permissible variation on the output not only allows for
large variations in white LED forward voltages, but
even permits the use of different color LEDs on
different outputs with minimal effect on output current.
Another use of the enable pin is for LED dimming.
LED brightness is a function of the current level being
driven across the diode and the time that current is
being driven through the diode. The perceived
brightness of an LED can be changed by either
varying the current level or, more effectively, by
changing the time in which that current is present.
When a PWM signal is input into the enable pin, the
duty cycle (high or ON time) determines how long the
fixed current is driven across the LEDs. Reducing or
increasing that duration has the effect of dimming or
brightening the LED, without having to employ the
more complex method of varying the current level.
This technique is particularly useful for reducing LED
brightness in low ambient light conditions, where LED
brightness is not required, thereby decreasing current
consumption. The enable pins can also be used for
LED blinking, varying blink rates based on system
status.
Although providing many useful applications, PWM
dimming does have a minimum duty cycle required to
achieve the required current level. The recommended
minimum on time of the TPS7510x is approximately
33ms. On times less than 33ms result in reductions in
the output current by not allowing enough time for the
output to reach the desired current level. Also, having
both enables switching together, asynchronously, or
having one enable on at all times, impacts the
minimum recommended on time (see Figure 4 and
Figure 5). If one enable is already on, the speed at
which the other channel turns on is faster than if both
channel were turning on together or if the other
channel is off. Therefore, connecting one enable on
allows for approximately 10ms to 12ms shorter
minimum on times of the switching enable channel.
LINE REGULATION
The TPS7510x is also designed to provide very tight
line regulation. This architecture allows for voltage
transient events to occur on the power supply
(battery) without impacting the fixed output current
levels or the output to output current matching. A
prime example of such a supply transient event is the
occurrence of a transmit pulse on the radio of a
mobile handset. These transient pulses can cause
variations of 300mV and 600mV on the supply to the
TPS7510x. The line regulation limitation is that the
lower supply voltage level of the event does not
cause the input to output voltage difference to drop
below the dropout voltage range.
TPS7510x
Dimming PWM
or CPU GPIO
ENA
D1A
ENB
D2A
D1B
VIN
Li-Ion
Battery
D2B
ISET
GND
RSET
(optional)
Figure 13. Typical Application Diagram
Unused enable pins can be left unconnected or
connected to ground to
minimize current
consumption. Connecting unused enable pins to
ground increases ESD protection. If connected to VIN,
a small amount of current drains through the enable
input (see the Electrical Characteristics table).
10
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SBVS080H – SEPTEMBER 2006 – REVISED JANUARY 2010
1,213
1,193
1,213
1,193
Figure 14. YFF Wafer Chip-Scale Package Dimensions (in mm)
space
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (March. 2009) to Revision H
Page
•
Added DSK package dissipation information to Dissipation Ratings table ........................................................................... 2
•
Revised ground current parameter, Electrical Characteristics; changed symbol from IQ to IGND; added specifications
for YFF and DSK packages .................................................................................................................................................. 3
•
Added YFF and DSK package specifications for current matching parameter, Electrical Characteristics ........................... 3
•
Changed diode current accuracy parameter, Electrical Characteristics, to reflect YFF and DSK package
specifications ........................................................................................................................................................................ 3
•
Deleted operating junction temperature range specification from Electrical Characteristics table to eliminate
redundancy ........................................................................................................................................................................... 3
Copyright © 2006–2010, Texas Instruments Incorporated
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11
PACKAGE OPTION ADDENDUM
www.ti.com
25-Jan-2010
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS75103YFFR
ACTIVE
DSBGA
YFF
9
3000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
TPS75103YFFT
ACTIVE
DSBGA
YFF
9
250
SNAGCU
Level-1-260C-UNLIM
TPS75105DSKR
ACTIVE
SON
DSK
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS75105DSKT
ACTIVE
SON
DSK
10
250
CU NIPDAU
Level-1-260C-UNLIM
TPS75105YFFR
ACTIVE
DSBGA
YFF
9
3000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
TPS75105YFFT
ACTIVE
DSBGA
YFF
9
250
SNAGCU
Level-1-260C-UNLIM
Green (RoHS &
no Sb/Br)
Green (RoHS &
no Sb/Br)
Green (RoHS &
no Sb/Br)
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Aug-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
TPS75103YFFR
DSBGA
3000
180.0
8.4
YFF
9
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
1.45
1.45
0.8
4.0
8.0
Q1
TPS75103YFFT
DSBGA
YFF
9
250
180.0
8.4
1.45
1.45
0.8
4.0
8.0
Q1
TPS75105DSKR
SON
DSK
10
3000
179.0
8.4
2.73
2.73
0.8
4.0
8.0
Q2
TPS75105DSKT
SON
DSK
10
250
179.0
8.4
2.73
2.73
0.8
4.0
8.0
Q2
TPS75105YFFR
DSBGA
YFF
9
3000
180.0
8.4
1.45
1.45
0.8
4.0
8.0
Q1
TPS75105YFFT
DSBGA
YFF
9
250
180.0
8.4
1.45
1.45
0.8
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Aug-2011
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS75103YFFR
DSBGA
YFF
9
3000
210.0
185.0
35.0
TPS75103YFFT
DSBGA
YFF
9
250
210.0
185.0
35.0
TPS75105DSKR
SON
DSK
10
3000
203.0
203.0
35.0
TPS75105DSKT
SON
DSK
10
250
203.0
203.0
35.0
TPS75105YFFR
DSBGA
YFF
9
3000
210.0
185.0
35.0
TPS75105YFFT
DSBGA
YFF
9
250
210.0
185.0
35.0
Pack Materials-Page 2
X: Max = 1.258 mm, Min =1.158 mm
Y: Max = 1.258 mm, Min =1.158 mm
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