CSD85312Q3E www.ti.com SLPS457 – NOVEMBER 2013 Dual 20 V N-Channel NexFET™ Power MOSFETs FEATURES . 1 • • • • • • • • • Common Source Connection Low Drain to Drain On-Resistance Space Saving SON 3.3 x 3.3 mm Plastic Package Optimized for 5 V Gate Drive Low Thermal Resistance Avalanche Rated Pb-Free Terminal Plating RoHS Compliant Halogen Free PRODUCT SUMMARY TA = 25°C TYPICAL VALUE VDS Drain to Source Voltage Qg Gate Charge Total (4.5 V) Qgd Gate Charge Gate to Drain RDD(on) Drain to Drain On Resistance (Q1 + Q2) VGS(th) Threshold Voltage UNIT 20 V 11.7 nC 1.6 nC VGS = 4.5 V 11.7 mΩ VGS = 8 V 10.3 mΩ 1.1 V ORDERING INFORMATION Device Package Media CSD85312Q3E SON 3.3 x 3.3 mm Plastic Package 13 Inch Reel Qty Ship 2500 Tape and Reel APPLICATIONS • Adaptor or USB Input Protection for Notebook PCs and Tablets ABSOLUTE MAXIMUM RATINGS TA = 25°C VALUE UNIT VDS Drain to Source Voltage 20 V DESCRIPTION VGS Gate to Source Voltage +10/–8 V The CSD85312Q3E is a 20 V common-source, dual N-channel device designed for adaptor or USB input protection. This SON 3.3 x 3.3 mm device has low drain to drain on-resistance that minimizes losses and offers low component count for space constrained multi-cell battery charging applications. ID Continuous Drain Current (Package Limited) 39 A Continuous Drain Current (1) 12 A IDM Pulsed Drain Current (2) 76 A PD Power Dissipation 2.5 W TJ, TSTG Operating Junction and Storage Temperature Range –55 to 150 °C EAS Avalanche Energy, Single Pulse ID = 38 A, L = 0.1 mH, RG = 25 Ω 72 mJ Top View D1 1 D1 2 8 D2 7 D2 (1) Typical RθJA =63°C/W on 1 inch2 (2 oz.) on 0.060 inch thick FR4PCB (2) Pulse duration ≤ 300 μs, duty cycle ≤ 2% TEXT ADDED FOR SPACING VGS vs. RDD(on) S 3 6 D2 NC 4 5 G Circuit Image Common Source Drain 1 Drain 2 30 RDD(on) - On-State Resistance (mΩ) D1 24 21 18 15 12 9 6 3 0 Common Gate TC = 25°C, Id = 10A TC = 125ºC, Id = 10A 27 0 1 2 3 4 5 6 7 8 VGS - Gate-to- Source Voltage (V) 9 10 G001 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2013, Texas Instruments Incorporated CSD85312Q3E SLPS457 – NOVEMBER 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Static Characteristics BVDSS Drain to Source Voltage VGS = 0 V, ID = 250 μA IDSS Drain to Source Leakage Current VGS = 0 V, VDS = 16 V IGSS Gate to Source Leakage Current VDS = 0 V, VGS = +10/–8 V VGS(th) Gate to Source Threshold Voltage VDS = VGS, ID = 250 μA RDD(on) gfs 20 0.85 V 1 μA 100 nA 1.10 1.40 V Drain to Drain On Resistance (Q1 + Q2) VGS = 4.5 V, ID = 10 A 11.7 14.0 mΩ VGS = 8 V, ID = 10 A 10.3 12.4 mΩ Transconductance VDS = 10 V, ID = 10 A 99 S Dynamic Characteristics (1) Ciss Input Capacitance 1840 2390 pF Coss Output Capacitance Crss Reverse Transfer Capacitance 492 640 pF 31 40 RG Series Gate Resistance pF 5.5 11 Ω Qg Qgd Gate Charge Total (4.5 V) 11.7 15.2 nC Gate Charge Gate to Drain 1.6 Qgs Gate Charge Gate to Source nC 3.5 nC Qg(th) Gate Charge at Vth Qoss Output Charge 1.8 nC 8.9 td(on) nC Turn On Delay Time 11 ns tr Rise Time 27 ns td(off) Turn Off Delay Time 24 ns tf Fall Time 6 ns VGS = 0 V, VDS = 10 V, f = 1 MHz VDS = 10 V, ID = 10 A VDS = 10 V, VGS = 0 V VDS = 10 V, VGS = 4.5 V, IDS = 10 A, RG = 2 Ω Diode Characteristics (1) VSD Diode Forward Voltage Qrr Reverse Recovery Charge trr Reverse Recovery Time (1) ISD = 10 A, VGS = 0 V 0.8 VDS= 10 V, IF = 10 A, di/dt = 300 A/μs 1 V 15 nC 23 ns All Dynamic and Diode Characteristics were measured with respect to one of the two drains, with the other left floating. THERMAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER RθJC Thermal Resistance Junction to Case (1) RθJA Thermal Resistance Junction to Ambient (1) (2) (1) (2) 2 MIN 2 TYP MAX UNIT 3.0 °C/W 63 °C/W 2 RθJC is determined with the device mounted on a 1 inch (6.45 cm ), 2-oz. (0.071 mm thick) Cu pad on a 1.5 inch × 1.5 inch (3.81 cm × 3.81 cm), 0.06 inch (1.52 mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design. Device mounted on FR4 material with 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated CSD85312Q3E www.ti.com GATE SLPS457 – NOVEMBER 2013 GATE DRAIN DRAIN Max RθJA = 63°C/W when mounted on 1 inch2 (6.45 cm2) of 2 oz. (0.071 mm thick) Cu. Max RθJA = 150°C/W when mounted on a minimum pad area of 2 oz. (0.071 mm thick) Cu. SOURCE SOURCE M0137-02 M0137-01 TYPICAL MOSFET CHARACTERISTICS (TA = 25°C unless otherwise stated) Figure 1. Transient Thermal Impedance Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 3 CSD85312Q3E SLPS457 – NOVEMBER 2013 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 60 VDD = 5V 90 IDD - Drain-to- Drain Current (A) IDD - Drain-to-Drain Current (A) 100 80 70 60 50 40 30 VGS = 8V VGS = 6V VGS = 4.5V 20 10 0 0 0.4 0.8 1.2 1.6 VDD - Drain-to-Drain Voltage (V) 50 40 30 20 0 2 TC = 125°C TC = 25°C TC = −55°C 10 0 1 G001 Figure 2. Saturation Characteristics TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 6 1000 C − Capacitance (pF) VGS - Gate-to-Source Voltage (V) ID = 10A VDS =10V 7 5 4 3 2 100 10 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 1 0 3 6 9 12 15 Qg - Gate Charge (nC) 18 21 1 24 0 2 4 G001 6 8 10 12 14 16 VDS - Drain-to-Source Voltage (V) 18 20 G001 Figure 5. Capacitance TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 1.5 30 ID = 250uA 1.4 RDD(on) - On-State Resistance (mΩ) VGS(th) - Threshold Voltage (V) G001 10000 Figure 4. Gate Charge 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 −75 −25 25 75 125 TC - Case Temperature (ºC) Figure 6. Threshold Voltage vs. Temperature 4 5 Figure 3. Transfer Characteristics 8 0 2 3 4 VGS - Gate-to-Source Voltage (V) Submit Documentation Feedback 175 G001 TC = 25°C, Id = 10A TC = 125ºC, Id = 10A 27 24 21 18 15 12 9 6 3 0 0 1 2 3 4 5 6 7 8 VGS - Gate-to- Source Voltage (V) 9 10 G001 Figure 7. On-State Resistance vs. Gate-to-Source Voltage Copyright © 2013, Texas Instruments Incorporated CSD85312Q3E www.ti.com SLPS457 – NOVEMBER 2013 TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 100 VGS = 8V VGS = 4.5V 1.75 ID =10A ISD − Source-to-Drain Current (A) Normalized On-State Resistance 2 1.5 1.25 1 0.75 0.5 0.25 −75 −25 25 75 125 TC - Case Temperature (ºC) 175 TC = 25°C TC = 125°C 10 1 0.1 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 VSD − Source-to-Drain Voltage (V) G001 Figure 8. Normalized On-State Resistance vs. Temperature G001 Figure 9. Typical Diode Forward Voltage TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 100 1000 1ms 10ms 100ms 1s DC IAV - Peak Avalanche Current (A) IDS - Drain-to-Source Current (A) 1 100 10 1 0.1 Single Pulse Typical RthetaJA =120ºC/W(min Cu) 0.01 0.01 0.1 1 10 VDS - Drain-to-Source Voltage (V) 50 TC = 25ºC TC = 125ºC 10 1 0.01 0.1 TAV - Time in Avalanche (mS) G001 Figure 10. Maximum Safe Operating Area 1 G001 Figure 11. Single Pulse Unclamped Inductive Switching TEXT ADDED FOR SPACING IDD - Drain- to- Drain Current (A) 45.0 40.0 35.0 30.0 25.0 20.0 15.0 10.0 5.0 0.0 −50 −25 0 25 50 75 100 125 TC - Case Temperature (ºC) 150 175 G001 Figure 12. Maximum Drain Current vs. Temperature Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 5 CSD85312Q3E SLPS457 – NOVEMBER 2013 www.ti.com MECHANICAL DATA CSD85312Q3E Package Dimensions Table 1. Pin Configuration 6 Submit Documentation Feedback Position Designation Pin 1 – 3 Drain 1 Pin 4 No Connect Pin 5 Gate Pin 6 – 8 Drain 2 Pin 9 (Thermal Pad) Source Copyright © 2013, Texas Instruments Incorporated CSD85312Q3E www.ti.com SLPS457 – NOVEMBER 2013 Recommended PCB Pattern Recommended Stencil Opening 1. All Dimensions are in millimeters (inches) 2. Stencil Opening Thickness 4 mils . For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through PCB Layout Techniques. Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 7 CSD85312Q3E SLPS457 – NOVEMBER 2013 www.ti.com 1.75 ±0.10 Q3E Tape and Reel Information 4.00 ±0.10 (See Note 1) Ø 1.50 +0.10 –0.00 3.60 1.30 3.60 5.50 ±0.05 12.00 +0.30 –0.10 8.00 ±0.10 2.00 ±0.05 M0144-01 Notes: 1. 10 sprocket hole pitch cumulative tolerance ±0.2 2. Camber not to exceed 1 mm IN 100 mm, noncumulative over 250 mm 3. Material:black static dissipative polystyrene 4. All dimensions are in mm (unless otherwise specified) 5. Thickness: 0.30 ±0.05 mm 6. MSL1 260°C (IR and Convection) PbF Reflow Compatible 8 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated PACKAGE OPTION ADDENDUM www.ti.com 25-Jan-2014 PACKAGING INFORMATION Orderable Device Status (1) CSD85312Q3E ACTIVE Package Type Package Pins Package Drawing Qty VSON DPA 8 2500 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Pb-Free (RoHS Exempt) CU NIPDAU Level-1-260C-UNLIM Op Temp (°C) Device Marking (4/5) -55 to 150 85312E (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 25-Jan-2014 Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 6-Dec-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device CSD85312Q3E Package Package Pins Type Drawing VSON DPA 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 3.6 B0 (mm) K0 (mm) P1 (mm) 3.6 1.2 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 6-Dec-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CSD85312Q3E VSON DPA 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications. In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms. No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of non-designated products, TI will not be responsible for any failure to meet ISO/TS16949. Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2014, Texas Instruments Incorporated