SILAN SC7313S

Silan
Semiconductors SC7313
DIGITAL CONTROLLED STEREO
AUDIO PROCESSOR WITH LOUDNESS
DESCRIPTION
SOP-28
The SC7313 is a volume, tone (bass and treble), balance (left/
right) and fader(front/rear) processor for quality audio applications in
car radio and Hi-Fi systems. Selectable input gain and external
loudness function are provided. Control is accomplished by serial
I2C bus microprocessor interface. The AC signal settings is obtained
by resistor networks and switches combined with operational
DIP-28
amplifiers. Due to the Used BIPOLAR/CMOS technology, low
distortion, low noise and low DC stepping are obtained.
FEATURES
ORDERING INFORMATION
* Input multiplexer:
Device
--3 stereo inputs
--Selectable input gain for optimal adaptation to different
sources
Package
SC7313
DIP-28-600-2.54
SC7313S
SOP-28-375-1.27
* Four speaker attenuators:
--4 independent speakers control in 1.25dB steps for
* Loudness function
balance and fader facilities
* Volume control in 1.25dB steps
--Independent mute function
* Treble and bass control
* All functions programmable via serial I2C Bus
* Input and output for external equalizer or
noise reduction system
PIN CONFIGURATIONS
CREF
1
28 SCL
VDD
2
27 SDA
GND
3
26 DIG GND
L
4
25 OUT LF
R
5
24 OUT RF
IN(R)
6
23 OUT LR
OUT(R)
7
LOUD R
8
R3
9
BUS
INPUTS
TREBLE
RIGHT
INPUTS
SC7313
21 BOUT(R)
20 BIN(R)
BASS
R2 10
19 BOUT(L)
R1 11
18 BIN(L)
LOUD L 12
LEFT
INPUTS
22 OUT RR
17 OUT(L)
L3 13
16 IN(L)
L2 14
15 L1
)
LEFT INPUTS
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 1.1
1
2002.02.26
Silan
Semiconductors SC7313
BLOCK DIAGRAM
OUT
(L)
17
IN LOUDNESS B-OUT
(L)
(L)
(L)
B-IN
(L)
16
18
12
19
TREBLE
(L)
4
SPEAKER
ATT
INPUT SELECTION
& GAIN CONTROL
LEFT
INPUTS
LEFT
25 FRONT
OUT
MUTE
15
VOLUME
& LOUDNESS
14
BASS
SPEAKER
ATT
TREBLE
23
LEFT
REAR
OUT
28
SCL
27
SDA
MUTE
13
SERIAL BUS DECODER + LATCHES
BUS
26 DIG-GND
9
SPEAKER
ATT
RIGHT
INPUTS
VOLUME
& LOUDNESS
10
BASS
TREBLE
MUTE
RIGHT
24 FRONT
OUT
11
SPEAKER
ATT
CREF
1
22
SUPPLY
MUTE
2
VDD
3
7
A-GND OUT
(R)
6
8
21
20
RIGHT
REAR
OUT
5
IN LOUDNESS B-OUT B-IN
(R)
(R)
(R)
(R)
TREBLE
(R)
ABSOLUTE MAXIMUM RATINGS
Characteristic
Supply Voltage
Operating Temperature
Storage Temperature
Symbol
Value
Unit
VS
10.2
V
Tamb
-40 ~ +85
°C
Tstg
-55 ~ +150
°C
QUICK REFERENCE DATA
Characteristic
Symbol
Min.
Typ.
Max.
Unit
Vs
6
9
10
V
Maximum input signal handling
VCL
2
Total harmonic distortion ,V=1Vrms, f=1kHz
THD
0.01
0.1
Signal to noise ratio
S/N
106
Channel separation, f=1kHz
Sc
Supply Voltage
Volume control, 1.25dB step
Bass and treble control, 2dB step
Fader and balance control, 1.25dB step
Input gain, 3.75dB step
Mute attenuation
Vrms
%
dB
103
dB
-78.75
0
dB
-14
+14
dB
-38.75
0
dB
0
11.25
dB
100
dB
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 1.1
2
2002.02.26
Silan
Semiconductors SC7313
ELECTRICAL CHARACTERISTICS (Refer to the test circuit)
(Tamb=25°CVS=9.0V,RL=10kΩRG=600Ωall controls flat(G=0), f=1kHz,Unless otherwise specified)
Parameter
Symbol
Test conditions
Min
Typ
Max
Unit
6
9
10.0
V
20.0
35.0
mA
SUPPLY VOLTAGE
Operating Supply Voltage
Operating Supply Current
Ripple rejection of Supply Voltage
VS
IS
SVR
60
80
35
50
dB
INPUTS SELECTORS
Input resistance
RII
Clipping Level
VCL
2
2.5
Input Separation (note 2)
SIN
80
100
Output load resistance
RL
Minimum input Gain
GIN(MIN)
Maximum input gain
GIN(MAX)
Step resolution
Input noise
DC steps
Input 1,2,3
Pin7,17
VDC
Vrms
dB
kΩ
4
-1
GSTEP
eIN
kΩ
70
0
1
dB
11.25
dB
3.75
dB
G=11.25dB
2
Adjacent gain steps
4
G=18.75 to MUTE
4
µV
20
mV
mV
VOLUME CONTROL
Input resistance
Control range
RIV
20
33
50
kΩ
Crange
70
75
80
dB
dB
Minimum attenuation
AV(min)
-1
0
1
Maximum attenuation
AV(max)
70
75
80
dB
Step resolution
ASTEP
0.5
1.25
1.75
dB
-1.25
0
1.25
Attenuation set error
EA
AV=0 to –20dB
AV=-20 to –60dB
Tracking error
DC steps
-3
ET
VDC
Adjacent attenuation steps
From 0dB to AV max
dB
2
2
dB
0
3
mV
0.5
7.5
mV
dB
SPEAKER ATTENUATORS
Control Range
Crange
35
37.5
40
Step resolution
SSTEP
0.5
1.25
1.75
dB
1.5
dB
Attenuation Set error
Output Mute Attenuation
DC steps
EA
AMUTE
VDC
80
100
dB
Adjacent attenuation steps
0
3
mV
From 0dB to MUTE
1
10
mV
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 1.1
3
2002.02.26
Silan
Semiconductors SC7313
(continued)
Parameter
Symbol
Test conditions
Min
Typ
Max
Unit
±12
±14
±16
dB
BASS CONTROL (note 1)
Control Range
GB
Step resolution
BSTEP
1
2
3
dB
RB
34
44
58
kΩ
±13
±14
±15
dB
1
2
3
dB
2
2.5
Internal feedback resistance
Maximum boost/cut
TREBLE CONTROL (note 1)
Control Range
Gt
Step resolution
TSTEP
Maximum boost/cut
AUDIO OUTPUTS
Clipping level
VOCL
Output load resistance
RL
Output load capacitance
CL
THD=0.3%
Vrms
kΩ
4
10
nF
Output resistance
ROUT
30
75
120
Ω
DC voltage level
VOUT
4.2
4.5
4.8
V
GENERAL
BW=20 ~20kHz,flat
µV
2.5
output muted
Output noise
eNO
BW=20 ~20kHz,flat
5
µV
15
All gains=0dB
A curve, all gains =0 dB
Signal to noise ratio
Distortion
S/N
d
All gains=0dB; Vo=1Vrms
106
Av=0,VIN=10mV
0.01
0.1
%
Av=-20dB, VIN=1Vrms
0.09
0.3
%
Av=-20dB,VIN=0.3Vrms
Channel separation left/right
Sc
Total tracking error
µV
3
80
dB
0.04
%
103
dB
AV=0 to –20 dB
0
1
dB
AV=-20 to –60 dB
0
2
dB
1
V
+5
µA
0.4
V
BUS INPUTS
Input low voltage
VIL
Input high voltage
VIH
3
Input current
IIN
-5
Output voltage SDA acknowledge
Vo
Io=1.6mA
V
NOTES:
(1) Bass and treble response see Figure 16. The center frequency and quality of the response behavior can be
chosen by the external circuitry. A standard first order bass response can realized by a standard feedback
network.
(2) The selected input is grounded through the 2.2µF capacitor.
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 1.1
4
2002.02.26
Silan
Semiconductors SC7313
TYPICAL CHARACTERISTICS PERFORMANCE
Fig.1 Loudness vs. Volume
Attention
Fig.2 Loudness vs. Frequency vs.
volume Attenuation
20
Fig.3 Loudness vs. External
Capacitors
20
15
-10
10
5
Loudness (dB)
0
Loudness (dB)
Loudness (dB)
CLOUD=100nF
-20
OPEN
-20
56nF
220nF
10nF
100nF
-30
-40
Shorted to VREF
-40
0
-60
0
10
20
30
40
50
100
1k
10
10k
Volume Attention (dB)
Frequency (Hz)
Fig.4 Noise vs.Volume/Gain
settings
Fig.5 Signal to Noise Ratio
vs.Volume settings
100
1k
10k
100k
Frequency (Hz)
Fig.6 Distortion & Noise vs.
Frequency
1
VIN=1Vrms
AV=0dB
All controls Flat
1V
10k
Noise (µV
Noise (µV
THD & Noise (%)
100k
10
22Hz ~ 22kHz
VIN=1V
1k
S/N=76dB
100
3
Volume=0dB
-2
10
S/N=106dB
A Curve
VIN=316V
10
1
1
-80
-60
-40
-20
0
-80
Volume (dB)
-60
-40
-20
0
-3
10
20
100
Fig.8 Distortion vs. Load
Resistance
1
10k
100k
Fig.9 Channel Separation(L→R) vs.
Frequency
110
Channel Separation (dB)
VIN=250mVrms
AV=0dB
All controls Flat
THD (%)
Volume=-20dB
Volume=0dB
1k
Frequency (dB)
-1
10
-1
10
10
Volume (dB)
Fig.7 Distortion & Noise vs.
Frequency
THD & Noise (%)
Volume=-20dB
-1
10
-2
10
100
90
VIN=1Vrms
AV=0dB
All controls Flat
80
70
-3
10
10
100
1k
Frequency (dB)
10k
100k
-2
10
0.1
1
Load Resistance (kΩ)
1
10
2
10
3
10
4
10
Frequency (Hz)
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 1.1
5
2002.02.26
Silan
Semiconductors SC7313
TYPICAL CHARACTERISTICS PERFORMANCE (continued)
Fig.10 Input Separation
( L1→L2,L3,L4) vs. Frequency
Fig.11 Supply Voltage Rejection
vs. Frequency
100
100
VIN=1Vrms
AV=0dB
All controls Flat
90
80
90
Output Clipping Level (v)
Channel Separation (dB)
Channel Separation (dB)
110
Fig.12 Output Clipping Level vs.
Supply Voltage
80
70
Vsvr=0.5Vrms
All Input to GND
AV=0dB
All controls Flat
60
5.0
RL=10kΩ
f=1kHz
THD=0.3%
4.0
3.0
2.0
70
1.0
1
10
2
10
3
10
4
10
1
10
2
10
3
10
4
10
4
8
10
12
Frequency (Hz)
Supply Voltage (V)
Fig.13 Quiescent current vs. Supply
Voltage
Fig.14 Supply current vs.
Temperature
Fig.15 Bass resistance vs.
Temperature
8.0
6.0
4.0
2.0
50
8.5
48
Bass Resistance (kΩ
Quiescent Current (mA)
9.0
8.0
Vs=9V
7.5
7.0
6.5
4
6
8
10
12
46
44
42
40
-60
-30
0
30
Temperature
Supply Voltage (V)
k
60
90
-60
-30
0
30
Temperature
( )
60
k
90
( )
Fig.16 Typical Tone Response
(with the Ext components indicated
the test circuit)
15
AV=0dB
10
Tone Response (dB)
Quiescent Current (mA)
6
Frequency (Hz)
5
0
-5
-10
-15
1
10
2
10
3
10
4
10
Frequency (Hz)
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 1.1
6
2002.02.26
Silan
Semiconductors SC7313
APPLICATION NOTES
2
1. I C BUS INTERFACE
Data transmission from microprocessor to the SC7313 and viceversa takes place through the 2 wires I2C BUS
interface, consisting of the two lines SDA and SCL(pull-up resistors to positive supply voltage must be connected).
2. DATA VALIDITY
As shown in Figure 17, the data of the SDA line must be stable during the high period of the clock. The HIGH
and LOW state of the dtat line can only change when the clock signal on the SCL line is LOW.
SDA
SCL
DATA LINE
STABLE, DATA
VALID
CHANGE
DATA
ALLOWED
Fig. 17 Data Validity on the I2C BUS
3. START AND STOP CONDITIONS
As shown in Figure 18, a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The
stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
SCL
I 2C
BUS
//
SDA
//
start
stop
Fig. 18 Timing diagram of I2C BUS
4. BYTE FORMAT
Every byte transferred on the SDA line must obtain 8 bits. Each byte must be followed by the an acknowledge
bit. The MSB is transferred first.
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 1.1
7
2002.02.26
Silan
Semiconductors SC7313
5. ACKNOWLEDGE
The master(microprocessor) puts a resistive HIGH level on the SDA line during the acknowledge clock
pulse(see Figure 19). The peripheral(audioprocessor) that acknowledges has to pull-down(LOW) the SDA line
during the acknowledge clock pulse, so that the SDA line is stable LOW during this clock pulse.
The audioprocessor which has been addressed has to generate an acknowledge after the reception of each
byte , otherwise the SDA line remain at the HIGH level during the ninth clock pulse time. In this case the master
transmitter can generate the STOP information in order to abort the transfer.
SCL
1
2
3
//
7
8
9
MSB
SDA
//
Acknowledgment
from receiver
start
Fig. 19 Acknowledge on the I2C BUS
6. TRANSMISSION WITHOUT ACKNOWLEDGE
Avoiding to detect the acknowledge of the audioprocessor, the microprocessor can use a simpler transmission:
simply it waits one clock without checking the slave acknowledgig, and sends the new data.
This approach of course is less protected from mis-working and decreases the noise immunity.
SOFTWARE SPECIFICATION
1. Interface protocol
The interface protocol comprises:
A start conditions
A chip address byte, containing the SC7313 address(the 8
th
bit of the bytes must be 0). The SC7313
must always acknowledge at the end of each transmitted byte.
A sequence of data(N-bytes + acknowledge)
A stop condition (P)
SC7313 address
MSB
LSB
S 1 0 0 0 1 0 0 0 ACK
MSB
DATA
LSB
MSB
ACK
DATA
LSB
ACK P
Data Transferred
(N-Bytes + Acknowledge)
ACK: Acknowledge
S: Start
P: Stop
Max clock speed: 100kbits/sec
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 1.1
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2002.02.26
Silan
Semiconductors SC7313
2. Chips address
1 (MSB)
0
0
0
1
0
0
0 (LSB)
3. Data bytes
MSB
LSB
Function
0
0
B2
B1
B0
A2
A1
A0
Volume Control
1
1
0
B1
B0
A2
A1
A0
Speaker ATT LR
1
1
1
B1
B0
A2
A1
A0
Speaker ATT RR
1
0
0
B1
B0
A2
A1
A0
Speaker ATT LF
1
0
1
B1
B0
A2
A1
A0
Speaker ATT RF
0
1
0
G1
G0
S2
S1
S0
Audio switch
0
1
1
0
C3
C2
C1
C0
Bass control
0
1
1
1
C3
C2
C1
C0
Treble control
Note: Ax=1.25dB steps;Bx=10dB steps;Cx=2dB steps;Gx=3.75dB steps
DETAILED DESCRIPTION OF DATA BYTES
1. Volume
MSB
0
0
0
0
B2
B1
B0
LSB
Function
A2
A1
A0
Volume 1.25dB steps
0
0
0
0
0
0
1
-1.25
0
1
0
-2.5
0
1
1
-3.75
1
0
0
-5
1
0
1
-6.25
1
1
0
-7.5
1
1
1
-8.75
A2
A1
A0
Volume 10dB steps
B2
B1
B0
0
0
0
0
0
0
1
-10
0
1
0
-20
0
1
1
-30
1
0
0
-40
1
0
1
-50
1
1
0
-60
1
1
1
-70
For example, a volume of –45dB is given by: 00100100
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 1.1
9
2002.02.26
Silan
Semiconductors SC7313
2. speaker attenuators
MSB
LSB
Function
1
0
0
B1
B0
A2
A1
A0
Speaker ATT LF
1
0
1
B1
B0
A2
A1
A0
Speaker ATT RF
1
1
0
B1
B0
A2
A1
A0
Speaker ATT LR
1
1
1
B1
B0
A2
A1
A0
Speaker ATT RR
0
0
0
0
0
0
1
-1.25
0
1
0
-2.5
0
1
1
-3.75
1
0
0
-5
1
0
1
-6.25
1
1
0
-7.5
1
1
1
-8.75
0
0
0
0
1
-10
1
0
-20
1
1
1
1
-30
1
1
1
MUTE
For example, attenuation of 25dB on speaker RF is given by: 10110100
4. Audio switch
MSB
0
1
0
G1
0
G0
S2
LSB
Function
S1
S0
Audio switch
0
0
Stereo 1
0
1
Stereo 2
1
0
Stereo 3
1
1
Stereo 4
0
Loudness ON
1
Loudness OFF
0
+11.25dB
0
1
+7.5dB
1
0
+3.75dB
1
1
0dB
For example, to select the stereo 2 input with a gain of +7.5dB Loudness ON the 8bit string is: 01001001
Note: Stereo4 is connected internally, but not available on pins.
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 1.1
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Silan
Semiconductors SC7313
5.Bass and treble
MSB
LSB
Function
0
1
1
0
C3
C2
C1
C0
Bass
0
1
1
1
C3
C2
C1
C0
Terble
0
0
0
0
-14
0
0
0
1
-12
0
0
1
0
-10
0
0
1
1
-8
0
1
0
0
-6
0
1
0
1
-4
0
1
1
0
-2
0
1
1
1
0
1
1
1
1
0
1
1
1
0
2
1
1
0
1
4
1
1
0
0
6
1
0
1
1
8
1
0
1
0
10
1
0
0
1
12
1
0
0
0
14
C3=Sign
For Example, bass at –10dB is obtained by the following 8bit string is: 01100010.
TEST AND TYPICAL APPLICATION CIRCUIT
2.2
MCU
­F
5.6k
100
nF
AM/FM
TUNER
­F
11 R1
­F
15 L1
­F
10 R2
­F
14 L2
­F
9
­F
13 L3
28
27
26
17
DGND
SDA
SCL
16
12
100
nF
19
LOUD BOUT
(L)
(L)
OUT(L) IN(L)
¡
100
nF
18
2.7nF
4
BIN TREBLE
(L)
(L)
2.2
­
10 F
OUT LF
25
OUT RF
24
OUT LR
23
OUT LR
22
­F
10
2.2
CD
PLAYER
SC7313
2.2
­F
10
2.2
TAPE
­F
R3
10
2.2
2.2
VDD
2
AGND CREF
3
OUT(R) IN(R)
1
7
6
­F
8
21
100
nF
22
VDD
LOUD BOUT
(R)
(R)
­
2.2 F
BIN TREBLE
(R)
(R)
20
100
nF
5
100
nF
5.6k
2.7nF
¡
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 1.1
11
2002.02.26
Silan
Semiconductors SC7313
PACKAGE OUTLINE
DIP-28-600-2.54
UNIT:mm
0.05
2.54
15.24(600)
13.8 0.25
0.25
B
B
B
B0.3
1.52 0.5
3.00MIN 4.96MAX
15 degree
0.5MIN
37.34
B0.08
0.46
2.16MAX
0.3
7.6
9.525(375)
0.4
UNIT:mm
10.2
SOP-28-375-1.27
B B
1.27
B0.05
B0.1
B0.25
0.15
0.45
2.8 MAX
17.75
16.51
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 1.1
12
2002.02.26
Silan
Semiconductors SC7313
Attach
Revision History
Data
REV
Description
2000.12.31
1.0
Original
2002.02.26
1.1
Modify the “package outline”
Page
12
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 1.1
13
2002.02.26