CSD25402Q3A www.ti.com SLPS454 – DECEMBER 2013 20 V P-Channel NexFET™ Power MOSFET Check for Samples: CSD25402Q3A FEATURES 1 • • • • • • 2 PRODUCT SUMMARY Ultra-Low Qg and Qgd Low Thermal Resistance Low RDS(on) Pb and Halogen Free RoHS Compliant SON 3.3 mm × 3.3 mm Plastic Package VDS Drain-to-Source Voltage –20 V Qg Gate Charge Total (–4.5 V) 7.5 nC Qgd Gate Charge Gate to Drain RDS(on) Drain-to-Source On Resistance Vth nC 74 mΩ VGS = –2.5 V 13.3 mΩ VGS = –4.5 V 7.7 mΩ Threshold Voltage APPLICATIONS • • • • 1.1 VGS = –1.8 V –0.9 V ORDERING INFORMATION DC-DC Converters Battery Management Load Switch Battery Protection Device Package Media Qty Ship CSD25402Q3A SON 3 × 3 Plastic Package 13-inch reel 2500 Tape and Reel ABSOLUTE MAXIMUM RATINGS DESCRIPTION TA = 25°C VALUE UNIT This –20 V, 7.7 mΩ NexFET™ power MOSFET is designed to minimize losses in power conversion load management applications with a SON 3 × 3 package that offers an excellent thermal performance for the size of the device. VDS Drain to Source Voltage –20 V VGS Gate to Source Voltage +12 or –12 V Continuous Drain Current, TC = 25°C –72 A Continuous Drain Current (Package Limit) –35 A Continuous Drain Current(1) –15 A IDM Pulsed Drain Current(2) –82 A PD Power Dissipation(1) 2.8 W TJ, TSTG Operating Junction and Storage Temperature Range –55 to 150 °C Top View D 1 8 S D 2 7 S D 3 6 S 4 S S RDS(on) vs VGS 24 GATE CHARGE 8 TC = 25°C, I D = −10A TC = 125°C, I D = −10A 21 − VGS - Gate-to-Source Voltage (V) RDS(on) - On-State Resistance (mΩ) (1) RθJA = 55°C/W on 1 inch2 Cu (2 oz.) on 0.060" thick FR4 PCB. (2) Pulse width ≤300 µs, duty cycle ≤2% 5 G 18 15 12 9 6 3 0 ID 0 2 4 6 8 10 − VGS - Gate-to- Source Voltage (V) 12 G001 ID = −10A VDS = −10V 7 6 5 4 3 2 1 0 0 2 4 6 8 10 Qg - Gate Charge (nC) 12 14 G001 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NexFET is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2013, Texas Instruments Incorporated CSD25402Q3A SLPS454 – DECEMBER 2013 www.ti.com ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Static Characteristics BVDSS Drain-to-Source Voltage VGS = 0 V, ID = –250 μA IDSS Drain-to-Source Leakage Current VGS = 0 V, VDS = –16 V –1 μA IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = ±12 V –100 nA VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, ID = –250 μA –20 –0.65 V –0.90 –1.15 74 300 mΩ VGS = –2.5 V, ID = –10 A 13.3 15.9 mΩ VGS = –4.5 V, ID = –10 A 7.7 8.9 mΩ VDS = –10 V, ID = –10 A 59 VGS = –1.8 V, ID = –1 A RDS(on) Drain-to-Source On Resistance gfs Transconductance V S Dynamic Characteristics CISS Input Capacitance COSS Output Capacitance 1380 1790 pF 763 992 CRSS pF Reverse Transfer Capacitance 39 51 pF RG Series Gate Resistance 3.7 7.4 Ω Qg Gate Charge Total (4.5 V) 7.5 9.7 nC Qgd Gate Charge Gate to Drain 1.1 nC Qgs Gate Charge Gate to Source 2.4 nC Qg(th) Gate Charge at Vth 1.0 nC QOSS Output Charge 7.6 nC td(on) Turn On Delay Time 10 ns tr Rise Time td(off) Turn Off Delay Time tf Fall Time VGS = 0 V, VDS = –10 V, f = 1 MHz VDS = –10 V, ID = –10 A VDS = –10 V, VGS = 0 V VDS = –10 V, VGS = –4.5 V, ID = –10 A , RG = 5 Ω 7 ns 25 ns 12 ns Diode Characteristics VSD Diode Forward Voltage Qrr Reverse Recovery Charge trr Reverse Recovery Time IS = –10 A, VGS = 0 V –0.8 VDS = –8.5 V, IF = –10 A, di/dt = 200 A/μs 10.3 –1 nC V 21 ns THERMAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER RθJC RθJA (1) (2) 2 MIN Thermal Resistance Junction to Case (1) Thermal Resistance Junction to Ambient (1) (2) 2 TYP MAX UNIT 2.3 °C/W 55 °C/W 2 RθJC is determined with the device mounted on a 1-inch (6.45-cm ), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inch × 1.5-inch (3.81-cm × 3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design. Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD25402Q3A CSD25402Q3A www.ti.com GATE SLPS454 – DECEMBER 2013 GATE DRAIN DRAIN Max RθJA = 175°C/W when mounted on minimum pad area of 2 oz. Cu. Max RθJA = 55°C/W when mounted on 1 inch2 of 2 oz. Cu. SOURCE SOURCE M0137-02 M0137-01 TYPICAL MOSFET CHARACTERISTICS (TA = 25°C unless otherwise stated) Figure 1. Transient Thermal Impedance Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD25402Q3A 3 CSD25402Q3A SLPS454 – DECEMBER 2013 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 100 VGS = −4.5V VGS = −2.5V VGS = −1.8V 90 80 − IDS - Drain-to-Source Current (A) − IDS - Drain-to-Source Current (A) 100 70 60 50 40 30 20 10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 − VDS - Drain-to-Source Voltage (V) 1.8 80 70 60 50 40 30 TC = 125°C TC = 25°C TC = −55°C 20 10 0 2 VDS = −5V 90 0 0.5 1 1.5 2 2.5 3 − VGS - Gate-to-Source Voltage (V) G001 Figure 2. Saturation Characteristics TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd ID = −10A VDS = −10V 6 C − Capacitance (nF) − VGS - Gate-to-Source Voltage (V) G001 10000 7 5 4 3 2 1000 100 1 0 0 2 4 6 8 10 Qg - Gate Charge (nC) 12 10 14 0 2 4 6 8 10 12 14 16 − VDS - Drain-to-Source Voltage (V) G001 Figure 4. Gate Charge 18 20 G001 Figure 5. Capacitance TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 1.3 24 ID = −250uA 1.2 RDS(on) - On-State Resistance (mΩ) − VGS(th) - Threshold Voltage (V) 4 Figure 3. Transfer Characteristics 8 1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 −75 −25 25 75 125 TC - Case Temperature (ºC) Figure 6. Threshold Voltage vs. Temperature 4 3.5 175 TC = 25°C, I D = −10A TC = 125°C, I D = −10A 21 18 15 12 9 6 3 0 0 G001 2 4 6 8 10 − VGS - Gate-to- Source Voltage (V) 12 G001 Figure 7. On-State Resistance vs. Gate-to-Source Voltage Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD25402Q3A CSD25402Q3A www.ti.com SLPS454 – DECEMBER 2013 TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 100 ID = −10A − ISD − Source-to-Drain Current (A) Normalized On-State Resistance 1.4 1.3 1.2 1.1 1 0.9 0.8 VGS = −4.5V VGS = −2.5V 0.7 −75 −25 25 75 125 TC - Case Temperature (ºC) 175 TC = 25°C TC = 125°C 10 1 0.1 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 − VSD − Source-to-Drain Voltage (V) G001 Figure 8. Normalized On-State Resistance vs. Temperature G001 Figure 9. Typical Diode Forward Voltage TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 1000 40.0 1ms 10ms 100ms 1s DC − IDS - Drain- to- Source Current (A) − IDS - Drain-to-Source Current (A) 1 100 10 1 0.1 Single Pulse Typical RthetaJA =140ºC/W(min Cu) 0.01 0.01 0.1 1 10 − VDS - Drain-to-Source Voltage (V) Figure 10. Maximum Safe Operating Area 50 35.0 30.0 25.0 20.0 15.0 10.0 5.0 0.0 −50 −25 G001 0 25 50 75 100 125 TC - Case Temperature (ºC) 150 175 G001 Figure 11. Maximum Drain Current vs. Temperature Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD25402Q3A 5 CSD25402Q3A SLPS454 – DECEMBER 2013 www.ti.com MECHANICAL DATA Q3A Package Dimensions 6 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD25402Q3A CSD25402Q3A www.ti.com SLPS454 – DECEMBER 2013 Q3A Recommended PCB Pattern For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through PCB Layout Techniques. Q3A Recommended Stencil Pattern Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD25402Q3A 7 CSD25402Q3A SLPS454 – DECEMBER 2013 www.ti.com 1.75 ±0.10 Q3A Tape and Reel Information 4.00 ±0.10 (See Note 1) Ø 1.50 +0.10 –0.00 1.30 3.60 5.50 ±0.05 12.00 +0.30 –0.10 8.00 ±0.10 2.00 ±0.05 3.60 M0144-01 Notes: 1. 10-sprocket hole-pitch cumulative tolerance ±0.2 2. Camber not to exceed 1 mm in 100 mm, noncumulative over 250 mm 3. Material: black static-dissipative polystyrene 4. All dimensions are in mm, unless otherwise specified 5. Thickness: 0.30 ±0.05 mm 6. MSL1 260°C (IR and convection) PbF reflow compatible 8 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CSD25402Q3A PACKAGE OPTION ADDENDUM www.ti.com 5-Feb-2014 PACKAGING INFORMATION Orderable Device Status (1) CSD25402Q3A ACTIVE Package Type Package Pins Package Drawing Qty VSON DNH 8 2500 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Pb-Free (RoHS Exempt) CU SN Level-1-260C-UNLIM Op Temp (°C) Device Marking (4/5) -55 to 125 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. 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Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 5-Feb-2014 Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 18-Dec-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device CSD25402Q3A Package Package Pins Type Drawing VSON DNH 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 3.6 B0 (mm) K0 (mm) P1 (mm) 3.6 1.2 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 18-Dec-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CSD25402Q3A VSON DNH 8 2500 340.0 340.0 38.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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